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- ----------------------------------------------------------------------------------
- -- Company:
- -- Engineer:
- --
- -- Create Date: 08:51:34 05/02/2013
- -- Design Name:
- -- Module Name: adc_lcd - Behavioral
- -- Project Name:
- -- Target Devices:
- -- Tool versions:
- -- Description:
- --
- -- Dependencies:
- --
- -- Revision:
- -- Revision 0.01 - File Created
- -- Additional Comments:
- --
- ----------------------------------------------------------------------------------
- library IEEE;
- use IEEE.STD_LOGIC_1164.ALL;
- use IEEE.std_logic_unsigned.all;
- -- Uncomment the following library declaration if using
- -- arithmetic functions with Signed or Unsigned values
- use IEEE.NUMERIC_STD.ALL;
- -- Uncomment the following library declaration if instantiating
- -- any Xilinx primitives in this code.
- --library UNISIM;
- --use UNISIM.VComponents.all;
- entity adc_lcd is
- Port ( RST : in STD_LOGIC;
- CLK : in STD_LOGIC;
- WR : out STD_LOGIC := '1';
- RD : out STD_LOGIC := '1';
- CS : out STD_LOGIC := '1';
- DATA : in STD_LOGIC_VECTOR (7 downto 0);
- INTR : in STD_LOGIC;
- DATA_SHIFT : out STD_LOGIC := '1';
- CK_SHIFT : out STD_LOGIC := '1';
- STROBE : out STD_LOGIC := '1';
- LCD_BP : out STD_LOGIC := '1');
- end adc_lcd;
- architecture Behavioral of adc_lcd is
- signal time_base : STD_LOGIC := '0';
- signal sample : STD_LOGIC := '1';
- signal polarity : STD_LOGIC := '0';
- signal t1 : STD_LOGIC_VECTOR (7 downto 0) := x"00";
- signal data_adc: STD_LOGIC_VECTOR (7 downto 0) := x"00";
- signal bcd: STD_LOGIC_VECTOR (9 downto 0);
- signal seven_segment: STD_LOGIC_VECTOR (23 downto 0) := x"000000";
- signal i : integer range 0 to 25 := 0;
- signal event_counter : integer range 0 to 4096 := 0;
- signal zobraz_time : integer range 0 to 128 := 0;
- type stav is (INIT_ADC,CAKAJ_INTR, READ_ADC, SPRACUJ, ZOBRAZ, CAKAJ);
- signal AKT_STAV,NASL_STAV: stav;
- begin
- --generovanie signalu periody 500ns
- process(CLK,RST)
- begin
- if(RST = '1') then
- t1 <= x"00";
- else
- if rising_edge(CLK) then
- t1 <= t1 + 1;
- if(t1 = x"1F") then
- time_base <= not(time_base);
- t1 <= x"00";
- end if;
- end if;
- end if;
- end process;
- --stavovy automat
- process(time_base,RST)
- variable z: STD_LOGIC_VECTOR (17 downto 0);
- begin
- if(RST = '1') then
- AKT_STAV <= INIT_ADC;
- NASL_STAV <= INIT_ADC;
- event_counter <= 0;
- i <= 0;
- zobraz_time <= 0;
- else
- if rising_edge(time_base) then
- AKT_STAV <= NASL_STAV;
- if(AKT_STAV = NASL_STAV) then
- event_counter <= event_counter + 1;
- else
- event_counter <= 0;
- end if;
- -- zaciatok stavoveho automatiu
- case AKT_STAV is
- -- stav init_adc
- when INIT_ADC =>
- if(event_counter = 0) then
- CS <= '0';
- elsif(event_counter = 1) then
- WR <= '0';
- elsif(event_counter = 2) then
- WR <= '1';
- else
- WR <= '1';
- CS <= '1';
- NASL_STAV <= CAKAJ_INTR;
- end if;
- -- cakaj na INTR s AD prevodnika
- when CAKAJ_INTR =>
- if(INTR = '0') then
- NASL_STAV <= READ_ADC;
- end if;
- -- citaj data s AD prevodnika
- when READ_ADC =>
- if(event_counter = 0) then
- CS <= '0';
- elsif(event_counter = 1) then
- RD <= '0';
- elsif(event_counter = 2) then
- data_adc <= DATA;
- elsif(event_counter = 3) then
- RD <= '1';
- else
- RD <= '1';
- CS <= '1';
- NASL_STAV <= SPRACUJ;
- end if;
- -- spracuj ADC na data pre LCD
- when SPRACUJ =>
- -- data_adc = vstup
- -- seven_segment = vystup
- -- spracuj vysledok ADC do BCD kodu
- for i in 0 to 17 loop
- z(i) := '0';
- end loop;
- z(10 downto 3) := data_Adc;
- for i in 0 to 4 loop
- if z(11 downto 8) > 4 then
- z(11 downto 8) := z(11 downto 8) + 3;
- end if;
- if z(15 downto 12) > 4 then
- z(15 downto 12) := z(15 downto 12) + 3;
- end if;
- z(17 downto 1) := z(16 downto 0);
- end loop;
- bcd <= z(17 downto 8);
- -- mame BCD teraz skonvertuj do 7segmentovky
- case bcd(3 downto 0) is
- when "0000"=> seven_segment(6 downto 0) <="0111111"; -- '0'
- when "0001"=> seven_segment(6 downto 0) <="0000110"; -- '1'
- when "0010"=> seven_segment(6 downto 0) <="1011011"; -- '2'
- when "0011"=> seven_segment(6 downto 0) <="1001111"; -- '3'
- when "0100"=> seven_segment(6 downto 0) <="1100110"; -- '4'
- when "0101"=> seven_segment(6 downto 0) <="1101101"; -- '5'
- when "0110"=> seven_segment(6 downto 0) <="1111101"; -- '6'
- when "0111"=> seven_segment(6 downto 0) <="0000111"; -- '7'
- when "1000"=> seven_segment(6 downto 0) <="1111111"; -- '8'
- when "1001"=> seven_segment(6 downto 0) <="1101111"; -- '9'
- --nothing is displayed when a number more than 9 is given as input.
- when others=> seven_segment(6 downto 0) <="0000000";
- end case;
- -- preskoc bodku
- case bcd(7 downto 4) is
- when "0000"=> seven_segment(14 downto 8) <="0111111"; -- '0'
- when "0001"=> seven_segment(14 downto 8) <="0000110"; -- '1'
- when "0010"=> seven_segment(14 downto 8) <="1011011"; -- '2'
- when "0011"=> seven_segment(14 downto 8) <="1001111"; -- '3'
- when "0100"=> seven_segment(14 downto 8) <="1100110"; -- '4'
- when "0101"=> seven_segment(14 downto 8) <="1101101"; -- '5'
- when "0110"=> seven_segment(14 downto 8) <="1111101"; -- '6'
- when "0111"=> seven_segment(14 downto 8) <="0000111"; -- '7'
- when "1000"=> seven_segment(14 downto 8) <="1111111"; -- '8'
- when "1001"=> seven_segment(14 downto 8) <="1101111"; -- '9'
- --nothing is displayed when a number more than 9 is given as input.
- when others=> seven_segment(14 downto 8) <="0000000";
- end case;
- -- preskoc bodku
- case bcd(9 downto 8) is
- when "00"=> seven_segment(22 downto 16) <="0111111"; -- '0'
- when "01"=> seven_segment(22 downto 16) <="0000110"; -- '1'
- when "10"=> seven_segment(22 downto 16) <="1011011"; -- '2'
- --nothing is displayed when a number more than 9 is given as input.
- when others=> seven_segment(22 downto 16) <="0000000";
- end case;
- --seven_segment <= bcd;
- zobraz_time <= 0;
- NASL_STAV <= ZOBRAZ;
- when ZOBRAZ =>
- -- nasip data do shift registra
- if(event_counter < 47) then
- -- vypni strobe
- STROBE <= '1';
- -- dobezna hrana
- if(sample = '1') then
- -- polarita dat
- if(polarity = '1') then
- DATA_SHIFT <= not(seven_segment(i));
- else
- DATA_SHIFT <= seven_segment(i);
- end if;
- CK_SHIFT <= '0';
- i <= i + 1;
- --nabezna hrana
- else
- CK_SHIFT <= '1';
- end if;
- -- rozhoduje ci ma vlozit novu vzorku
- sample <= not(sample);
- -- data su nahrane zobraz ich na LCD
- else
- -- neguj polaritu
- i <= 0;
- CK_SHIFT <= '1';
- -- vyber polaritu spolocnej elektrody
- if(polarity = '1') then
- LCD_BP <= '1';
- else
- LCD_BP <= '0';
- end if;
- -- zapni strobe
- STROBE <= '0';
- --inkrementuj pocet zobrazeni do dalsieho merania
- zobraz_time <= zobraz_time + 1;
- -- cakaj x ms
- NASL_STAV <= CAKAJ;
- end if;
- when CAKAJ =>
- -- ak sa zobrazovalo urcity cas zacni odznova
- -- zobrazuj hodnotu 0,5sec
- if(zobraz_time = 100) then
- NASL_STAV <= INIT_ADC;
- else
- -- 2ms to je 50Hz
- if (event_counter = 4000) then
- NASL_STAV <= ZOBRAZ;
- polarity <= not(polarity);
- end if;
- end if;
- end case;
- -- spracovanie event_countera ku jednotlivym uloham
- end if;
- end if;
- end process;
- end Behavioral;
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