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  1. /*
  2.  * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
  3.  *
  4.  * This program is free software; you can redistribute it and/or modify
  5.  * it under the terms of the GNU General Public License as published by
  6.  * the Free Software Foundation; either version 2 of the License, or
  7.  * (at your option) any later version.
  8.  *
  9.  * This program is distributed in the hope that it will be useful,
  10.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12.  * GNU General Public License for more details.
  13.  *
  14.  * You should have received a copy of the GNU General Public License
  15.  * along with this program; if not, write to the Free Software
  16.  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  17.  *
  18.  */
  19. /*
  20.  * Based on STMP378X LCDIF
  21.  * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
  22.  */
  23.  
  24. #include <linux/module.h>
  25. #include <linux/kernel.h>
  26. #include <linux/device.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/input.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/irq.h>
  31. #include <linux/fb.h>
  32. #include <linux/init.h>
  33. #include <linux/list.h>
  34. #include <linux/mutex.h>
  35. #include <linux/delay.h>
  36. #include <linux/dma-mapping.h>
  37. #include <linux/err.h>
  38. #include <linux/clk.h>
  39. #include <linux/uaccess.h>
  40. #include <linux/cpufreq.h>
  41. #include <linux/firmware.h>
  42. #include <linux/kthread.h>
  43. #include <linux/dmaengine.h>
  44. #include <linux/pxp_dma.h>
  45. #include <linux/mxcfb.h>
  46. #include <linux/mxcfb_epdc_kernel.h>
  47. #include <linux/gpio.h>
  48. #include <linux/regulator/driver.h>
  49. #include <linux/fsl_devices.h>
  50. #ifdef CONFIG_EARLYSUSPEND
  51. #include <linux/earlysuspend.h>
  52. #endif
  53.  
  54. #include <linux/time.h>
  55.  
  56. #include "epdc_regs.h"
  57.  
  58. /*2011/2/17 FY11 : Supported to read waveform in eMMC. */
  59. #include <linux/mmc/rawdatatable.h>
  60.  
  61. /* 2011/04/06 FY11 : Fixed the failure of waveform memory allocation. */
  62. #include <linux/vmalloc.h>
  63.  
  64. /* 2011/04/19 FY11 : Supported wake lock. */
  65. #include <linux/wakelock.h>
  66.  
  67. /*
  68.  * Enable this define to have a default panel
  69.  * loaded during driver initialization
  70.  */
  71. #define DEFAULT_PANEL_HW_INIT
  72.  
  73. #define NUM_SCREENS_MIN 2
  74. #define EPDC_NUM_LUTS 16
  75. #define EPDC_MAX_NUM_UPDATES 20
  76. #define INVALID_LUT -1
  77.  
  78. #define DEFAULT_TEMP_INDEX  0
  79. #define DEFAULT_TEMP        20 /* room temp in deg Celsius */
  80.  
  81. /* 2011/03/30 FY11 : Fixed tentative define. */
  82. #define INIT_UPDATE_MARKER  (UPDATE_MARKER_MAX + 0x12345678)
  83. #define PAN_UPDATE_MARKER   (UPDATE_MARKER_MAX + 0x12345679)
  84. #define SSCREEN_UPDATE_MARKER   (UPDATE_MARKER_MAX + 0x1234567A)
  85.  
  86. #define POWER_STATE_OFF 0
  87. #define POWER_STATE_ON  1
  88.  
  89.  
  90. #if 1 /* E_BOOK */
  91. /* 2010/12/10 FY11 : Added define for minus temperature. */
  92. #define MINUS_TEMPERATURE   128
  93. #define MINUS_TEMP_ADJUST_VAL   256
  94. /* 2011/03/22 FY11 : Added retry to powerup. */
  95. #define POWERUP_RETRY   1
  96. /* 2011/07/13 FY11 : Modified default powerdown delay. (msec) */
  97. #define DEFAULT_POWER_DOWN_DELAY    80
  98.  
  99. /* 2011/06/08 FY11 : Modified to use static buffer for waveform. */
  100. #define WF_TMP_BUF_SIZE 4096
  101. static u8 *wf_tmp_buf = NULL;
  102. #endif /* E_BOOK */
  103.  
  104. #define MERGE_OK    0
  105. #define MERGE_FAIL  1
  106. #define MERGE_BLOCK 2
  107.  
  108. static unsigned long default_bpp = 16;
  109.  
  110. struct update_marker_data {
  111.     u32 update_marker;
  112.     struct completion update_completion;
  113.     int lut_num;
  114. };
  115.  
  116. /* This structure represents a list node containing both
  117.  * a memory region allocated as an output buffer for the PxP
  118.  * update processing task, and the update description (mode, region, etc.) */
  119. struct update_data_list {
  120.     struct list_head list;
  121.     struct mxcfb_update_data upd_data;/* Update parameters */
  122.     dma_addr_t phys_addr;       /* Pointer to phys address of processed Y buf */
  123.     void *virt_addr;
  124.     u32 epdc_offs;          /* Add to buffer pointer to resolve alignment */
  125.     int lut_num;            /* Assigned before update is processed into working buffer */
  126.     int collision_mask;     /* Set when update results in collision */
  127.                     /* Represents other LUTs that we collide with */
  128.     struct update_marker_data *upd_marker_data;
  129.     u32 update_order;       /* Numeric ordering value for update */
  130. /* 2011/03/05 FY11 : Supported A2 mode limitations. */
  131.     u32 use_white_buf;          /*  Flag for using white buffer. 0: not used, others: used */
  132. /* 2011/03/15 FY11 : Supported standby screen. */
  133.     u32 use_standbyscreen;          /*  Flag for using standby screen. 0: not used, others: used */
  134. };
  135.  
  136. struct mxc_epdc_fb_data {
  137.     struct fb_info info;
  138.     struct fb_var_screeninfo epdc_fb_var; /* Internal copy of screeninfo
  139.                         so we can sync changes to it */
  140.     u32 pseudo_palette[16];
  141.     char fw_str[24];
  142.     struct list_head list;
  143.     struct mxc_epdc_fb_mode *cur_mode;
  144.     struct mxc_epdc_fb_platform_data *pdata;
  145.     int blank;
  146.     u32 max_pix_size;
  147.     ssize_t map_size;
  148.     dma_addr_t phys_start;
  149.     u32 fb_offset;
  150.     int default_bpp;
  151.     int native_width;
  152.     int native_height;
  153.     int num_screens;
  154.     int epdc_irq;
  155.     struct device *dev;
  156.     int power_state;
  157.     struct clk *epdc_clk_axi;
  158.     struct clk *epdc_clk_pix;
  159.     struct regulator *display_regulator;
  160.     struct regulator *vcom_regulator;
  161.     struct regulator *temp_regulator;
  162.     struct regulator *epd_pwr0_regulator;
  163.     struct regulator *epd_pwr2_regulator;
  164.     struct regulator *v3p3_regulator;
  165. /* 2011/07/05 FY11 : Added VSYS_EPD_ON. */
  166.     struct regulator *vsys_regulator;
  167.     bool fw_default_load;
  168.  
  169.     /* FB elements related to EPDC updates */
  170.     bool in_init;
  171.     bool hw_ready;
  172.     bool waiting_for_idle;
  173.     u32 auto_mode;
  174.     u32 upd_scheme;
  175.     struct update_data_list *upd_buf_queue;
  176.     struct update_data_list *upd_buf_free_list;
  177.     struct update_data_list *upd_buf_collision_list;
  178.     struct update_data_list *cur_update;
  179.     spinlock_t queue_lock;
  180.     int trt_entries;
  181.     int temp_index;
  182.     u8 *temp_range_bounds;
  183.     struct mxcfb_waveform_modes wv_modes;
  184.     u32 *waveform_buffer_virt;
  185.     u32 waveform_buffer_phys;
  186.     u32 waveform_buffer_size;
  187.     u32 *working_buffer_virt;
  188.     u32 working_buffer_phys;
  189.     u32 working_buffer_size;
  190.     dma_addr_t phys_addr_copybuf;   /* Phys address of copied update data */
  191.     void *virt_addr_copybuf;    /* Used for PxP SW workaround */
  192.     u32 order_cnt;
  193.     struct update_marker_data update_marker_array[EPDC_MAX_NUM_UPDATES];
  194.     u32 lut_update_order[EPDC_NUM_LUTS];
  195.     u32 luts_complete_wb;
  196.     struct completion updates_done;
  197.     struct delayed_work epdc_done_work;
  198.     struct workqueue_struct *epdc_submit_workqueue;
  199.     struct work_struct epdc_submit_work;
  200.     bool waiting_for_wb;
  201.     bool waiting_for_lut;
  202.     bool waiting_for_lut15;
  203.     struct completion update_res_free;
  204.     struct completion lut15_free;
  205.     struct completion eof_event;
  206.     int eof_sync_period;
  207.     struct mutex power_mutex;
  208.     bool powering_down;
  209.     int pwrdown_delay;
  210.     unsigned long tce_prevent;
  211.  
  212.     /* FB elements related to PxP DMA */
  213.     struct completion pxp_tx_cmpl;
  214.     struct pxp_channel *pxp_chan;
  215.     struct pxp_config_data pxp_conf;
  216.     struct dma_async_tx_descriptor *txd;
  217.     dma_cookie_t cookie;
  218.     struct scatterlist sg[2];
  219.     struct mutex pxp_mutex; /* protects access to PxP */
  220.  
  221. /* 2011/03/05 FY11 : Supported A2 mode limitations. */
  222.     bool force_wf_mode;         /* Flag to represent wheather A2 mode is useded or not.  false : not used, true : used */
  223.  
  224. /* 2011/03/15 FY11 : Supported standby screen. */
  225.     dma_addr_t standbyscreen_buff;  /* Physical address */
  226.     char *standbyscreen_buff_virt;  /* Virtual address */
  227.     ssize_t standbyscreen_buff_size;    /* Size of buffer */
  228.  
  229. /* 2011/04/19 FY11 : Supported wake lock. */
  230.     struct wake_lock wake_lock_ioctl;   /* wake lock for ioctl */
  231.     struct wake_lock wake_lock_update;  /* wake lock for update buffer */
  232.     struct wake_lock wake_lock_power;   /* wake lock for EPD power */
  233.     int counter_for_wlupdate;       /* counter of wake lock for update buffer */
  234. /* 2011/07/14 FY11 : Added wake lock for A2. (Workaround for noise after sleep.) */
  235.     struct wake_lock wake_lock_a2;  /* wake lock for A2 */
  236.  
  237. /* 2011/04/20 FY11 : Supported to clear panel when shutdown. */
  238.     bool panel_clear_at_shutdown;
  239.  
  240. /* 2011/05/12 FY11 : Supported boot progress. */
  241.     struct workqueue_struct *epdc_progress_work_queue;
  242.     struct delayed_work epdc_progress_work;
  243. };
  244.  
  245. struct waveform_data_header {
  246.     unsigned int wi0;
  247.     unsigned int wi1;
  248.     unsigned int wi2;
  249.     unsigned int wi3;
  250.     unsigned int wi4;
  251.     unsigned int wi5;
  252.     unsigned int wi6;
  253.     unsigned int xwia:24;
  254.     unsigned int cs1:8;
  255.     unsigned int wmta:24;
  256.     unsigned int fvsn:8;
  257.     unsigned int luts:8;
  258.     unsigned int mc:8;
  259.     unsigned int trc:8;
  260.     unsigned int reserved0_0:8;
  261.     unsigned int eb:8;
  262.     unsigned int sb:8;
  263.     unsigned int reserved0_1:8;
  264.     unsigned int reserved0_2:8;
  265.     unsigned int reserved0_3:8;
  266.     unsigned int reserved0_4:8;
  267.     unsigned int reserved0_5:8;
  268.     unsigned int cs2:8;
  269. };
  270.  
  271. struct mxcfb_waveform_data_file {
  272.     struct waveform_data_header wdh;
  273.     u32 *data;  /* Temperature Range Table + Waveform Data */
  274. };
  275.  
  276. void __iomem *epdc_base;
  277. static struct mxc_epdc_fb_data *epdc_fb_data;
  278.  
  279. struct mxc_epdc_fb_data *g_fb_data;
  280.  
  281. /* 2011/2/24 FY11 : Supported to read waveform version. */
  282. #define WF_VER_OFFSET   0x0C
  283. static struct mxcfb_waveform_version s_st_wfversion;
  284.  
  285.  
  286. /* 2011/04/12 FY11 : Supported to write panel init flag. */
  287. struct epd_settings {
  288.     unsigned long wfsize;
  289.     unsigned long vcom;
  290.     unsigned long flag;
  291. };
  292.  
  293. #define EPD_SETTING_PANEL_INIT  0x00000001
  294.  
  295.  
  296.  
  297. /* forward declaration */
  298. static int mxc_epdc_fb_get_temp_index(struct mxc_epdc_fb_data *fb_data,
  299.                         int temp);
  300. static void mxc_epdc_fb_flush_updates(struct mxc_epdc_fb_data *fb_data);
  301. static int mxc_epdc_fb_blank(int blank, struct fb_info *info);
  302. static int mxc_epdc_fb_init_hw(struct fb_info *info);
  303. static int pxp_process_update(struct mxc_epdc_fb_data *fb_data,
  304.                   u32 src_width, u32 src_height,
  305.                   struct mxcfb_rect *update_region);
  306. static int pxp_complete_update(struct mxc_epdc_fb_data *fb_data, u32 *hist_stat);
  307.  
  308. static void draw_mode0(struct mxc_epdc_fb_data *fb_data);
  309. static bool is_free_list_full(struct mxc_epdc_fb_data *fb_data);
  310. /* 2011/06/07 FY11 : Modified to share static memory for epdc with bootloader. */
  311. static int mxc_epdc_fb_load_wf( struct mxc_epdc_fb_data *fb_data, bool from_eMMC );
  312.  
  313.  
  314. #ifdef CONFIG_SUB_MAIN_SPI
  315. /* 2011/06/01 FY11 : Added watchdog timer. */
  316. extern int sub_wdt_start(void);
  317. extern int sub_wdt_stop(void);
  318. extern int sub_wdt_clear(void);
  319. #endif /* CONFIG_SUB_MAIN_SPI */
  320.  
  321. /* 2011/06/07 FY11 : Modified to share static memory for epdc with bootloader. */
  322. #ifdef CONFIG_EPD_STATIC_MEM_WAVEFORM /* E_BOOK */
  323. extern struct resource* get_res_epd_waveform(void);
  324. #endif /* E_BOOK */
  325. #ifdef CONFIG_EPD_STATIC_MEM_WORKBUFF /* E_BOOK */
  326. extern struct resource* get_res_epd_workbuff(void);
  327. #endif /* E_BOOK */
  328.  
  329. #define DEBUG
  330.  
  331. #ifdef DEBUG
  332. static void dump_pxp_config(struct mxc_epdc_fb_data *fb_data,
  333.                 struct pxp_config_data *pxp_conf)
  334. {
  335.     dev_err(fb_data->dev, "S0 fmt 0x%x",
  336.         pxp_conf->s0_param.pixel_fmt);
  337.     dev_err(fb_data->dev, "S0 width 0x%x",
  338.         pxp_conf->s0_param.width);
  339.     dev_err(fb_data->dev, "S0 height 0x%x",
  340.         pxp_conf->s0_param.height);
  341.     dev_err(fb_data->dev, "S0 ckey 0x%x",
  342.         pxp_conf->s0_param.color_key);
  343.     dev_err(fb_data->dev, "S0 ckey en 0x%x",
  344.         pxp_conf->s0_param.color_key_enable);
  345.  
  346.     dev_err(fb_data->dev, "OL0 combine en 0x%x",
  347.         pxp_conf->ol_param[0].combine_enable);
  348.     dev_err(fb_data->dev, "OL0 fmt 0x%x",
  349.         pxp_conf->ol_param[0].pixel_fmt);
  350.     dev_err(fb_data->dev, "OL0 width 0x%x",
  351.         pxp_conf->ol_param[0].width);
  352.     dev_err(fb_data->dev, "OL0 height 0x%x",
  353.         pxp_conf->ol_param[0].height);
  354.     dev_err(fb_data->dev, "OL0 ckey 0x%x",
  355.         pxp_conf->ol_param[0].color_key);
  356.     dev_err(fb_data->dev, "OL0 ckey en 0x%x",
  357.         pxp_conf->ol_param[0].color_key_enable);
  358.     dev_err(fb_data->dev, "OL0 alpha 0x%x",
  359.         pxp_conf->ol_param[0].global_alpha);
  360.     dev_err(fb_data->dev, "OL0 alpha en 0x%x",
  361.         pxp_conf->ol_param[0].global_alpha_enable);
  362.     dev_err(fb_data->dev, "OL0 local alpha en 0x%x",
  363.         pxp_conf->ol_param[0].local_alpha_enable);
  364.  
  365.     dev_err(fb_data->dev, "Out fmt 0x%x",
  366.         pxp_conf->out_param.pixel_fmt);
  367.     dev_err(fb_data->dev, "Out width 0x%x",
  368.         pxp_conf->out_param.width);
  369.     dev_err(fb_data->dev, "Out height 0x%x",
  370.         pxp_conf->out_param.height);
  371.  
  372.     dev_err(fb_data->dev,
  373.         "drect left 0x%x right 0x%x width 0x%x height 0x%x",
  374.         pxp_conf->proc_data.drect.left, pxp_conf->proc_data.drect.top,
  375.         pxp_conf->proc_data.drect.width,
  376.         pxp_conf->proc_data.drect.height);
  377.     dev_err(fb_data->dev,
  378.         "srect left 0x%x right 0x%x width 0x%x height 0x%x",
  379.         pxp_conf->proc_data.srect.left, pxp_conf->proc_data.srect.top,
  380.         pxp_conf->proc_data.srect.width,
  381.         pxp_conf->proc_data.srect.height);
  382.     dev_err(fb_data->dev, "Scaling en 0x%x", pxp_conf->proc_data.scaling);
  383.     dev_err(fb_data->dev, "HFlip en 0x%x", pxp_conf->proc_data.hflip);
  384.     dev_err(fb_data->dev, "VFlip en 0x%x", pxp_conf->proc_data.vflip);
  385.     dev_err(fb_data->dev, "Rotation 0x%x", pxp_conf->proc_data.rotate);
  386.     dev_err(fb_data->dev, "BG Color 0x%x", pxp_conf->proc_data.bgcolor);
  387. }
  388.  
  389. static void dump_epdc_reg(void)
  390. {
  391.     printk(KERN_ERR "\n\n");
  392.     printk(KERN_ERR "EPDC_CTRL 0x%x\n", __raw_readl(EPDC_CTRL));
  393.     printk(KERN_ERR "EPDC_WVADDR 0x%x\n", __raw_readl(EPDC_WVADDR));
  394.     printk(KERN_ERR "EPDC_WB_ADDR 0x%x\n", __raw_readl(EPDC_WB_ADDR));
  395.     printk(KERN_ERR "EPDC_RES 0x%x\n", __raw_readl(EPDC_RES));
  396.     printk(KERN_ERR "EPDC_FORMAT 0x%x\n", __raw_readl(EPDC_FORMAT));
  397.     printk(KERN_ERR "EPDC_FIFOCTRL 0x%x\n", __raw_readl(EPDC_FIFOCTRL));
  398.     printk(KERN_ERR "EPDC_UPD_ADDR 0x%x\n", __raw_readl(EPDC_UPD_ADDR));
  399.     printk(KERN_ERR "EPDC_UPD_FIXED 0x%x\n", __raw_readl(EPDC_UPD_FIXED));
  400.     printk(KERN_ERR "EPDC_UPD_CORD 0x%x\n", __raw_readl(EPDC_UPD_CORD));
  401.     printk(KERN_ERR "EPDC_UPD_SIZE 0x%x\n", __raw_readl(EPDC_UPD_SIZE));
  402.     printk(KERN_ERR "EPDC_UPD_CTRL 0x%x\n", __raw_readl(EPDC_UPD_CTRL));
  403.     printk(KERN_ERR "EPDC_TEMP 0x%x\n", __raw_readl(EPDC_TEMP));
  404.     printk(KERN_ERR "EPDC_TCE_CTRL 0x%x\n", __raw_readl(EPDC_TCE_CTRL));
  405.     printk(KERN_ERR "EPDC_TCE_SDCFG 0x%x\n", __raw_readl(EPDC_TCE_SDCFG));
  406.     printk(KERN_ERR "EPDC_TCE_GDCFG 0x%x\n", __raw_readl(EPDC_TCE_GDCFG));
  407.     printk(KERN_ERR "EPDC_TCE_HSCAN1 0x%x\n", __raw_readl(EPDC_TCE_HSCAN1));
  408.     printk(KERN_ERR "EPDC_TCE_HSCAN2 0x%x\n", __raw_readl(EPDC_TCE_HSCAN2));
  409.     printk(KERN_ERR "EPDC_TCE_VSCAN 0x%x\n", __raw_readl(EPDC_TCE_VSCAN));
  410.     printk(KERN_ERR "EPDC_TCE_OE 0x%x\n", __raw_readl(EPDC_TCE_OE));
  411.     printk(KERN_ERR "EPDC_TCE_POLARITY 0x%x\n", __raw_readl(EPDC_TCE_POLARITY));
  412.     printk(KERN_ERR "EPDC_TCE_TIMING1 0x%x\n", __raw_readl(EPDC_TCE_TIMING1));
  413.     printk(KERN_ERR "EPDC_TCE_TIMING2 0x%x\n", __raw_readl(EPDC_TCE_TIMING2));
  414.     printk(KERN_ERR "EPDC_TCE_TIMING3 0x%x\n", __raw_readl(EPDC_TCE_TIMING3));
  415.     printk(KERN_ERR "EPDC_IRQ_MASK 0x%x\n", __raw_readl(EPDC_IRQ_MASK));
  416.     printk(KERN_ERR "EPDC_IRQ 0x%x\n", __raw_readl(EPDC_IRQ));
  417.     printk(KERN_ERR "EPDC_STATUS_LUTS 0x%x\n", __raw_readl(EPDC_STATUS_LUTS));
  418.     printk(KERN_ERR "EPDC_STATUS_NEXTLUT 0x%x\n", __raw_readl(EPDC_STATUS_NEXTLUT));
  419.     printk(KERN_ERR "EPDC_STATUS_COL 0x%x\n", __raw_readl(EPDC_STATUS_COL));
  420.     printk(KERN_ERR "EPDC_STATUS 0x%x\n", __raw_readl(EPDC_STATUS));
  421.     printk(KERN_ERR "EPDC_DEBUG 0x%x\n", __raw_readl(EPDC_DEBUG));
  422.     printk(KERN_ERR "EPDC_DEBUG_LUT0 0x%x\n", __raw_readl(EPDC_DEBUG_LUT0));
  423.     printk(KERN_ERR "EPDC_DEBUG_LUT1 0x%x\n", __raw_readl(EPDC_DEBUG_LUT1));
  424.     printk(KERN_ERR "EPDC_DEBUG_LUT2 0x%x\n", __raw_readl(EPDC_DEBUG_LUT2));
  425.     printk(KERN_ERR "EPDC_DEBUG_LUT3 0x%x\n", __raw_readl(EPDC_DEBUG_LUT3));
  426.     printk(KERN_ERR "EPDC_DEBUG_LUT4 0x%x\n", __raw_readl(EPDC_DEBUG_LUT4));
  427.     printk(KERN_ERR "EPDC_DEBUG_LUT5 0x%x\n", __raw_readl(EPDC_DEBUG_LUT5));
  428.     printk(KERN_ERR "EPDC_DEBUG_LUT6 0x%x\n", __raw_readl(EPDC_DEBUG_LUT6));
  429.     printk(KERN_ERR "EPDC_DEBUG_LUT7 0x%x\n", __raw_readl(EPDC_DEBUG_LUT7));
  430.     printk(KERN_ERR "EPDC_DEBUG_LUT8 0x%x\n", __raw_readl(EPDC_DEBUG_LUT8));
  431.     printk(KERN_ERR "EPDC_DEBUG_LUT9 0x%x\n", __raw_readl(EPDC_DEBUG_LUT9));
  432.     printk(KERN_ERR "EPDC_DEBUG_LUT10 0x%x\n", __raw_readl(EPDC_DEBUG_LUT10));
  433.     printk(KERN_ERR "EPDC_DEBUG_LUT11 0x%x\n", __raw_readl(EPDC_DEBUG_LUT11));
  434.     printk(KERN_ERR "EPDC_DEBUG_LUT12 0x%x\n", __raw_readl(EPDC_DEBUG_LUT12));
  435.     printk(KERN_ERR "EPDC_DEBUG_LUT13 0x%x\n", __raw_readl(EPDC_DEBUG_LUT13));
  436.     printk(KERN_ERR "EPDC_DEBUG_LUT14 0x%x\n", __raw_readl(EPDC_DEBUG_LUT14));
  437.     printk(KERN_ERR "EPDC_DEBUG_LUT15 0x%x\n", __raw_readl(EPDC_DEBUG_LUT15));
  438.     printk(KERN_ERR "EPDC_GPIO 0x%x\n", __raw_readl(EPDC_GPIO));
  439.     printk(KERN_ERR "EPDC_VERSION 0x%x\n", __raw_readl(EPDC_VERSION));
  440.     printk(KERN_ERR "\n\n");
  441. }
  442.  
  443. static void dump_update_data(struct device *dev,
  444.                  struct update_data_list *upd_data_list)
  445. {
  446.     dev_err(dev,
  447.         "X = %d, Y = %d, Width = %d, Height = %d, WaveMode = %d, UpdateMode = %d, Flag = %d, "
  448.         "LUT = %d, Coll Mask = 0x%x, order = %d\n",
  449.         upd_data_list->upd_data.update_region.left,
  450.         upd_data_list->upd_data.update_region.top,
  451.         upd_data_list->upd_data.update_region.width,
  452.         upd_data_list->upd_data.update_region.height,
  453.         upd_data_list->upd_data.waveform_mode,
  454.         upd_data_list->upd_data.update_mode,
  455.         upd_data_list->upd_data.flags,
  456.         upd_data_list->lut_num,
  457.         upd_data_list->collision_mask,
  458.         upd_data_list->update_order);
  459. }
  460.  
  461. static void dump_collision_list(struct mxc_epdc_fb_data *fb_data)
  462. {
  463.     struct update_data_list *plist;
  464.  
  465.     dev_err(fb_data->dev, "Collision List:\n");
  466.     if (list_empty(&fb_data->upd_buf_collision_list->list))
  467.         dev_err(fb_data->dev, "Empty");
  468.     list_for_each_entry(plist, &fb_data->upd_buf_collision_list->list, list) {
  469.         dev_err(fb_data->dev, "Virt Addr = 0x%x, Phys Addr = 0x%x ",
  470.             (u32)plist->virt_addr, plist->phys_addr);
  471.         dump_update_data(fb_data->dev, plist);
  472.     }
  473. }
  474.  
  475. static void dump_free_list(struct mxc_epdc_fb_data *fb_data)
  476. {
  477.     struct update_data_list *plist;
  478.  
  479.     dev_err(fb_data->dev, "Free List:\n");
  480.     if (list_empty(&fb_data->upd_buf_free_list->list))
  481.         dev_err(fb_data->dev, "Empty");
  482.     list_for_each_entry(plist, &fb_data->upd_buf_free_list->list, list) {
  483.         dev_err(fb_data->dev, "Virt Addr = 0x%x, Phys Addr = 0x%x ",
  484.             (u32)plist->virt_addr, plist->phys_addr);
  485.         dump_update_data(fb_data->dev, plist);
  486.     }
  487. }
  488.  
  489. static void dump_queue(struct mxc_epdc_fb_data *fb_data)
  490. {
  491.     struct update_data_list *plist;
  492.  
  493.     dev_err(fb_data->dev, "Queue:\n");
  494.     if (list_empty(&fb_data->upd_buf_queue->list))
  495.         dev_err(fb_data->dev, "Empty");
  496.     list_for_each_entry(plist, &fb_data->upd_buf_queue->list, list) {
  497.         dev_err(fb_data->dev, "Virt Addr = 0x%x, Phys Addr = 0x%x ",
  498.             (u32)plist->virt_addr, plist->phys_addr);
  499.         dump_update_data(fb_data->dev, plist);
  500.     }
  501. }
  502.  
  503. static void dump_all_updates(struct mxc_epdc_fb_data *fb_data)
  504. {
  505.     dump_free_list(fb_data);
  506.     dump_queue(fb_data);
  507.     dump_collision_list(fb_data);
  508.     dev_err(fb_data->dev, "Current update being processed:\n");
  509.     if (fb_data->cur_update == NULL)
  510.         dev_err(fb_data->dev, "No current update\n");
  511.     else
  512.         dump_update_data(fb_data->dev, fb_data->cur_update);
  513. }
  514. #else
  515. static inline void dump_pxp_config(struct mxc_epdc_fb_data *fb_data,
  516.                    struct pxp_config_data *pxp_conf) {}
  517. static inline void dump_epdc_reg(void) {}
  518. static inline void dump_update_data(struct device *dev,
  519.                  struct update_data_list *upd_data_list) {}
  520. static inline void dump_collision_list(struct mxc_epdc_fb_data *fb_data) {}
  521. static inline void dump_free_list(struct mxc_epdc_fb_data *fb_data) {}
  522. static inline void dump_queue(struct mxc_epdc_fb_data *fb_data) {}
  523. static inline void dump_all_updates(struct mxc_epdc_fb_data *fb_data) {}
  524.  
  525. #endif
  526.  
  527. static  ssize_t store_epdc_debug(struct device *device,
  528.                 struct device_attribute *attr,
  529.                 const char *buf, size_t count);
  530. static ssize_t show_epdc_debug(struct device *device,
  531.                 struct device_attribute *attr, char *buf);
  532. static struct device_attribute epdc_debug_attr = __ATTR(epdc_debug, S_IRUGO|S_IWUSR, show_epdc_debug, store_epdc_debug);
  533. static u32 epdc_debug = 0;
  534. #define epdc_debug_printk(fmt, args...) if (epdc_debug) printk(KERN_ERR "%s: " fmt, __func__, ## args)
  535.  
  536.  
  537. /********************************************************
  538.  * Start Low-Level EPDC Functions
  539.  ********************************************************/
  540. static  ssize_t store_epdc_debug(struct device *device,
  541.                 struct device_attribute *attr,
  542.                 const char *buf, size_t count)
  543. {              
  544.         u32 state;
  545.         char *last = NULL;
  546.  
  547.     state = simple_strtoul(buf, &last, 0);
  548.     printk( KERN_ERR "%s val = %u\n", __func__, state );
  549.     if ( state < 2 )
  550.     {
  551.         epdc_debug = state;
  552.     }
  553.  
  554.     return count;
  555. }
  556.  
  557. static int epdc_clock_gating ( bool gating );
  558. static ssize_t show_epdc_debug(struct device *device,
  559.                 struct device_attribute *attr, char *buf)
  560. {
  561.     if ( epdc_fb_data )
  562.     {
  563.         unsigned long flags;
  564.         clk_enable(epdc_fb_data->epdc_clk_axi);
  565.         epdc_clock_gating(false);       // enable clock
  566.         spin_lock_irqsave(&(epdc_fb_data->queue_lock), flags);
  567.         dump_epdc_reg();
  568.         dump_all_updates(epdc_fb_data);
  569.         spin_unlock_irqrestore(&(epdc_fb_data->queue_lock), flags);
  570.         epdc_clock_gating(true);
  571.         clk_disable(epdc_fb_data->epdc_clk_axi);
  572.     }
  573.  
  574.         return snprintf(buf, PAGE_SIZE, "%u\n", epdc_debug);
  575. }
  576.  
  577.  
  578. /* 2011/06/14 FY11 : Modified to handle epdc clock access count. */
  579. static int epdc_clock_gate_cnt = 0;
  580. static int epdc_clock_gating ( bool gating )
  581. {
  582.     int ret = 0;
  583.  
  584.     if ( gating )
  585.     {
  586.         if ( epdc_clock_gate_cnt == 0 )
  587.         {
  588.             printk (KERN_ERR "%s Invalid gate count!!\n", __func__ );
  589.         }
  590.         else
  591.         {
  592.             epdc_clock_gate_cnt--;
  593.             epdc_debug_printk( " gate cnt down (%d)\n", epdc_clock_gate_cnt );
  594.             if ( epdc_clock_gate_cnt == 0 )
  595.             {
  596.                 __raw_writel(EPDC_CTRL_CLKGATE, EPDC_CTRL_SET);
  597.             }
  598.         }
  599.     }
  600.     else
  601.     {
  602.         if ( epdc_clock_gate_cnt == 0 )
  603.         {
  604.             __raw_writel(EPDC_CTRL_CLKGATE, EPDC_CTRL_CLEAR);
  605.         }
  606.         epdc_clock_gate_cnt++;
  607.         epdc_debug_printk( " gate cnt up (%d)\n", epdc_clock_gate_cnt );
  608.     }
  609.  
  610.     return ret;
  611. }
  612.  
  613.  
  614. static inline void epdc_lut_complete_intr(u32 lut_num, bool enable)
  615. {
  616.     if (enable)
  617.         __raw_writel(1 << lut_num, EPDC_IRQ_MASK_SET);
  618.     else
  619.         __raw_writel(1 << lut_num, EPDC_IRQ_MASK_CLEAR);
  620. }
  621.  
  622. static inline void epdc_working_buf_intr(bool enable)
  623. {
  624.     if (enable)
  625.         __raw_writel(EPDC_IRQ_WB_CMPLT_IRQ, EPDC_IRQ_MASK_SET);
  626.     else
  627.         __raw_writel(EPDC_IRQ_WB_CMPLT_IRQ, EPDC_IRQ_MASK_CLEAR);
  628. }
  629.  
  630. static inline void epdc_clear_working_buf_irq(void)
  631. {
  632.     __raw_writel(EPDC_IRQ_WB_CMPLT_IRQ | EPDC_IRQ_LUT_COL_IRQ,
  633.              EPDC_IRQ_CLEAR);
  634. }
  635.  
  636. static inline void epdc_eof_intr(bool enable)
  637. {
  638.     if (enable)
  639.         __raw_writel(EPDC_IRQ_FRAME_END_IRQ, EPDC_IRQ_MASK_SET);
  640.     else
  641.         __raw_writel(EPDC_IRQ_FRAME_END_IRQ, EPDC_IRQ_MASK_CLEAR);
  642. }
  643.  
  644. static inline void epdc_clear_eof_irq(void)
  645. {
  646.     __raw_writel(EPDC_IRQ_FRAME_END_IRQ, EPDC_IRQ_CLEAR);
  647. }
  648.  
  649. static inline bool epdc_signal_eof(void)
  650. {
  651.     return (__raw_readl(EPDC_IRQ_MASK) & __raw_readl(EPDC_IRQ)
  652.         & EPDC_IRQ_FRAME_END_IRQ) ? true : false;
  653. }
  654.  
  655.  
  656. static inline void epdc_set_temp(u32 temp)
  657. {
  658.     __raw_writel(temp, EPDC_TEMP);
  659. }
  660.  
  661. static inline void epdc_set_border_gpio(u32 mode)
  662. {
  663.     u32 val = ((__raw_readl(EPDC_GPIO) & ~EPDC_GPIO_BDR_MASK)| ((mode << EPDC_GPIO_BDR_OFFSET) & EPDC_GPIO_BDR_MASK));
  664.     __raw_writel(val, EPDC_GPIO);
  665. }
  666.  
  667. static inline void epdc_set_screen_res(u32 width, u32 height)
  668. {
  669.     u32 val = (height << EPDC_RES_VERTICAL_OFFSET) | width;
  670.     __raw_writel(val, EPDC_RES);
  671. }
  672.  
  673. static inline void epdc_set_update_addr(u32 addr)
  674. {
  675.     __raw_writel(addr, EPDC_UPD_ADDR);
  676. }
  677.  
  678. static inline void epdc_set_update_coord(u32 x, u32 y)
  679. {
  680.     u32 val = (y << EPDC_UPD_CORD_YCORD_OFFSET) | x;
  681.     __raw_writel(val, EPDC_UPD_CORD);
  682. }
  683.  
  684. static inline void epdc_set_update_dimensions(u32 width, u32 height)
  685. {
  686.     u32 val = (height << EPDC_UPD_SIZE_HEIGHT_OFFSET) | width;
  687.     __raw_writel(val, EPDC_UPD_SIZE);
  688. }
  689.  
  690. static void epdc_submit_update(u32 lut_num, u32 waveform_mode, u32 update_mode,
  691.                    bool use_test_mode, u32 np_val)
  692. {
  693.     u32 reg_val = 0;
  694.     int ret = 0;
  695.  
  696.     if (use_test_mode) {
  697.         reg_val |=
  698.             ((np_val << EPDC_UPD_FIXED_FIXNP_OFFSET) &
  699.              EPDC_UPD_FIXED_FIXNP_MASK) | EPDC_UPD_FIXED_FIXNP_EN;
  700.  
  701.         __raw_writel(reg_val, EPDC_UPD_FIXED);
  702.  
  703.         reg_val = EPDC_UPD_CTRL_USE_FIXED;
  704.     } else {
  705.         __raw_writel(reg_val, EPDC_UPD_FIXED);
  706.     }
  707.  
  708.     reg_val |=
  709.         ((lut_num << EPDC_UPD_CTRL_LUT_SEL_OFFSET) &
  710.          EPDC_UPD_CTRL_LUT_SEL_MASK) |
  711.         ((waveform_mode << EPDC_UPD_CTRL_WAVEFORM_MODE_OFFSET) &
  712.          EPDC_UPD_CTRL_WAVEFORM_MODE_MASK) |
  713.         update_mode;
  714.  
  715.     __raw_writel(reg_val, EPDC_UPD_CTRL);
  716.  
  717.  
  718. #ifdef CONFIG_SUB_MAIN_SPI
  719. /* 2011/06/01 FY11 : Added watchdog timer. */
  720.     epdc_debug_printk( " watchdog clear.\n" );
  721.     ret = sub_wdt_clear();
  722.     if ( ret < 0 )
  723.     {
  724.         printk(KERN_ERR "%s fale to clear watchdog. err = 0x%x\n", __func__, ret);
  725.     }
  726. #endif /* CONFIG_SUB_MAIN_SPI */
  727. }
  728.  
  729. static inline bool epdc_is_lut_complete(u32 lut_num)
  730. {
  731.     u32 val = __raw_readl(EPDC_IRQ);
  732.     bool is_compl = val & (1 << lut_num) ? true : false;
  733.  
  734.     return is_compl;
  735. }
  736.  
  737. static inline void epdc_clear_lut_complete_irq(u32 lut_num)
  738. {
  739.     __raw_writel(1 << lut_num, EPDC_IRQ_CLEAR);
  740. }
  741.  
  742. static inline bool epdc_is_lut_active(u32 lut_num)
  743. {
  744.     u32 val = __raw_readl(EPDC_STATUS_LUTS);
  745.     bool is_active = val & (1 << lut_num) ? true : false;
  746.  
  747.     return is_active;
  748. }
  749.  
  750. static inline bool epdc_any_luts_active(void)
  751. {
  752.     bool any_active = __raw_readl(EPDC_STATUS_LUTS) ? true : false;
  753.  
  754.     return any_active;
  755. }
  756.  
  757. static inline bool epdc_any_luts_available(void)
  758. {
  759.     bool luts_available =
  760.         (__raw_readl(EPDC_STATUS_NEXTLUT) &
  761.          EPDC_STATUS_NEXTLUT_NEXT_LUT_VALID) ? true : false;
  762.     return luts_available;
  763. }
  764.  
  765. static inline int epdc_get_next_lut(void)
  766. {
  767.     u32 val =
  768.         __raw_readl(EPDC_STATUS_NEXTLUT) &
  769.         EPDC_STATUS_NEXTLUT_NEXT_LUT_MASK;
  770.     return val;
  771. }
  772.  
  773. static int epdc_choose_next_lut(int *next_lut)
  774. {
  775.     u32 luts_status = __raw_readl(EPDC_STATUS_LUTS);
  776.  
  777.     *next_lut = 32 - __builtin_clz(luts_status & 0xFFFF);
  778.  
  779.     if (*next_lut > 15)
  780.         *next_lut = ffz(luts_status & 0xFFFF);
  781.  
  782.     if (luts_status & 0x8000)
  783.         return 1;
  784.     else
  785.         return 0;
  786. }
  787.  
  788.  
  789. static inline bool epdc_is_working_buffer_busy(void)
  790. {
  791.     u32 val = __raw_readl(EPDC_STATUS);
  792.     bool is_busy = (val & EPDC_STATUS_WB_BUSY) ? true : false;
  793.  
  794.     return is_busy;
  795. }
  796.  
  797. static inline bool epdc_is_working_buffer_complete(void)
  798. {
  799.     u32 val = __raw_readl(EPDC_IRQ);
  800.     bool is_compl = (val & EPDC_IRQ_WB_CMPLT_IRQ) ? true : false;
  801.  
  802.     return is_compl;
  803. }
  804.  
  805. static inline bool epdc_is_collision(void)
  806. {
  807.     u32 val = __raw_readl(EPDC_IRQ);
  808.     return (val & EPDC_IRQ_LUT_COL_IRQ) ? true : false;
  809. }
  810.  
  811. static inline int epdc_get_colliding_luts(void)
  812. {
  813.     u32 val = __raw_readl(EPDC_STATUS_COL);
  814.     return val;
  815. }
  816.  
  817. static void epdc_set_horizontal_timing(u32 horiz_start, u32 horiz_end,
  818.                        u32 hsync_width, u32 hsync_line_length)
  819. {
  820.     u32 reg_val =
  821.         ((hsync_width << EPDC_TCE_HSCAN1_LINE_SYNC_WIDTH_OFFSET) &
  822.          EPDC_TCE_HSCAN1_LINE_SYNC_WIDTH_MASK)
  823.         | ((hsync_line_length << EPDC_TCE_HSCAN1_LINE_SYNC_OFFSET) &
  824.            EPDC_TCE_HSCAN1_LINE_SYNC_MASK);
  825.     __raw_writel(reg_val, EPDC_TCE_HSCAN1);
  826.  
  827.     reg_val =
  828.         ((horiz_start << EPDC_TCE_HSCAN2_LINE_BEGIN_OFFSET) &
  829.          EPDC_TCE_HSCAN2_LINE_BEGIN_MASK)
  830.         | ((horiz_end << EPDC_TCE_HSCAN2_LINE_END_OFFSET) &
  831.            EPDC_TCE_HSCAN2_LINE_END_MASK);
  832.     __raw_writel(reg_val, EPDC_TCE_HSCAN2);
  833. }
  834.  
  835. static void epdc_set_vertical_timing(u32 vert_start, u32 vert_end,
  836.                      u32 vsync_width)
  837. {
  838.     u32 reg_val =
  839.         ((vert_start << EPDC_TCE_VSCAN_FRAME_BEGIN_OFFSET) &
  840.          EPDC_TCE_VSCAN_FRAME_BEGIN_MASK)
  841.         | ((vert_end << EPDC_TCE_VSCAN_FRAME_END_OFFSET) &
  842.            EPDC_TCE_VSCAN_FRAME_END_MASK)
  843.         | ((vsync_width << EPDC_TCE_VSCAN_FRAME_SYNC_OFFSET) &
  844.            EPDC_TCE_VSCAN_FRAME_SYNC_MASK);
  845.     __raw_writel(reg_val, EPDC_TCE_VSCAN);
  846. }
  847.  
  848. void epdc_init_settings(struct mxc_epdc_fb_data *fb_data)
  849. {
  850.     struct mxc_epdc_fb_mode *epdc_mode = fb_data->cur_mode;
  851.     struct fb_var_screeninfo *screeninfo = &fb_data->epdc_fb_var;
  852.     u32 reg_val;
  853.     int num_ce;
  854.  
  855.     /* Reset */
  856.     __raw_writel(EPDC_CTRL_SFTRST, EPDC_CTRL_SET);
  857.     while (!(__raw_readl(EPDC_CTRL) & EPDC_CTRL_CLKGATE))
  858.         ;
  859.     __raw_writel(EPDC_CTRL_SFTRST, EPDC_CTRL_CLEAR);
  860.  
  861.     /* Enable clock gating (clear to enable) */
  862.     __raw_writel(EPDC_CTRL_CLKGATE, EPDC_CTRL_CLEAR);
  863.     while (__raw_readl(EPDC_CTRL) & (EPDC_CTRL_SFTRST | EPDC_CTRL_CLKGATE))
  864.         ;
  865.  
  866.     /* EPDC_CTRL */
  867.     reg_val = __raw_readl(EPDC_CTRL);
  868.     reg_val &= ~EPDC_CTRL_UPD_DATA_SWIZZLE_MASK;
  869.     reg_val |= EPDC_CTRL_UPD_DATA_SWIZZLE_NO_SWAP;
  870.     reg_val &= ~EPDC_CTRL_LUT_DATA_SWIZZLE_MASK;
  871.     reg_val |= EPDC_CTRL_LUT_DATA_SWIZZLE_NO_SWAP;
  872.     __raw_writel(reg_val, EPDC_CTRL_SET);
  873.  
  874.     /* EPDC_FORMAT - 2bit TFT and 4bit Buf pixel format */
  875.     reg_val = EPDC_FORMAT_TFT_PIXEL_FORMAT_2BIT
  876.         | EPDC_FORMAT_BUF_PIXEL_FORMAT_P4N
  877.         | ((0x0 << EPDC_FORMAT_DEFAULT_TFT_PIXEL_OFFSET) &
  878.            EPDC_FORMAT_DEFAULT_TFT_PIXEL_MASK);
  879.     __raw_writel(reg_val, EPDC_FORMAT);
  880.  
  881.     /* EPDC_FIFOCTRL (disabled) */
  882.     reg_val =
  883.         ((100 << EPDC_FIFOCTRL_FIFO_INIT_LEVEL_OFFSET) &
  884.          EPDC_FIFOCTRL_FIFO_INIT_LEVEL_MASK)
  885.         | ((200 << EPDC_FIFOCTRL_FIFO_H_LEVEL_OFFSET) &
  886.            EPDC_FIFOCTRL_FIFO_H_LEVEL_MASK)
  887.         | ((100 << EPDC_FIFOCTRL_FIFO_L_LEVEL_OFFSET) &
  888.            EPDC_FIFOCTRL_FIFO_L_LEVEL_MASK);
  889.     __raw_writel(reg_val, EPDC_FIFOCTRL);
  890.  
  891.     /* EPDC_TEMP - Use default temp to get index */
  892.     epdc_set_temp(mxc_epdc_fb_get_temp_index(fb_data, DEFAULT_TEMP));
  893.  
  894.     /* EPDC_RES */
  895.     epdc_set_screen_res(epdc_mode->vmode->xres, epdc_mode->vmode->yres);
  896.  
  897.     /*
  898.      * EPDC_TCE_CTRL
  899.      * VSCAN_HOLDOFF = 4
  900.      * VCOM_MODE = MANUAL
  901.      * VCOM_VAL = 0
  902.      * DDR_MODE = DISABLED
  903.      * LVDS_MODE_CE = DISABLED
  904.      * LVDS_MODE = DISABLED
  905.      * DUAL_SCAN = DISABLED
  906.      * SDDO_WIDTH = 8bit
  907.      * PIXELS_PER_SDCLK = 4
  908.      */
  909.     reg_val =
  910.         ((epdc_mode->vscan_holdoff << EPDC_TCE_CTRL_VSCAN_HOLDOFF_OFFSET) &
  911.          EPDC_TCE_CTRL_VSCAN_HOLDOFF_MASK)
  912.         | EPDC_TCE_CTRL_PIXELS_PER_SDCLK_4;
  913.     __raw_writel(reg_val, EPDC_TCE_CTRL);
  914.  
  915.     /* EPDC_TCE_HSCAN */
  916.     epdc_set_horizontal_timing(screeninfo->left_margin,
  917.                    screeninfo->right_margin,
  918.                    screeninfo->hsync_len,
  919.                    screeninfo->hsync_len);
  920.  
  921.     /* EPDC_TCE_VSCAN */
  922.     epdc_set_vertical_timing(screeninfo->upper_margin,
  923.                  screeninfo->lower_margin,
  924.                  screeninfo->vsync_len);
  925.  
  926.     /* EPDC_TCE_OE */
  927.     reg_val =
  928.         ((epdc_mode->sdoed_width << EPDC_TCE_OE_SDOED_WIDTH_OFFSET) &
  929.          EPDC_TCE_OE_SDOED_WIDTH_MASK)
  930.         | ((epdc_mode->sdoed_delay << EPDC_TCE_OE_SDOED_DLY_OFFSET) &
  931.            EPDC_TCE_OE_SDOED_DLY_MASK)
  932.         | ((epdc_mode->sdoez_width << EPDC_TCE_OE_SDOEZ_WIDTH_OFFSET) &
  933.            EPDC_TCE_OE_SDOEZ_WIDTH_MASK)
  934.         | ((epdc_mode->sdoez_delay << EPDC_TCE_OE_SDOEZ_DLY_OFFSET) &
  935.            EPDC_TCE_OE_SDOEZ_DLY_MASK);
  936.     __raw_writel(reg_val, EPDC_TCE_OE);
  937.  
  938.     /* EPDC_TCE_TIMING1 */
  939.     __raw_writel(0x0, EPDC_TCE_TIMING1);
  940.  
  941.     /* EPDC_TCE_TIMING2 */
  942.     reg_val =
  943.         ((epdc_mode->gdclk_hp_offs << EPDC_TCE_TIMING2_GDCLK_HP_OFFSET) &
  944.          EPDC_TCE_TIMING2_GDCLK_HP_MASK)
  945.         | ((epdc_mode->gdsp_offs << EPDC_TCE_TIMING2_GDSP_OFFSET_OFFSET) &
  946.            EPDC_TCE_TIMING2_GDSP_OFFSET_MASK);
  947.     __raw_writel(reg_val, EPDC_TCE_TIMING2);
  948.  
  949.     /* EPDC_TCE_TIMING3 */
  950.     reg_val =
  951.         ((epdc_mode->gdoe_offs << EPDC_TCE_TIMING3_GDOE_OFFSET_OFFSET) &
  952.          EPDC_TCE_TIMING3_GDOE_OFFSET_MASK)
  953.         | ((epdc_mode->gdclk_offs << EPDC_TCE_TIMING3_GDCLK_OFFSET_OFFSET) &
  954.            EPDC_TCE_TIMING3_GDCLK_OFFSET_MASK);
  955.     __raw_writel(reg_val, EPDC_TCE_TIMING3);
  956.  
  957.     /*
  958.      * EPDC_TCE_SDCFG
  959.      * SDCLK_HOLD = 1
  960.      * SDSHR = 1
  961.      * NUM_CE = 1
  962.      * SDDO_REFORMAT = FLIP_PIXELS
  963.      * SDDO_INVERT = DISABLED
  964.      * PIXELS_PER_CE = display horizontal resolution
  965.      */
  966.     num_ce = epdc_mode->num_ce;
  967.     if (num_ce == 0)
  968.         num_ce = 1;
  969.     reg_val = EPDC_TCE_SDCFG_SDCLK_HOLD | EPDC_TCE_SDCFG_SDSHR
  970.         | ((num_ce << EPDC_TCE_SDCFG_NUM_CE_OFFSET) &
  971.            EPDC_TCE_SDCFG_NUM_CE_MASK)
  972.         | EPDC_TCE_SDCFG_SDDO_REFORMAT_FLIP_PIXELS
  973.         | ((epdc_mode->vmode->xres/num_ce << EPDC_TCE_SDCFG_PIXELS_PER_CE_OFFSET) &
  974.            EPDC_TCE_SDCFG_PIXELS_PER_CE_MASK);
  975.     __raw_writel(reg_val, EPDC_TCE_SDCFG);
  976.  
  977.     /*
  978.      * EPDC_TCE_GDCFG
  979.      * GDRL = 1
  980.      * GDOE_MODE = 0;
  981.      * GDSP_MODE = 0;
  982.      */
  983.     reg_val = EPDC_TCE_SDCFG_GDRL;
  984.     __raw_writel(reg_val, EPDC_TCE_GDCFG);
  985.  
  986.     /*
  987.      * EPDC_TCE_POLARITY
  988.      * SDCE_POL = ACTIVE LOW
  989.      * SDLE_POL = ACTIVE HIGH
  990.      * SDOE_POL = ACTIVE HIGH
  991.      * GDOE_POL = ACTIVE HIGH
  992.      * GDSP_POL = ACTIVE LOW
  993.      */
  994.     reg_val = EPDC_TCE_POLARITY_SDLE_POL_ACTIVE_HIGH
  995.         | EPDC_TCE_POLARITY_SDOE_POL_ACTIVE_HIGH
  996.         | EPDC_TCE_POLARITY_GDOE_POL_ACTIVE_HIGH;
  997.     __raw_writel(reg_val, EPDC_TCE_POLARITY);
  998.  
  999.     /* EPDC_IRQ_MASK */
  1000.     __raw_writel(EPDC_IRQ_TCE_UNDERRUN_IRQ, EPDC_IRQ_MASK);
  1001.  
  1002.     /*
  1003.      * EPDC_GPIO
  1004.      * PWRCOM = ?
  1005.      * PWRCTRL = ?
  1006.      * BDR = ?
  1007.      */
  1008.     reg_val = ((0 << EPDC_GPIO_PWRCTRL_OFFSET) & EPDC_GPIO_PWRCTRL_MASK)
  1009.         | ((0 << EPDC_GPIO_BDR_OFFSET) & EPDC_GPIO_BDR_MASK);
  1010.     __raw_writel(reg_val, EPDC_GPIO);
  1011. }
  1012.  
  1013. /* 2011/06/29 FY11 : Added workaround for too hot EPD PMIC. */
  1014. static int epdc_powerup_err_cnt = 0;
  1015. #define EPDC_PROHIBITION_THRESH 10
  1016.  
  1017. /* 2011/03/09 FY11 : Fixed the bug that CPU hangs caused by accessing to EPDC without clock. */
  1018. static int epdc_powerup(struct mxc_epdc_fb_data *fb_data)
  1019. {
  1020.     int ret = 0;
  1021. /* 2011/03/22 FY11 : Added retry to powerup. */
  1022.     int retry = POWERUP_RETRY;
  1023.     mutex_lock(&fb_data->power_mutex);
  1024.  
  1025. /* 2011/06/29 FY11 : Added workaround for too hot EPD PMIC. */
  1026.     if ( epdc_powerup_err_cnt >= EPDC_PROHIBITION_THRESH )
  1027.     {
  1028.         ret = -EIO;
  1029.         mutex_unlock(&fb_data->power_mutex);
  1030. /* 2011/07/05 FY11 : Added VSYS disable. */
  1031.         regulator_disable(fb_data->vsys_regulator);
  1032.         printk( "%s : The use of EPD PMIC is prohibited.\n", __func__ );
  1033.         return ret;
  1034.     }
  1035.  
  1036.     /*
  1037.      * If power down request is pending, clear
  1038.      * powering_down to cancel the request.
  1039.      */
  1040.     if (fb_data->powering_down)
  1041.     {
  1042. /* 2011/07/12 FY11 : Added cancel scheduled powerdown. */
  1043.         cancel_delayed_work( &(fb_data->epdc_done_work) );
  1044.         fb_data->powering_down = false;
  1045.     }
  1046.  
  1047.     if (fb_data->power_state == POWER_STATE_ON) {
  1048.         mutex_unlock(&fb_data->power_mutex);
  1049.         epdc_debug_printk( " power is already on.\n" );
  1050.         return ret;
  1051.     }
  1052.  
  1053.     dev_dbg(fb_data->dev, "EPDC Powerup\n");
  1054.     epdc_debug_printk( " \n" );
  1055.  
  1056. /* 2011/03/22 FY11 : Added retry to powerup. */
  1057. retry_start:
  1058.     /* Enable power to the EPD panel */
  1059.     ret = regulator_enable(fb_data->display_regulator);
  1060.     if ( ret < 0 ) {
  1061.         dev_err(fb_data->dev, "Unable to enable DISPLAY regulator."
  1062.             "err = 0x%x\n", ret);
  1063.         goto err_out2;
  1064.     }
  1065.  
  1066.     ret = regulator_enable(fb_data->v3p3_regulator);
  1067.     if ( ret < 0 )
  1068.     {
  1069.         printk (KERN_ERR "V3P3 regulator_enable failed. %d\n", ret );
  1070.         goto err_out2;
  1071.     }
  1072.  
  1073.     /* Enable pins used by EPDC */
  1074.     if (fb_data->pdata->enable_pins)
  1075.         fb_data->pdata->enable_pins();
  1076.  
  1077.     /* Enable clocks to EPDC */
  1078.     clk_enable(fb_data->epdc_clk_axi);
  1079.     clk_enable(fb_data->epdc_clk_pix);
  1080.  
  1081. /* 2011/06/14 FY11 : Modified to handle epdc clock access count. */
  1082.     epdc_clock_gating(false);   // enable clock
  1083.  
  1084.  
  1085.     ret = regulator_enable(fb_data->epd_pwr0_regulator);
  1086.     if ( ret < 0 ) {
  1087.         dev_err(fb_data->dev, "Unable to enable PWR0 regulator."
  1088.             "err = 0x%x\n", ret);
  1089.         goto err_out3;
  1090.     }
  1091.     ret = regulator_enable(fb_data->vcom_regulator);
  1092.     if ( ret < 0 ) {
  1093.         dev_err(fb_data->dev, "Unable to enable VCOM regulator."
  1094.             "err = 0x%x\n", ret);
  1095.         goto err_out4;
  1096.     }
  1097.  
  1098.     fb_data->power_state = POWER_STATE_ON;
  1099. #ifdef CONFIG_SUB_MAIN_SPI
  1100. /* 2011/06/01 FY11 : Added watchdog timer. */
  1101.     epdc_debug_printk( " watchdog start.\n" );
  1102.     ret = sub_wdt_start();
  1103.     if ( ret < 0 )
  1104.     {
  1105.         dev_err(fb_data->dev, "fale to start watchdog. "
  1106.             "err = 0x%x\n", ret);
  1107.         goto err_out4;
  1108.     }
  1109. #endif /* CONFIG_SUB_MAIN_SPI */
  1110.  
  1111. /* 2011/04/19 FY11 : Supported wake lock. */
  1112.     epdc_debug_printk( "lock for power\n" );
  1113.     wake_lock( &(fb_data->wake_lock_power) );
  1114. /* 2011/06/29 FY11 : Added workaround for too hot EPD PMIC. */
  1115.     epdc_powerup_err_cnt = 0;
  1116.  
  1117.     goto out1;
  1118.  
  1119.  
  1120. err_out4:
  1121.     regulator_disable(fb_data->epd_pwr0_regulator);
  1122.  
  1123. err_out3:
  1124.     regulator_disable(fb_data->v3p3_regulator);
  1125.     /* Disable clocks to EPDC */
  1126. /* 2011/06/14 FY11 : Modified to handle epdc clock access count. */
  1127.     epdc_clock_gating(true);
  1128.     clk_disable(fb_data->epdc_clk_pix);
  1129.     clk_disable(fb_data->epdc_clk_axi);
  1130.     /* Disable pins used by EPDC (to prevent leakage current) */
  1131.     if (fb_data->pdata->disable_pins)
  1132.         fb_data->pdata->disable_pins();
  1133.    
  1134. err_out2:
  1135.     regulator_disable(fb_data->display_regulator);
  1136. /* 2011/03/22 FY11 : Added retry to powerup. */
  1137.     if ( retry > 0 )
  1138.     {
  1139.         retry--;
  1140.         msleep(1);
  1141.         printk(KERN_ERR "powerup retry.\n" );
  1142.         goto retry_start;
  1143.     }
  1144.     else
  1145.     {
  1146. /* 2011/06/29 FY11 : Added workaround for too hot EPD PMIC. */
  1147.         epdc_powerup_err_cnt++;
  1148.         printk(KERN_ERR "powerup retry out. (powerup error count: %d\n", epdc_powerup_err_cnt );
  1149.     }
  1150.  
  1151. out1:
  1152.     mutex_unlock(&fb_data->power_mutex);
  1153.  
  1154.     return ret;
  1155. }
  1156.  
  1157. static void epdc_powerdown(struct mxc_epdc_fb_data *fb_data)
  1158. {
  1159.     int ret = 0;
  1160.  
  1161.     mutex_lock(&fb_data->power_mutex);
  1162.  
  1163.     /* If powering_down has been cleared, a powerup
  1164.      * request is pre-empting this powerdown request.
  1165.      */
  1166.     if (!fb_data->powering_down
  1167.         || (fb_data->power_state == POWER_STATE_OFF)) {
  1168.         mutex_unlock(&fb_data->power_mutex);
  1169.         fb_data->powering_down = false;
  1170.         epdc_debug_printk( " power is already off.\n" );
  1171.         return;
  1172.     }
  1173.  
  1174.     dev_dbg(fb_data->dev, "EPDC Powerdown\n");
  1175.     epdc_debug_printk( " \n" );
  1176.  
  1177. /* 2011/07/05 FY11 : Added workaround for EPD PMIC heat up. */
  1178.     /* Check power stat */
  1179.     if ( ! regulator_is_enabled( fb_data->epd_pwr0_regulator ) )
  1180.     {
  1181.         /* Never turn on epd pmic and disable VSYS_EPD later. */
  1182.         epdc_powerup_err_cnt = EPDC_PROHIBITION_THRESH;
  1183.     }
  1184.  
  1185.     /* Disable clocks to EPDC */
  1186. /* 2011/06/14 FY11 : Modified to handle epdc clock access count. */
  1187.     epdc_clock_gating(true);
  1188.     clk_disable(fb_data->epdc_clk_pix);
  1189.     clk_disable(fb_data->epdc_clk_axi);
  1190.  
  1191.     /* Disable pins used by EPDC (to prevent leakage current) */
  1192.     if (fb_data->pdata->disable_pins)
  1193.         fb_data->pdata->disable_pins();
  1194.  
  1195.     /* Disable power to the EPD panel */
  1196.     regulator_disable(fb_data->vcom_regulator);
  1197.     regulator_disable(fb_data->epd_pwr0_regulator);
  1198.     regulator_disable(fb_data->v3p3_regulator);
  1199.     regulator_disable(fb_data->display_regulator);
  1200.  
  1201.     fb_data->power_state = POWER_STATE_OFF;
  1202.     fb_data->powering_down = false;
  1203.  
  1204. #ifdef CONFIG_SUB_MAIN_SPI
  1205. /* 2011/06/01 FY11 : Added watchdog timer. */
  1206.     epdc_debug_printk( " watchdog stop.\n" );
  1207.     ret = sub_wdt_stop();
  1208.     if ( ret < 0 )
  1209.     {
  1210.         dev_err(fb_data->dev, "fale to stop watchdog. "
  1211.             "err = 0x%x\n", ret);
  1212.     }
  1213. #endif /* CONFIG_SUB_MAIN_SPI */
  1214.  
  1215. /* 2011/04/19 FY11 : Supported wake lock. */
  1216.     wake_unlock( &(fb_data->wake_lock_power) );
  1217.     epdc_debug_printk( "unlock for power\n" );
  1218.  
  1219.     mutex_unlock(&fb_data->power_mutex);
  1220.  
  1221. /* 2011/07/05 FY11 : Added workaround for EPD PMIC heat up. */
  1222.     if ( epdc_powerup_err_cnt >= EPDC_PROHIBITION_THRESH )
  1223.     {
  1224.         dev_err(fb_data->dev, "EPD PMIC is in abnormal condition.\n");
  1225.         regulator_disable(fb_data->vsys_regulator);
  1226.     }
  1227. }
  1228.  
  1229.  
  1230. /* 2011/05/12 FY11 : Supported boot progress. */
  1231. int mxc_epdc_fb_read_temperature(struct mxc_epdc_fb_data *fb_data);
  1232. static int epdc_draw_rect( struct mxc_epdc_fb_data *fb_data,
  1233.                struct mxcfb_update_data *updata,
  1234.                u32 val,
  1235.                bool wait_update )
  1236. {
  1237.     int ret = 0, lut, retry;
  1238.  
  1239.     retry = 60;
  1240.     while ( retry > 0 )
  1241.     {
  1242.         if ( epdc_any_luts_available() )
  1243.         {
  1244.             break;
  1245.         }
  1246.         retry--;
  1247.         msleep( 50 );
  1248.     }
  1249.  
  1250.     if ( retry == 0 )
  1251.     {
  1252.         printk( KERN_ERR "%s no lut available.\n", __func__ );
  1253.         ret = -ETIMEDOUT;
  1254.         return ret;
  1255.     }
  1256.  
  1257.     lut = epdc_get_next_lut();
  1258.     mxc_epdc_fb_read_temperature(fb_data);
  1259.     epdc_set_temp(fb_data->temp_index);
  1260.     // we should exchange top and left depending on rotate !
  1261.     epdc_set_update_coord( updata->update_region.left, updata->update_region.top );
  1262.     epdc_set_update_dimensions( updata->update_region.width,
  1263.                     updata->update_region.height );
  1264.     epdc_submit_update( lut, updata->waveform_mode,
  1265.                 updata->update_mode, true, val );
  1266.  
  1267.     if ( !wait_update ) // no wait completion of update
  1268.     {
  1269.         return ret;
  1270.     }
  1271.  
  1272.     // wait display
  1273.     retry = 60;
  1274.     while( epdc_is_lut_active(lut) ||
  1275.         epdc_is_working_buffer_busy() )
  1276.     {
  1277.         msleep(50);
  1278.         retry--;
  1279.         if ( retry == 0 )
  1280.         {
  1281.             printk( KERN_ERR "%s  black complete timeout.\n", __func__ );
  1282.             break;
  1283.         }
  1284.     }
  1285.  
  1286.  
  1287.     return ret;
  1288. }
  1289.  
  1290. /* 2011/05/12 FY11 : Supported boot progress. */
  1291. static void epdc_progress_work_func(struct work_struct *work)
  1292. {
  1293.     int ret, i=0;
  1294.     struct mxcfb_update_data updata;
  1295.     struct mxc_epdc_fb_data *fb_data =
  1296.         container_of(work, struct mxc_epdc_fb_data,
  1297.             epdc_progress_work.work);
  1298.  
  1299.     mutex_lock(&(fb_data->info.lock));
  1300.  
  1301.     printk( "%s start progress.\n", __func__ );
  1302.  
  1303.     updata.update_region.left = 521;
  1304.     updata.update_region.top = 408;
  1305.     updata.update_region.width = 6;
  1306.     updata.update_region.height = 6;
  1307.     updata.waveform_mode = fb_data->wv_modes.mode_du;
  1308.     updata.update_mode = UPDATE_MODE_PARTIAL;
  1309.  
  1310.     // powerup
  1311.     ret = epdc_powerup(fb_data);
  1312.     if ( ret < 0 )
  1313.     {
  1314.         printk( KERN_ERR "%s Fails to powerup.%d\n", __func__, ret );
  1315.     }
  1316.     else
  1317.     {
  1318.         for ( i = 0; i < 35; i++ )
  1319.         {
  1320.             updata.update_region.top -= updata.update_region.height;
  1321.             if ( atomic_read( &(fb_data->info.lock.count) ) < 0 )
  1322.             {
  1323.                 epdc_draw_rect( fb_data, &updata, 0x00, false );
  1324.                 msleep(50);
  1325.             }
  1326.             else
  1327.             {
  1328.                 epdc_draw_rect( fb_data, &updata, 0x00, true );
  1329.                 msleep(10);
  1330.             }
  1331.         }
  1332.         updata.update_region.top -= updata.update_region.height;
  1333.         epdc_draw_rect( fb_data, &updata, 0x00, true );
  1334.  
  1335.         // powerdown
  1336. /* 2011/06/06 FY11 : Fixed the failure of power off. */
  1337.         fb_data->powering_down = true;
  1338.         schedule_delayed_work(&fb_data->epdc_done_work,
  1339.                     msecs_to_jiffies(fb_data->pwrdown_delay));
  1340.     }
  1341.  
  1342.     printk( "%s end progress.\n", __func__ );
  1343.  
  1344.     mutex_unlock(&(fb_data->info.lock));
  1345. }
  1346.  
  1347.  
  1348. static void epdc_init_sequence(struct mxc_epdc_fb_data *fb_data)
  1349. {
  1350.  
  1351.     /* Initialize EPDC, passing pointer to EPDC registers */
  1352.     epdc_init_settings(fb_data);
  1353.     __raw_writel(fb_data->waveform_buffer_phys, EPDC_WVADDR);
  1354.     __raw_writel(fb_data->working_buffer_phys, EPDC_WB_ADDR);
  1355. }
  1356.  
  1357. static int mxc_epdc_fb_mmap(struct fb_info *info, struct vm_area_struct *vma)
  1358. {
  1359.     u32 len;
  1360.     unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
  1361.  
  1362.     if (offset < info->fix.smem_len) {
  1363.         /* mapping framebuffer memory */
  1364.         len = info->fix.smem_len - offset;
  1365.         vma->vm_pgoff = (info->fix.smem_start + offset) >> PAGE_SHIFT;
  1366.     } else
  1367.         return -EINVAL;
  1368.  
  1369.     len = PAGE_ALIGN(len);
  1370.     if (vma->vm_end - vma->vm_start > len)
  1371.         return -EINVAL;
  1372.  
  1373.     /* make buffers bufferable */
  1374.     vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
  1375.  
  1376.     vma->vm_flags |= VM_IO | VM_RESERVED;
  1377.  
  1378.     if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
  1379.                 vma->vm_end - vma->vm_start, vma->vm_page_prot)) {
  1380.         dev_dbg(info->device, "mmap remap_pfn_range failed\n");
  1381.         return -ENOBUFS;
  1382.     }
  1383.  
  1384.     return 0;
  1385. }
  1386.  
  1387. static int mxc_epdc_fb_setcolreg(u_int regno, u_int red, u_int green,
  1388.                  u_int blue, u_int transp, struct fb_info *info)
  1389. {
  1390.     if (regno >= 256)   /* no. of hw registers */
  1391.         return 1;
  1392.     /*
  1393.      * Program hardware... do anything you want with transp
  1394.      */
  1395.  
  1396.     /* grayscale works only partially under directcolor */
  1397.     if (info->var.grayscale) {
  1398.         /* grayscale = 0.30*R + 0.59*G + 0.11*B */
  1399.         red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
  1400.     }
  1401.  
  1402. #define CNVT_TOHW(val, width) ((((val)<<(width))+0x7FFF-(val))>>16)
  1403.     switch (info->fix.visual) {
  1404.     case FB_VISUAL_TRUECOLOR:
  1405.     case FB_VISUAL_PSEUDOCOLOR:
  1406.         red = CNVT_TOHW(red, info->var.red.length);
  1407.         green = CNVT_TOHW(green, info->var.green.length);
  1408.         blue = CNVT_TOHW(blue, info->var.blue.length);
  1409.         transp = CNVT_TOHW(transp, info->var.transp.length);
  1410.         break;
  1411.     case FB_VISUAL_DIRECTCOLOR:
  1412.         red = CNVT_TOHW(red, 8);    /* expect 8 bit DAC */
  1413.         green = CNVT_TOHW(green, 8);
  1414.         blue = CNVT_TOHW(blue, 8);
  1415.         /* hey, there is bug in transp handling... */
  1416.         transp = CNVT_TOHW(transp, 8);
  1417.         break;
  1418.     }
  1419. #undef CNVT_TOHW
  1420.     /* Truecolor has hardware independent palette */
  1421.     if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
  1422.  
  1423.         if (regno >= 16)
  1424.             return 1;
  1425.  
  1426.         ((u32 *) (info->pseudo_palette))[regno] =
  1427.             (red << info->var.red.offset) |
  1428.             (green << info->var.green.offset) |
  1429.             (blue << info->var.blue.offset) |
  1430.             (transp << info->var.transp.offset);
  1431.     }
  1432.     return 0;
  1433. }
  1434.  
  1435. static void adjust_coordinates(struct mxc_epdc_fb_data *fb_data,
  1436.     struct mxcfb_rect *update_region, struct mxcfb_rect *adj_update_region)
  1437. {
  1438.     struct fb_var_screeninfo *screeninfo = &fb_data->epdc_fb_var;
  1439.     u32 rotation = fb_data->epdc_fb_var.rotate;
  1440.     u32 temp;
  1441.  
  1442.     /* If adj_update_region == NULL, pass result back in update_region */
  1443.     /* If adj_update_region == valid, use it to pass back result */
  1444.     if (adj_update_region)
  1445.         switch (rotation) {
  1446.         case FB_ROTATE_UR:
  1447.             adj_update_region->top = update_region->top;
  1448.             adj_update_region->left = update_region->left;
  1449.             adj_update_region->width = update_region->width;
  1450.             adj_update_region->height = update_region->height;
  1451.             break;
  1452.         case FB_ROTATE_CW:
  1453.             adj_update_region->top = update_region->left;
  1454.             adj_update_region->left = screeninfo->yres -
  1455.                 (update_region->top + update_region->height);
  1456.             adj_update_region->width = update_region->height;
  1457.             adj_update_region->height = update_region->width;
  1458.             break;
  1459.         case FB_ROTATE_UD:
  1460.             adj_update_region->width = update_region->width;
  1461.             adj_update_region->height = update_region->height;
  1462.             adj_update_region->top = screeninfo->yres -
  1463.                 (update_region->top + update_region->height);
  1464.             adj_update_region->left = screeninfo->xres -
  1465.                 (update_region->left + update_region->width);
  1466.             break;
  1467.         case FB_ROTATE_CCW:
  1468.             adj_update_region->left = update_region->top;
  1469.             adj_update_region->top = screeninfo->xres -
  1470.                 (update_region->left + update_region->width);
  1471.             adj_update_region->width = update_region->height;
  1472.             adj_update_region->height = update_region->width;
  1473.             break;
  1474.         }
  1475.     else
  1476.         switch (rotation) {
  1477.         case FB_ROTATE_UR:
  1478.             /* No adjustment needed */
  1479.             break;
  1480.         case FB_ROTATE_CW:
  1481.             temp = update_region->top;
  1482.             update_region->top = update_region->left;
  1483.             update_region->left = screeninfo->yres -
  1484.                 (temp + update_region->height);
  1485.             temp = update_region->width;
  1486.             update_region->width = update_region->height;
  1487.             update_region->height = temp;
  1488.             break;
  1489.         case FB_ROTATE_UD:
  1490.             update_region->top = screeninfo->yres -
  1491.                 (update_region->top + update_region->height);
  1492.             update_region->left = screeninfo->xres -
  1493.                 (update_region->left + update_region->width);
  1494.             break;
  1495.         case FB_ROTATE_CCW:
  1496.             temp = update_region->left;
  1497.             update_region->left = update_region->top;
  1498.             update_region->top = screeninfo->xres -
  1499.                 (temp + update_region->width);
  1500.             temp = update_region->width;
  1501.             update_region->width = update_region->height;
  1502.             update_region->height = temp;
  1503.             break;
  1504.         }
  1505. }
  1506.  
  1507. /*
  1508.  * Set fixed framebuffer parameters based on variable settings.
  1509.  *
  1510.  * @param       info     framebuffer information pointer
  1511.  */
  1512. static int mxc_epdc_fb_set_fix(struct fb_info *info)
  1513. {
  1514.     struct fb_fix_screeninfo *fix = &info->fix;
  1515.     struct fb_var_screeninfo *var = &info->var;
  1516.  
  1517.     fix->line_length = var->xres_virtual * var->bits_per_pixel / 8;
  1518.  
  1519.     fix->type = FB_TYPE_PACKED_PIXELS;
  1520.     fix->accel = FB_ACCEL_NONE;
  1521.     if (var->grayscale)
  1522.         fix->visual = FB_VISUAL_STATIC_PSEUDOCOLOR;
  1523.     else
  1524.         fix->visual = FB_VISUAL_TRUECOLOR;
  1525.     fix->xpanstep = 1;
  1526.     fix->ypanstep = 1;
  1527.  
  1528.     return 0;
  1529. }
  1530.  
  1531. /*
  1532.  * This routine actually sets the video mode. It's in here where we
  1533.  * the hardware state info->par and fix which can be affected by the
  1534.  * change in par. For this driver it doesn't do much.
  1535.  *
  1536.  */
  1537. static int mxc_epdc_fb_set_par(struct fb_info *info)
  1538. {
  1539.     struct mxc_epdc_fb_data *fb_data = (struct mxc_epdc_fb_data *)info;
  1540.     struct pxp_config_data *pxp_conf = &fb_data->pxp_conf;
  1541.     struct pxp_proc_data *proc_data = &pxp_conf->proc_data;
  1542.     struct fb_var_screeninfo *screeninfo = &fb_data->info.var;
  1543.     struct mxc_epdc_fb_mode *epdc_modes = fb_data->pdata->epdc_mode;
  1544.     int i;
  1545.     int ret;
  1546.     unsigned long flags;
  1547.     __u32 xoffset_old, yoffset_old;
  1548.  
  1549.     /*
  1550.      * Can't change the FB parameters until current updates have completed.
  1551.      * This function returns when all active updates are done.
  1552.      */
  1553.     mxc_epdc_fb_flush_updates(fb_data);
  1554.  
  1555.     spin_lock_irqsave(&fb_data->queue_lock, flags);
  1556.     /*
  1557.      * Set all screeninfo except for xoffset/yoffset
  1558.      * Subsequent call to pan_display will handle those.
  1559.      */
  1560.     xoffset_old = fb_data->epdc_fb_var.xoffset;
  1561.     yoffset_old = fb_data->epdc_fb_var.yoffset;
  1562.     fb_data->epdc_fb_var = *screeninfo;
  1563.     fb_data->epdc_fb_var.xoffset = xoffset_old;
  1564.     fb_data->epdc_fb_var.yoffset = yoffset_old;
  1565.     spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  1566.  
  1567.     mutex_lock(&fb_data->pxp_mutex);
  1568.  
  1569.     /*
  1570.      * Update PxP config data (used to process FB regions for updates)
  1571.      * based on FB info and processing tasks required
  1572.      */
  1573.  
  1574.     /* Initialize non-channel-specific PxP parameters */
  1575.     proc_data->drect.left = proc_data->srect.left = 0;
  1576.     proc_data->drect.top = proc_data->srect.top = 0;
  1577.     proc_data->drect.width = proc_data->srect.width = screeninfo->xres;
  1578.     proc_data->drect.height = proc_data->srect.height = screeninfo->yres;
  1579.     proc_data->scaling = 0;
  1580.     proc_data->hflip = 0;
  1581.     proc_data->vflip = 0;
  1582.     proc_data->rotate = screeninfo->rotate;
  1583.     proc_data->bgcolor = 0;
  1584.     proc_data->overlay_state = 0;
  1585.     proc_data->lut_transform = PXP_LUT_NONE;
  1586.  
  1587.     /*
  1588.      * configure S0 channel parameters
  1589.      * Parameters should match FB format/width/height
  1590.      */
  1591.     if (screeninfo->grayscale)
  1592.         pxp_conf->s0_param.pixel_fmt = PXP_PIX_FMT_GREY;
  1593.     else {
  1594.         switch (screeninfo->bits_per_pixel) {
  1595.         case 16:
  1596.             pxp_conf->s0_param.pixel_fmt = PXP_PIX_FMT_RGB565;
  1597.             break;
  1598.         case 24:
  1599.             pxp_conf->s0_param.pixel_fmt = PXP_PIX_FMT_RGB24;
  1600.             break;
  1601.         case 32:
  1602.             pxp_conf->s0_param.pixel_fmt = PXP_PIX_FMT_RGB32;
  1603.             break;
  1604.         default:
  1605.             pxp_conf->s0_param.pixel_fmt = PXP_PIX_FMT_RGB565;
  1606.             break;
  1607.         }
  1608.     }
  1609.     pxp_conf->s0_param.width = screeninfo->xres_virtual;
  1610.     pxp_conf->s0_param.height = screeninfo->yres;
  1611.     pxp_conf->s0_param.color_key = -1;
  1612.     pxp_conf->s0_param.color_key_enable = false;
  1613.  
  1614.     /*
  1615.      * Initialize Output channel parameters
  1616.      * Output is Y-only greyscale
  1617.      * Output width/height will vary based on update region size
  1618.      */
  1619.     pxp_conf->out_param.width = screeninfo->xres;
  1620.     pxp_conf->out_param.height = screeninfo->yres;
  1621.     pxp_conf->out_param.pixel_fmt = PXP_PIX_FMT_GREY;
  1622.  
  1623.     mutex_unlock(&fb_data->pxp_mutex);
  1624.  
  1625.     /*
  1626.      * If HW not yet initialized, check to see if we are being sent
  1627.      * an initialization request.
  1628.      */
  1629.     if (!fb_data->hw_ready) {
  1630.         struct fb_videomode mode;
  1631.         bool found_match = false;
  1632.         u32 xres_temp;
  1633.  
  1634.         fb_var_to_videomode(&mode, screeninfo);
  1635.  
  1636.         /* When comparing requested fb mode,
  1637.            we need to use unrotated dimensions */
  1638.         if ((screeninfo->rotate == FB_ROTATE_CW) ||
  1639.             (screeninfo->rotate == FB_ROTATE_CCW)) {
  1640.             xres_temp = mode.xres;
  1641.             mode.xres = mode.yres;
  1642.             mode.yres = xres_temp;
  1643.         }
  1644.  
  1645.         /* Match videomode against epdc modes */
  1646.         for (i = 0; i < fb_data->pdata->num_modes; i++) {
  1647.             if (!fb_mode_is_equal(epdc_modes[i].vmode, &mode))
  1648.                 continue;
  1649.             fb_data->cur_mode = &epdc_modes[i];
  1650.             found_match = true;
  1651.             break;
  1652.         }
  1653.  
  1654.         if (!found_match) {
  1655.             dev_err(fb_data->dev,
  1656.                 "Failed to match requested video mode\n");
  1657.             return EINVAL;
  1658.         }
  1659.  
  1660.         /* Found a match - Grab timing params */
  1661.         screeninfo->left_margin = mode.left_margin;
  1662.         screeninfo->right_margin = mode.right_margin;
  1663.         screeninfo->upper_margin = mode.upper_margin;
  1664.         screeninfo->lower_margin = mode.lower_margin;
  1665.         screeninfo->hsync_len = mode.hsync_len;
  1666.         screeninfo->vsync_len = mode.vsync_len;
  1667.  
  1668.         /* Initialize EPDC settings and init panel */
  1669.         ret =
  1670.             mxc_epdc_fb_init_hw((struct fb_info *)fb_data);
  1671.         if (ret) {
  1672.             dev_err(fb_data->dev,
  1673.                 "Failed to load panel waveform data\n");
  1674.             return ret;
  1675.         }
  1676.     }
  1677.  
  1678.     /*
  1679.      * EOF sync delay (in us) should be equal to the vscan holdoff time
  1680.      * VSCAN_HOLDOFF time = (VSCAN_HOLDOFF value + 1) * Vertical lines
  1681.      * Add 25us for additional margin
  1682.      */
  1683.     fb_data->eof_sync_period = (fb_data->cur_mode->vscan_holdoff + 1) *
  1684.         1000000/(fb_data->cur_mode->vmode->refresh *
  1685.         (fb_data->cur_mode->vmode->upper_margin +
  1686.         fb_data->cur_mode->vmode->yres +
  1687.         fb_data->cur_mode->vmode->lower_margin +
  1688.         fb_data->cur_mode->vmode->vsync_len)) + 25;
  1689.  
  1690.     mxc_epdc_fb_set_fix(info);
  1691.  
  1692.     return 0;
  1693. }
  1694.  
  1695. static int mxc_epdc_fb_check_var(struct fb_var_screeninfo *var,
  1696.                  struct fb_info *info)
  1697. {
  1698.     struct mxc_epdc_fb_data *fb_data = (struct mxc_epdc_fb_data *)info;
  1699.  
  1700.     if (!var->xres)
  1701.         var->xres = 1;
  1702.     if (!var->yres)
  1703.         var->yres = 1;
  1704.  
  1705.     if (var->xres_virtual < var->xoffset + var->xres)
  1706.         var->xres_virtual = var->xoffset + var->xres;
  1707.     if (var->yres_virtual < var->yoffset + var->yres)
  1708.         var->yres_virtual = var->yoffset + var->yres;
  1709.  
  1710.     if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) &&
  1711.         (var->bits_per_pixel != 16) && (var->bits_per_pixel != 8))
  1712.         var->bits_per_pixel = default_bpp;
  1713.  
  1714.     switch (var->bits_per_pixel) {
  1715.     case 8:
  1716.         if (var->grayscale != 0) {
  1717.             /*
  1718.              * For 8-bit grayscale, R, G, and B offset are equal.
  1719.              *
  1720.              */
  1721.             var->red.length = 8;
  1722.             var->red.offset = 0;
  1723.             var->red.msb_right = 0;
  1724.  
  1725.             var->green.length = 8;
  1726.             var->green.offset = 0;
  1727.             var->green.msb_right = 0;
  1728.  
  1729.             var->blue.length = 8;
  1730.             var->blue.offset = 0;
  1731.             var->blue.msb_right = 0;
  1732.  
  1733.             var->transp.length = 0;
  1734.             var->transp.offset = 0;
  1735.             var->transp.msb_right = 0;
  1736.         } else {
  1737.             var->red.length = 3;
  1738.             var->red.offset = 5;
  1739.             var->red.msb_right = 0;
  1740.  
  1741.             var->green.length = 3;
  1742.             var->green.offset = 2;
  1743.             var->green.msb_right = 0;
  1744.  
  1745.             var->blue.length = 2;
  1746.             var->blue.offset = 0;
  1747.             var->blue.msb_right = 0;
  1748.  
  1749.             var->transp.length = 0;
  1750.             var->transp.offset = 0;
  1751.             var->transp.msb_right = 0;
  1752.         }
  1753.         break;
  1754.     case 16:
  1755.         var->red.length = 5;
  1756.         var->red.offset = 11;
  1757.         var->red.msb_right = 0;
  1758.  
  1759.         var->green.length = 6;
  1760.         var->green.offset = 5;
  1761.         var->green.msb_right = 0;
  1762.  
  1763.         var->blue.length = 5;
  1764.         var->blue.offset = 0;
  1765.         var->blue.msb_right = 0;
  1766.  
  1767.         var->transp.length = 0;
  1768.         var->transp.offset = 0;
  1769.         var->transp.msb_right = 0;
  1770.         break;
  1771.     case 24:
  1772.         var->red.length = 8;
  1773.         var->red.offset = 16;
  1774.         var->red.msb_right = 0;
  1775.  
  1776.         var->green.length = 8;
  1777.         var->green.offset = 8;
  1778.         var->green.msb_right = 0;
  1779.  
  1780.         var->blue.length = 8;
  1781.         var->blue.offset = 0;
  1782.         var->blue.msb_right = 0;
  1783.  
  1784.         var->transp.length = 0;
  1785.         var->transp.offset = 0;
  1786.         var->transp.msb_right = 0;
  1787.         break;
  1788.     case 32:
  1789.         var->red.length = 8;
  1790.         var->red.offset = 16;
  1791.         var->red.msb_right = 0;
  1792.  
  1793.         var->green.length = 8;
  1794.         var->green.offset = 8;
  1795.         var->green.msb_right = 0;
  1796.  
  1797.         var->blue.length = 8;
  1798.         var->blue.offset = 0;
  1799.         var->blue.msb_right = 0;
  1800.  
  1801.         var->transp.length = 8;
  1802.         var->transp.offset = 24;
  1803.         var->transp.msb_right = 0;
  1804.         break;
  1805.     }
  1806.  
  1807.     switch (var->rotate) {
  1808.     case FB_ROTATE_UR:
  1809.     case FB_ROTATE_UD:
  1810.         var->xres = fb_data->native_width;
  1811.         var->yres = fb_data->native_height;
  1812.         break;
  1813.     case FB_ROTATE_CW:
  1814.     case FB_ROTATE_CCW:
  1815.         var->xres = fb_data->native_height;
  1816.         var->yres = fb_data->native_width;
  1817.         break;
  1818.     default:
  1819.         /* Invalid rotation value */
  1820.         var->rotate = 0;
  1821.         dev_dbg(fb_data->dev, "Invalid rotation request\n");
  1822.         return -EINVAL;
  1823.     }
  1824.  
  1825.     var->xres_virtual = ALIGN(var->xres, 32);
  1826.     var->yres_virtual = ALIGN(var->yres, 128) * fb_data->num_screens;
  1827.  
  1828.     var->height = -1;
  1829.     var->width = -1;
  1830.  
  1831.     return 0;
  1832. }
  1833.  
  1834. void mxc_epdc_fb_set_waveform_modes(struct mxcfb_waveform_modes *modes,
  1835.     struct fb_info *info)
  1836. {
  1837.     struct mxc_epdc_fb_data *fb_data = info ?
  1838.         (struct mxc_epdc_fb_data *)info:g_fb_data;
  1839.  
  1840.     memcpy(&fb_data->wv_modes, modes, sizeof(modes));
  1841. }
  1842. EXPORT_SYMBOL(mxc_epdc_fb_set_waveform_modes);
  1843.  
  1844. static int mxc_epdc_fb_get_temp_index(struct mxc_epdc_fb_data *fb_data, int temp)
  1845. {
  1846.     int i;
  1847.     int index = -1;
  1848.  
  1849.     if (fb_data->trt_entries == 0) {
  1850.         dev_err(fb_data->dev,
  1851.             "No TRT exists...using default temp index\n");
  1852.         return DEFAULT_TEMP_INDEX;
  1853.     }
  1854.  
  1855.     /* Search temperature ranges for a match */
  1856.     for (i = 0; i < fb_data->trt_entries - 1; i++) {
  1857.         if ((temp >= fb_data->temp_range_bounds[i])
  1858.             && (temp < fb_data->temp_range_bounds[i+1])) {
  1859.             index = i;
  1860.             break;
  1861.         }
  1862.     }
  1863.  
  1864.     if (index < 0) {
  1865. /* 2011/2/24 FY11 : Modified to use lower or upper limit index when temp is out of range. */
  1866.         if ( temp <= fb_data->temp_range_bounds[0] )
  1867.         {
  1868.         //  printk( KERN_INFO "temperature is lower than limit.\n" );
  1869.             index = 0;
  1870.         }
  1871.         else
  1872.         {
  1873.         //  printk( KERN_INFO "temperature is higher than limit.\n" );
  1874.             index = (fb_data->trt_entries) - 1;
  1875.         }
  1876.     }
  1877.  
  1878.     dev_dbg(fb_data->dev, "Using temperature index %d\n", index);
  1879.  
  1880.     return index;
  1881. }
  1882.  
  1883. /* 2011/2/14 FY11 : Supported auto temperature reading. */
  1884. int mxc_epdc_fb_read_temperature(struct mxc_epdc_fb_data *fb_data)
  1885. {
  1886.     int temperature;
  1887.     int savedPowerState, ret=0;
  1888.  
  1889.     if ((savedPowerState = fb_data->power_state) == POWER_STATE_OFF)
  1890.         regulator_enable(fb_data->display_regulator);
  1891.     temperature = regulator_get_voltage(fb_data->temp_regulator);
  1892.     if (savedPowerState == POWER_STATE_OFF)
  1893.         regulator_disable(fb_data->display_regulator);
  1894.  
  1895.     if (temperature < 0 )   // err
  1896.     {
  1897.         ret = temperature;
  1898.         printk( KERN_ERR "Fail to read temperature! %d\n", ret );
  1899.     }
  1900.     else
  1901.     {
  1902.         if ( temperature >= MINUS_TEMPERATURE )
  1903.         {
  1904.             temperature -= MINUS_TEMP_ADJUST_VAL;
  1905.         }
  1906.         fb_data->temp_index = mxc_epdc_fb_get_temp_index(fb_data, temperature);
  1907.         epdc_debug_printk( " temperature is %d (index=%d).\n", temperature, fb_data->temp_index );
  1908.     }
  1909.  
  1910.     return ret;
  1911. }
  1912.  
  1913. int mxc_epdc_fb_set_temperature(int temperature, struct fb_info *info)
  1914. {
  1915.     struct mxc_epdc_fb_data *fb_data = info ?
  1916.         (struct mxc_epdc_fb_data *)info:g_fb_data;
  1917.     unsigned long flags;
  1918.  
  1919.     /* Store temp index. Used later when configuring updates. */
  1920.     spin_lock_irqsave(&fb_data->queue_lock, flags);
  1921.     fb_data->temp_index = mxc_epdc_fb_get_temp_index(fb_data, temperature);
  1922.     spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  1923.  
  1924.     return 0;
  1925. }
  1926.  
  1927.  
  1928. static int mxc_epdc_fb_set_border_mode(int border_mode, struct fb_info *info)
  1929. {
  1930.     struct mxc_epdc_fb_data *fb_data = (struct mxc_epdc_fb_data *)info;
  1931.     int savedPowerState;
  1932.     int ret = 0;
  1933.  
  1934.     if ((savedPowerState = fb_data->power_state) == POWER_STATE_OFF)
  1935.     {
  1936. /* 2011/03/09 FY11 : Fixed the bug that CPU hangs caused by accessing to EPDC without clock. */
  1937.         ret = epdc_powerup(fb_data);
  1938.         if ( ret < 0 )
  1939.         {
  1940.             printk( KERN_ERR "%s Fails to powerup. %d\n", __func__, ret );
  1941.             return ret;
  1942.         }
  1943.     }
  1944.  
  1945.     epdc_set_border_gpio(border_mode);
  1946.  
  1947.     if (savedPowerState == POWER_STATE_OFF)
  1948.         epdc_powerdown(fb_data);
  1949.        
  1950.     return 0;
  1951. }
  1952. EXPORT_SYMBOL(mxc_epdc_fb_set_temperature);
  1953.  
  1954. int mxc_epdc_fb_set_auto_update(u32 auto_mode, struct fb_info *info)
  1955. {
  1956.     struct mxc_epdc_fb_data *fb_data = info ?
  1957.         (struct mxc_epdc_fb_data *)info:g_fb_data;
  1958.  
  1959.     dev_dbg(fb_data->dev, "Setting auto update mode to %d\n", auto_mode);
  1960.  
  1961.     if ((auto_mode == AUTO_UPDATE_MODE_AUTOMATIC_MODE)
  1962.         || (auto_mode == AUTO_UPDATE_MODE_REGION_MODE))
  1963.         fb_data->auto_mode = auto_mode;
  1964.     else {
  1965.         dev_err(fb_data->dev, "Invalid auto update mode parameter.\n");
  1966.         return -EINVAL;
  1967.     }
  1968.  
  1969.     return 0;
  1970. }
  1971. EXPORT_SYMBOL(mxc_epdc_fb_set_auto_update);
  1972.  
  1973. int mxc_epdc_fb_set_upd_scheme(u32 upd_scheme, struct fb_info *info)
  1974. {
  1975.     struct mxc_epdc_fb_data *fb_data = info ?
  1976.         (struct mxc_epdc_fb_data *)info:g_fb_data;
  1977.  
  1978.     dev_dbg(fb_data->dev, "Setting optimization level to %d\n", upd_scheme);
  1979.  
  1980.     /*
  1981.      * Can't change the scheme until current updates have completed.
  1982.      * This function returns when all active updates are done.
  1983.      */
  1984.     mxc_epdc_fb_flush_updates(fb_data);
  1985.  
  1986.     if ((upd_scheme == UPDATE_SCHEME_SNAPSHOT)
  1987.         || (upd_scheme == UPDATE_SCHEME_QUEUE)
  1988.         || (upd_scheme == UPDATE_SCHEME_QUEUE_AND_MERGE))
  1989.         fb_data->upd_scheme = upd_scheme;
  1990.     else {
  1991.         dev_err(fb_data->dev, "Invalid update scheme specified.\n");
  1992.         return -EINVAL;
  1993.     }
  1994.  
  1995.     return 0;
  1996. }
  1997. EXPORT_SYMBOL(mxc_epdc_fb_set_upd_scheme);
  1998.  
  1999. static void copy_before_process(struct mxc_epdc_fb_data *fb_data,
  2000.     struct update_data_list *upd_data_list)
  2001. {
  2002.     int i;
  2003.     unsigned char *temp_buf_ptr = fb_data->virt_addr_copybuf;
  2004.     unsigned char *src_ptr;
  2005.     struct mxcfb_rect *src_upd_region;
  2006.     int temp_buf_stride;
  2007.     int src_stride;
  2008.     int bpp = fb_data->epdc_fb_var.bits_per_pixel;
  2009.     int left_offs, right_offs;
  2010.     int x_trailing_bytes, y_trailing_bytes;
  2011.  
  2012.     /* Set source buf pointer based on input source, panning, etc. */
  2013.     if (upd_data_list->upd_data.flags & EPDC_FLAG_USE_ALT_BUFFER) {
  2014.         src_upd_region = &upd_data_list->upd_data.alt_buffer_data.alt_update_region;
  2015.         src_stride =
  2016.             upd_data_list->upd_data.alt_buffer_data.width * bpp/8;
  2017.         src_ptr = upd_data_list->upd_data.alt_buffer_data.virt_addr
  2018.             + src_upd_region->top * src_stride;
  2019.     } else {
  2020.         src_upd_region = &upd_data_list->upd_data.update_region;
  2021.         src_stride = fb_data->epdc_fb_var.xres_virtual * bpp/8;
  2022.         src_ptr = fb_data->info.screen_base + fb_data->fb_offset
  2023.             + src_upd_region->top * src_stride;
  2024.     }
  2025.  
  2026.     temp_buf_stride = ALIGN(src_upd_region->width, 8) * bpp/8;
  2027.     left_offs = src_upd_region->left * bpp/8;
  2028.     right_offs = src_upd_region->width * bpp/8;
  2029.     x_trailing_bytes = (ALIGN(src_upd_region->width, 8)
  2030.         - src_upd_region->width) * bpp/8;
  2031.  
  2032.     for (i = 0; i < src_upd_region->height; i++) {
  2033.         /* Copy the full line */
  2034.         memcpy(temp_buf_ptr, src_ptr + left_offs,
  2035.             src_upd_region->width * bpp/8);
  2036.  
  2037.         /* Clear any unwanted pixels at the end of each line */
  2038.         if (src_upd_region->width & 0x7) {
  2039.             memset(temp_buf_ptr + right_offs, 0x0,
  2040.                 x_trailing_bytes);
  2041.         }
  2042.  
  2043.         temp_buf_ptr += temp_buf_stride;
  2044.         src_ptr += src_stride;
  2045.     }
  2046.  
  2047.     /* Clear any unwanted pixels at the bottom of the end of each line */
  2048.     if (src_upd_region->height & 0x7) {
  2049.         y_trailing_bytes = (ALIGN(src_upd_region->height, 8)
  2050.             - src_upd_region->height) *
  2051.             ALIGN(src_upd_region->width, 8) * bpp/8;
  2052.         memset(temp_buf_ptr, 0x0, y_trailing_bytes);
  2053.     }
  2054. }
  2055.  
  2056. static int epdc_process_update(struct update_data_list *upd_data_list,
  2057.                    struct mxc_epdc_fb_data *fb_data)
  2058. {
  2059.     struct mxcfb_rect *src_upd_region; /* Region of src buffer for update */
  2060.     struct mxcfb_rect pxp_upd_region;
  2061.     u32 src_width, src_height;
  2062.     u32 offset_from_4, bytes_per_pixel;
  2063.     u32 post_rotation_xcoord, post_rotation_ycoord, width_pxp_blocks;
  2064.     u32 pxp_input_offs, pxp_output_offs, pxp_output_shift;
  2065.     u32 hist_stat = 0;
  2066.     int width_unaligned, height_unaligned;
  2067.     bool input_unaligned = false;
  2068.     bool line_overflow = false;
  2069.     int pix_per_line_added;
  2070.     bool use_temp_buf = false;
  2071.     struct mxcfb_rect temp_buf_upd_region;
  2072.  
  2073.     int ret, ret_powerup = 0;
  2074.  
  2075.     /*
  2076.      * Gotta do a whole bunch of buffer ptr manipulation to
  2077.      * work around HW restrictions for PxP & EPDC
  2078.      */
  2079.  
  2080.     /*
  2081.      * Are we using FB or an alternate (overlay)
  2082.      * buffer for source of update?
  2083.      */
  2084.     if (upd_data_list->upd_data.flags & EPDC_FLAG_USE_ALT_BUFFER) {
  2085.         src_width = upd_data_list->upd_data.alt_buffer_data.width;
  2086.         src_height = upd_data_list->upd_data.alt_buffer_data.height;
  2087.         src_upd_region = &upd_data_list->upd_data.alt_buffer_data.alt_update_region;
  2088.     } else {
  2089.         src_width = fb_data->epdc_fb_var.xres_virtual;
  2090.         src_height = fb_data->epdc_fb_var.yres;
  2091.         src_upd_region = &upd_data_list->upd_data.update_region;
  2092.     }
  2093.  
  2094.     bytes_per_pixel = fb_data->epdc_fb_var.bits_per_pixel/8;
  2095.  
  2096.     /*
  2097.      * SW workaround for PxP limitation
  2098.      *
  2099.      * There are 3 cases where we cannot process the update data
  2100.      * directly from the input buffer:
  2101.      *
  2102.      * 1) PxP must process 8x8 pixel blocks, and all pixels in each block
  2103.      * are considered for auto-waveform mode selection. If the
  2104.      * update region is not 8x8 aligned, additional unwanted pixels
  2105.      * will be considered in auto-waveform mode selection.
  2106.      *
  2107.      * 2) PxP input must be 32-bit aligned, so any update
  2108.      * address not 32-bit aligned must be shifted to meet the
  2109.      * 32-bit alignment.  The PxP will thus end up processing pixels
  2110.      * outside of the update region to satisfy this alignment restriction,
  2111.      * which can affect auto-waveform mode selection.
  2112.      *
  2113.      * 3) If input fails 32-bit alignment, and the resulting expansion
  2114.      * of the processed region would add at least 8 pixels more per
  2115.      * line than the original update line width, the EPDC would
  2116.      * cause screen artifacts by incorrectly handling the 8+ pixels
  2117.      * at the end of each line.
  2118.      *
  2119.      * Workaround is to copy from source buffer into a temporary
  2120.      * buffer, which we pad with zeros to match the 8x8 alignment
  2121.      * requirement. This temp buffer becomes the input to the PxP.
  2122.      */
  2123.     width_unaligned = src_upd_region->width & 0x7;
  2124.     height_unaligned = src_upd_region->height & 0x7;
  2125.  
  2126.     offset_from_4 = src_upd_region->left & 0x3;
  2127.     input_unaligned = ((offset_from_4 * bytes_per_pixel % 4) != 0) ?
  2128.                 true : false;
  2129.  
  2130.     pix_per_line_added = (offset_from_4 * bytes_per_pixel % 4) / bytes_per_pixel;
  2131.     if ((((fb_data->epdc_fb_var.rotate == FB_ROTATE_UR) ||
  2132.         fb_data->epdc_fb_var.rotate == FB_ROTATE_UD)) &&
  2133.         (ALIGN(src_upd_region->width, 8) <
  2134.             ALIGN(src_upd_region->width + pix_per_line_added, 8)))
  2135.         line_overflow = true;
  2136.  
  2137.     /* Grab pxp_mutex here so that we protect access
  2138.      * to copybuf in addition to the PxP structures */
  2139.     mutex_lock(&fb_data->pxp_mutex);
  2140.  
  2141.     if (((width_unaligned || height_unaligned || input_unaligned) &&
  2142.         (upd_data_list->upd_data.waveform_mode == WAVEFORM_MODE_AUTO))
  2143.         || line_overflow) {
  2144.  
  2145.         dev_dbg(fb_data->dev, "Copying update before processing.\n");
  2146.  
  2147.         /* Update to reflect what the new source buffer will be */
  2148.         src_width = ALIGN(src_upd_region->width, 8);
  2149.         src_height = ALIGN(src_upd_region->height, 8);
  2150.  
  2151.         copy_before_process(fb_data, upd_data_list);
  2152.  
  2153.         /*
  2154.          * src_upd_region should now describe
  2155.          * the new update buffer attributes.
  2156.          */
  2157.         temp_buf_upd_region.left = 0;
  2158.         temp_buf_upd_region.top = 0;
  2159.         temp_buf_upd_region.width = src_upd_region->width;
  2160.         temp_buf_upd_region.height = src_upd_region->height;
  2161.         src_upd_region = &temp_buf_upd_region;
  2162.  
  2163.         use_temp_buf = true;
  2164.     }
  2165.  
  2166.     /*
  2167.      * Compute buffer offset to account for
  2168.      * PxP limitation (input must be 32-bit aligned)
  2169.      */
  2170.     offset_from_4 = src_upd_region->left & 0x3;
  2171.     input_unaligned = ((offset_from_4 * bytes_per_pixel % 4) != 0) ?
  2172.                 true : false;
  2173.     if (input_unaligned) {
  2174.         /* Leave a gap between PxP input addr and update region pixels */
  2175.         pxp_input_offs =
  2176.             (src_upd_region->top * src_width + src_upd_region->left)
  2177.             * bytes_per_pixel & 0xFFFFFFFC;
  2178.         /* Update region should change to reflect relative position to input ptr */
  2179.         pxp_upd_region.top = 0;
  2180.         pxp_upd_region.left = (offset_from_4 * bytes_per_pixel % 4) / bytes_per_pixel;
  2181.     } else {
  2182.         pxp_input_offs =
  2183.             (src_upd_region->top * src_width + src_upd_region->left)
  2184.             * bytes_per_pixel;
  2185.         /* Update region should change to reflect relative position to input ptr */
  2186.         pxp_upd_region.top = 0;
  2187.         pxp_upd_region.left = 0;
  2188.     }
  2189.  
  2190.     /* Update region dimensions to meet 8x8 pixel requirement */
  2191.     pxp_upd_region.width =
  2192.         ALIGN(src_upd_region->width + pxp_upd_region.left, 8);
  2193.     pxp_upd_region.height = ALIGN(src_upd_region->height, 8);
  2194.  
  2195.     switch (fb_data->epdc_fb_var.rotate) {
  2196.     case FB_ROTATE_UR:
  2197.     default:
  2198.         post_rotation_xcoord = pxp_upd_region.left;
  2199.         post_rotation_ycoord = pxp_upd_region.top;
  2200.         width_pxp_blocks = pxp_upd_region.width;
  2201.         break;
  2202.     case FB_ROTATE_CW:
  2203.         width_pxp_blocks = pxp_upd_region.height;
  2204.         post_rotation_xcoord = width_pxp_blocks - src_upd_region->height;
  2205.         post_rotation_ycoord = pxp_upd_region.left;
  2206.         break;
  2207.     case FB_ROTATE_UD:
  2208.         width_pxp_blocks = pxp_upd_region.width;
  2209.         post_rotation_xcoord = width_pxp_blocks - src_upd_region->width - pxp_upd_region.left;
  2210.         post_rotation_ycoord = pxp_upd_region.height - src_upd_region->height - pxp_upd_region.top;
  2211.         break;
  2212.     case FB_ROTATE_CCW:
  2213.         width_pxp_blocks = pxp_upd_region.height;
  2214.         post_rotation_xcoord = pxp_upd_region.top;
  2215.         post_rotation_ycoord = pxp_upd_region.width - src_upd_region->width - pxp_upd_region.left;
  2216.         break;
  2217.     }
  2218.  
  2219.     /* Update region start coord to force PxP to process full 8x8 regions */
  2220.     pxp_upd_region.top &= ~0x7;
  2221.     pxp_upd_region.left &= ~0x7;
  2222.  
  2223.     pxp_output_shift = ALIGN(post_rotation_xcoord, 8)
  2224.         - post_rotation_xcoord;
  2225.  
  2226.     pxp_output_offs = post_rotation_ycoord * width_pxp_blocks
  2227.         + pxp_output_shift;
  2228.  
  2229.     upd_data_list->epdc_offs = ALIGN(pxp_output_offs, 8);
  2230.  
  2231.     /* Source address either comes from alternate buffer
  2232.        provided in update data, or from the framebuffer. */
  2233.     if (use_temp_buf)
  2234.         sg_dma_address(&fb_data->sg[0]) =
  2235.             fb_data->phys_addr_copybuf;
  2236.     else if (upd_data_list->upd_data.flags & EPDC_FLAG_USE_ALT_BUFFER)
  2237.         sg_dma_address(&fb_data->sg[0]) =
  2238.             upd_data_list->upd_data.alt_buffer_data.phys_addr
  2239.                 + pxp_input_offs;
  2240.     else {
  2241. /* 2011/03/15 FY11 : Supported standby screen. */
  2242.         if ( upd_data_list->use_standbyscreen )
  2243.         {
  2244.             sg_dma_address( &fb_data->sg[0] ) =
  2245.                 fb_data->standbyscreen_buff;
  2246.             sg_set_page(&fb_data->sg[0],
  2247.                 virt_to_page(fb_data->standbyscreen_buff_virt),
  2248.                 fb_data->standbyscreen_buff_size,
  2249.                 offset_in_page(fb_data->standbyscreen_buff_virt));
  2250.         }
  2251.         else
  2252.         {
  2253.             sg_dma_address(&fb_data->sg[0]) =
  2254.                 fb_data->info.fix.smem_start + fb_data->fb_offset
  2255.                 + pxp_input_offs;
  2256.             sg_set_page(&fb_data->sg[0],
  2257.                 virt_to_page(fb_data->info.screen_base),
  2258.                 fb_data->info.fix.smem_len,
  2259.                 offset_in_page(fb_data->info.screen_base));
  2260.         }
  2261.     }
  2262.  
  2263.     /* Update sg[1] to point to output of PxP proc task */
  2264.     sg_dma_address(&fb_data->sg[1]) = upd_data_list->phys_addr
  2265.                         + pxp_output_shift;
  2266.     sg_set_page(&fb_data->sg[1], virt_to_page(upd_data_list->virt_addr),
  2267.             fb_data->max_pix_size,
  2268.             offset_in_page(upd_data_list->virt_addr));
  2269.  
  2270.     /*
  2271.      * Set PxP LUT transform type based on update flags.
  2272.      */
  2273.     fb_data->pxp_conf.proc_data.lut_transform = 0;
  2274.     if (upd_data_list->upd_data.flags & EPDC_FLAG_ENABLE_INVERSION)
  2275.         fb_data->pxp_conf.proc_data.lut_transform |= PXP_LUT_INVERT;
  2276.     if (upd_data_list->upd_data.flags & EPDC_FLAG_FORCE_MONOCHROME)
  2277.         fb_data->pxp_conf.proc_data.lut_transform |=
  2278.             PXP_LUT_BLACK_WHITE;
  2279.  
  2280.     /*
  2281.      * Toggle inversion processing if 8-bit
  2282.      * inverted is the current pixel format.
  2283.      */
  2284.     if (fb_data->epdc_fb_var.grayscale == GRAYSCALE_8BIT_INVERTED)
  2285.         fb_data->pxp_conf.proc_data.lut_transform ^= PXP_LUT_INVERT;
  2286.  
  2287.     /* This is a blocking call, so upon return PxP tx should be done */
  2288.     ret = pxp_process_update(fb_data, src_width, src_height,
  2289.         &pxp_upd_region);
  2290.     if (ret) {
  2291.         dev_err(fb_data->dev, "Unable to submit PxP update task.\n");
  2292.         mutex_unlock(&fb_data->pxp_mutex);
  2293.         return ret;
  2294.     }
  2295.  
  2296.     /* If needed, enable EPDC HW while ePxP is processing */
  2297.     if ((fb_data->power_state == POWER_STATE_OFF)
  2298.         || fb_data->powering_down) {
  2299. /* 2011/03/09 FY11 : Fixed the bug that CPU hangs caused by accessing to EPDC without clock. */
  2300.         ret_powerup = epdc_powerup(fb_data);
  2301.     }
  2302.  
  2303.     /* This is a blocking call, so upon return PxP tx should be done */
  2304.     ret = pxp_complete_update(fb_data, &hist_stat);
  2305.     if (ret) {
  2306.         dev_err(fb_data->dev, "Unable to complete PxP update task.\n");
  2307. /* 2011/03/09 FY11 : Fixed the bug that CPU hangs caused by accessing to EPDC without clock. */
  2308.         if ( ret_powerup == 0 )
  2309.         {
  2310. /* 2011/06/09 FY11 : Fixed the failure of power off. */
  2311.             fb_data->powering_down = true;
  2312.             schedule_delayed_work(&fb_data->epdc_done_work,
  2313.                         msecs_to_jiffies(fb_data->pwrdown_delay));
  2314.         }
  2315.         mutex_unlock(&fb_data->pxp_mutex);
  2316.         return ret;
  2317.     }
  2318.  
  2319.     mutex_unlock(&fb_data->pxp_mutex);
  2320.  
  2321. /* 2011/03/09 FY11 : Fixed the bug that CPU hangs caused by accessing to EPDC without clock. */
  2322.     if( ret_powerup < 0 )
  2323.     {
  2324.         printk( KERN_ERR "%s fails to powerup.%d\n", __func__, ret_powerup );
  2325.         return ret_powerup;
  2326.     }
  2327.     else
  2328.     {
  2329. /* 2011/07/05 FY11 : Added workaround for EPD PMIC heat up. */
  2330.         if ( ! regulator_is_enabled( fb_data->epd_pwr0_regulator ) )
  2331.         {
  2332.             dev_err(fb_data->dev, "EPD PMIC is in abnormal condition.\n");
  2333.             mutex_lock(&fb_data->power_mutex);
  2334.             /* Never turn on epd pmic and disable VSYS_EPD later. */
  2335.             epdc_powerup_err_cnt = EPDC_PROHIBITION_THRESH;
  2336.             regulator_disable(fb_data->vsys_regulator);
  2337.             mutex_unlock(&fb_data->power_mutex);
  2338.             return -EIO;
  2339.         }
  2340.     }
  2341.  
  2342.     /* Update waveform mode from PxP histogram results */
  2343.     if (upd_data_list->upd_data.waveform_mode == WAVEFORM_MODE_AUTO) {
  2344.         if (hist_stat & 0x1)
  2345.             upd_data_list->upd_data.waveform_mode =
  2346.                 fb_data->wv_modes.mode_du;
  2347.         else if (hist_stat & 0x2)
  2348.             upd_data_list->upd_data.waveform_mode =
  2349.                 fb_data->wv_modes.mode_gc4;
  2350.         else if (hist_stat & 0x4)
  2351.             upd_data_list->upd_data.waveform_mode =
  2352.                 fb_data->wv_modes.mode_gc8;
  2353.         else if (hist_stat & 0x8)
  2354.             upd_data_list->upd_data.waveform_mode =
  2355.                 fb_data->wv_modes.mode_gc16;
  2356.         else
  2357.             upd_data_list->upd_data.waveform_mode =
  2358.                 fb_data->wv_modes.mode_gc32;
  2359.  
  2360.         dev_dbg(fb_data->dev, "hist_stat = 0x%x, new waveform = 0x%x\n",
  2361.             hist_stat, upd_data_list->upd_data.waveform_mode);
  2362.     }
  2363.  
  2364.     return 0;
  2365.  
  2366. }
  2367.  
  2368. static int epdc_submit_merge(struct update_data_list *upd_data_list,
  2369.                 struct update_data_list *update_to_merge)
  2370. {
  2371.     struct mxcfb_update_data *a, *b;
  2372.     struct mxcfb_rect *arect, *brect;
  2373.     struct mxcfb_rect combine;
  2374.     bool use_flags = false;
  2375.  
  2376.     a = &upd_data_list->upd_data;
  2377.     b = &update_to_merge->upd_data;
  2378.     arect = &upd_data_list->upd_data.update_region;
  2379.     brect = &update_to_merge->upd_data.update_region;
  2380.  
  2381.     /*
  2382.      * Updates with different flags must be executed sequentially.
  2383.      * Halt the merge process to ensure this.
  2384.      */
  2385.     if (a->flags != b->flags) {
  2386.         /*
  2387.          * Special exception: if update regions are identical,
  2388.          * we may be able to merge them.
  2389.          */
  2390.         if ((arect->left != brect->left) ||
  2391.             (arect->top != brect->top) ||
  2392.             (arect->top == brect->width) ||
  2393.             (arect->top == brect->height))
  2394.             return MERGE_BLOCK;
  2395.  
  2396.         use_flags = true;
  2397.     }
  2398.  
  2399.     if ((a->waveform_mode != b->waveform_mode
  2400.         && a->waveform_mode != WAVEFORM_MODE_AUTO) ||
  2401.         a->update_mode != b->update_mode ||
  2402.         arect->left > (brect->left + brect->width) ||
  2403.         brect->left > (arect->left + arect->width) ||
  2404.         arect->top > (brect->top + brect->height) ||
  2405.         brect->top > (arect->top + arect->height) ||
  2406.         (b->update_marker != 0 && a->update_marker != 0) ||
  2407. /* 2011/03/05 FY11 : Supported A2 mode limitations. */
  2408. /* 2011/03/15 FY11 : Supported standby screen. */
  2409.         (upd_data_list->use_white_buf || update_to_merge->use_white_buf) ||
  2410.         (upd_data_list->use_standbyscreen || update_to_merge->use_standbyscreen) )
  2411.         return MERGE_FAIL;
  2412.  
  2413.     combine.left = arect->left < brect->left ? arect->left : brect->left;
  2414.     combine.top = arect->top < brect->top ? arect->top : brect->top;
  2415.     combine.width = (arect->left + arect->width) >
  2416.             (brect->left + brect->width) ?
  2417.             (arect->left + arect->width - combine.left) :
  2418.             (brect->left + brect->width - combine.left);
  2419.     combine.height = (arect->top + arect->height) >
  2420.             (brect->top + brect->height) ?
  2421.             (arect->top + arect->height - combine.top) :
  2422.             (brect->top + brect->height - combine.top);
  2423.  
  2424.     *arect = combine;
  2425.  
  2426.     /* Use flags of the later update */
  2427.     if (use_flags)
  2428.         a->flags = b->flags;
  2429.  
  2430.     /* Preserve marker value for merged update */
  2431.     if (b->update_marker != 0) {
  2432.         a->update_marker = b->update_marker;
  2433.         upd_data_list->upd_marker_data =
  2434.             update_to_merge->upd_marker_data;
  2435.     }
  2436.  
  2437.     /* Merged update should take on the earliest order */
  2438.     upd_data_list->update_order =
  2439.         (upd_data_list->update_order > update_to_merge->update_order) ?
  2440.         upd_data_list->update_order : update_to_merge->update_order;
  2441.  
  2442.     return MERGE_OK;
  2443. }
  2444.  
  2445.  
  2446.  
  2447. /* 2011/04/19 FY11 : Supported wake lock. */
  2448. static void epdc_wake_lock_for_update_buffer(struct mxc_epdc_fb_data *fb_data )
  2449. {
  2450.     if ( fb_data->counter_for_wlupdate == 0 )
  2451.     {
  2452.         wake_lock( &(fb_data->wake_lock_update) );
  2453.     }
  2454.     fb_data->counter_for_wlupdate++;
  2455.    
  2456.     epdc_debug_printk( "counter for update buffer wake lock = %d\n", fb_data->counter_for_wlupdate );
  2457. }
  2458.  
  2459. static void epdc_wake_unlock_for_update_buffer(struct mxc_epdc_fb_data *fb_data )
  2460. {
  2461.     fb_data->counter_for_wlupdate--;
  2462.     if ( fb_data->counter_for_wlupdate == 0 )
  2463.     {
  2464.         wake_unlock( &(fb_data->wake_lock_update) );
  2465.     }
  2466.     else if( fb_data->counter_for_wlupdate < 0 )
  2467.     {
  2468.         printk( KERN_ERR "%s invalid wake lock counter %d!!!\n", __func__, fb_data->counter_for_wlupdate );
  2469.     }
  2470.     epdc_debug_printk( "counter for update buffer wake lock = %d\n", fb_data->counter_for_wlupdate );
  2471. }
  2472.  
  2473.  
  2474. static void epdc_submit_work_func(struct work_struct *work)
  2475. {
  2476.     int temp_index;
  2477.     struct update_data_list *next_update;
  2478.     struct update_data_list *temp;
  2479.     unsigned long flags;
  2480.     struct mxc_epdc_fb_data *fb_data =
  2481.         container_of(work, struct mxc_epdc_fb_data, epdc_submit_work);
  2482.     struct update_data_list *upd_data_list = NULL;
  2483.     struct mxcfb_rect adj_update_region;
  2484.     bool end_merge = false;
  2485.     int ret;
  2486.  
  2487.     /* Protect access to buffer queues and to update HW */
  2488.     spin_lock_irqsave(&fb_data->queue_lock, flags);
  2489.  
  2490.     /*
  2491.      * Are any of our collision updates able to go now?
  2492.      * Go through all updates in the collision list and check to see
  2493.      * if the collision mask has been fully cleared
  2494.      */
  2495.     list_for_each_entry_safe(next_update, temp,
  2496.                 &fb_data->upd_buf_collision_list->list, list) {
  2497.  
  2498.         if (next_update->collision_mask != 0)
  2499.             continue;
  2500.  
  2501.         dev_dbg(fb_data->dev, "A collision update is ready to go!\n");
  2502.  
  2503.         /*
  2504.          * We have a collision cleared, so select it for resubmission.
  2505.          * If an update is already selected, attempt to merge.
  2506.          */
  2507.         if (!upd_data_list) {
  2508.             upd_data_list = next_update;
  2509.             list_del_init(&next_update->list);
  2510.             if (fb_data->upd_scheme == UPDATE_SCHEME_QUEUE)
  2511.                 /* If not merging, we have our update */
  2512.                 break;
  2513.         } else {
  2514.             switch (epdc_submit_merge(upd_data_list,
  2515.                             next_update)) {
  2516.             case MERGE_OK:
  2517.                 dev_dbg(fb_data->dev,
  2518.                     "Update merged [collision]\n");
  2519.                 list_del_init(&next_update->list);
  2520.                 /* Add to free buffer list */
  2521.                 list_add_tail(&next_update->list,
  2522.                      &fb_data->upd_buf_free_list->list);
  2523. /* 2011/04/19 FY11 : Supported wake lock. */
  2524.                 epdc_wake_unlock_for_update_buffer( fb_data );
  2525.                 break;
  2526.             case MERGE_FAIL:
  2527.                 dev_dbg(fb_data->dev,
  2528.                     "Update not merged [collision]\n");
  2529.                 break;
  2530.             case MERGE_BLOCK:
  2531.                 dev_dbg(fb_data->dev,
  2532.                     "Merge blocked [collision]\n");
  2533.                 end_merge = true;
  2534.                 break;
  2535.             }
  2536.  
  2537.             if (end_merge) {
  2538.                 end_merge = false;
  2539.                 break;
  2540.             }
  2541.         }
  2542.     }
  2543.  
  2544.     /*
  2545.      * Skip update queue only if we found a collision
  2546.      * update and we are not merging
  2547.      */
  2548.     if (!((fb_data->upd_scheme == UPDATE_SCHEME_QUEUE) &&
  2549.         upd_data_list)) {
  2550.         /*
  2551.          * If we didn't find a collision update ready to go,
  2552.          * we try to grab one from the update queue
  2553.          */
  2554.         list_for_each_entry_safe(next_update, temp,
  2555.                     &fb_data->upd_buf_queue->list, list) {
  2556.  
  2557.             dev_dbg(fb_data->dev, "Found a pending update!\n");
  2558.  
  2559.             if (!upd_data_list) {
  2560.                 upd_data_list = next_update;
  2561.                 list_del_init(&next_update->list);
  2562.                 if (fb_data->upd_scheme == UPDATE_SCHEME_QUEUE)
  2563.                     /* If not merging, we have an update */
  2564.                     break;
  2565.             } else {
  2566.                 switch (epdc_submit_merge(upd_data_list,
  2567.                                 next_update)) {
  2568.                 case MERGE_OK:
  2569.                     dev_dbg(fb_data->dev,
  2570.                         "Update merged [queue]\n");
  2571.                     list_del_init(&next_update->list);
  2572.                     /* Add to free buffer list */
  2573.                     list_add_tail(&next_update->list,
  2574.                          &fb_data->upd_buf_free_list->list);
  2575. /* 2011/04/19 FY11 : Supported wake lock. */
  2576.                     epdc_wake_unlock_for_update_buffer( fb_data );
  2577.                     break;
  2578.                 case MERGE_FAIL:
  2579.                     dev_dbg(fb_data->dev,
  2580.                         "Update not merged [queue]\n");
  2581.                     break;
  2582.                 case MERGE_BLOCK:
  2583.                     dev_dbg(fb_data->dev,
  2584.                         "Merge blocked [collision]\n");
  2585.                     end_merge = true;
  2586.                     break;
  2587.                 }
  2588.  
  2589.                 if (end_merge)
  2590.                     break;
  2591.             }
  2592.         }
  2593.     }
  2594.  
  2595.     /* Release buffer queues */
  2596.     spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  2597.  
  2598.     /* Is update list empty? */
  2599.     if (!upd_data_list)
  2600.         return;
  2601.  
  2602.     /* Perform PXP processing - EPDC power will also be enabled */
  2603.     if (epdc_process_update(upd_data_list, fb_data)) {
  2604.         dev_dbg(fb_data->dev, "PXP processing error.\n");
  2605.         /* Protect access to buffer queues and to update HW */
  2606.         spin_lock_irqsave(&fb_data->queue_lock, flags);
  2607.         /* Add to free buffer list */
  2608.         list_add_tail(&upd_data_list->list,
  2609.              &fb_data->upd_buf_free_list->list);
  2610. /* 2011/04/19 FY11 : Supported wake lock. */
  2611.         epdc_wake_unlock_for_update_buffer( fb_data );
  2612.         /* Release buffer queues */
  2613.         spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  2614.         return;
  2615.     }
  2616.  
  2617. /* 2011/2/14 FY11 : Supported auto temperature reading. */
  2618.     mxc_epdc_fb_read_temperature(fb_data);
  2619.  
  2620. /*2011/07/05 FY11 : Modified to support A2 limitation. */
  2621.     /* If addition of updating screen is requested, wait completion of all pane update. */
  2622.     if ( upd_data_list->use_white_buf )
  2623.     {
  2624.         struct mxcfb_update_data inserted_update;
  2625.         u32 disp_val;
  2626.  
  2627.         inserted_update.update_region.left = 0;
  2628.         inserted_update.update_region.top = 0;
  2629.         inserted_update.update_region.width = fb_data->native_width;
  2630.         inserted_update.update_region.height = fb_data->native_height;
  2631.         inserted_update.waveform_mode = fb_data->wv_modes.mode_du;
  2632.         inserted_update.update_mode = UPDATE_MODE_PARTIAL;
  2633.         disp_val = 0xFF;
  2634.         epdc_debug_printk( "Draw inserted screen. (val=%d)\n", disp_val );
  2635.         ret = epdc_draw_rect(fb_data, &inserted_update, disp_val, true);
  2636.         if ( ret < 0 )
  2637.         {
  2638.             printk(KERN_ERR "%s Draw white screen failed. %d\n", __func__, ret );
  2639.         }
  2640.         else
  2641.         {
  2642.             epdc_debug_printk( "Draw white screen completed\n" );
  2643.         }
  2644.     }
  2645.  
  2646.  
  2647.     /* Get rotation-adjusted coordinates */
  2648.     adjust_coordinates(fb_data, &upd_data_list->upd_data.update_region,
  2649.         &adj_update_region);
  2650.  
  2651.     /* Protect access to buffer queues and to update HW */
  2652.     spin_lock_irqsave(&fb_data->queue_lock, flags);
  2653.  
  2654.     /*
  2655.      * Is the working buffer idle?
  2656.      * If the working buffer is busy, we must wait for the resource
  2657.      * to become free. The IST will signal this event.
  2658.      */
  2659.     if (fb_data->cur_update != NULL) {
  2660.         dev_dbg(fb_data->dev, "working buf busy!\n");
  2661.  
  2662.         /* Initialize event signalling an update resource is free */
  2663.         init_completion(&fb_data->update_res_free);
  2664.  
  2665.         fb_data->waiting_for_wb = true;
  2666.  
  2667.         /* Leave spinlock while waiting for WB to complete */
  2668.         spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  2669.         wait_for_completion(&fb_data->update_res_free);
  2670.         spin_lock_irqsave(&fb_data->queue_lock, flags);
  2671.     }
  2672.  
  2673.     /*
  2674.      * If there are no LUTs available,
  2675.      * then we must wait for the resource to become free.
  2676.      * The IST will signal this event.
  2677.      */
  2678.     if (!epdc_any_luts_available()) {
  2679.         dev_dbg(fb_data->dev, "no luts available!\n");
  2680.  
  2681.         /* Initialize event signalling an update resource is free */
  2682.         init_completion(&fb_data->update_res_free);
  2683.  
  2684.         fb_data->waiting_for_lut = true;
  2685.  
  2686.         /* Leave spinlock while waiting for LUT to free up */
  2687.         spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  2688.         wait_for_completion(&fb_data->update_res_free);
  2689.         spin_lock_irqsave(&fb_data->queue_lock, flags);
  2690.     }
  2691.  
  2692.     ret = epdc_choose_next_lut(&upd_data_list->lut_num);
  2693.     /*
  2694.      * If LUT15 is in use:
  2695.      *   - Wait for LUT15 to complete is if TCE underrun prevent is enabled
  2696.      *   - If we go ahead with update, sync update submission with EOF
  2697.      */
  2698.     if (ret && fb_data->tce_prevent) {
  2699.         dev_dbg(fb_data->dev, "Waiting for LUT15\n");
  2700.  
  2701.         /* Initialize event signalling that lut15 is free */
  2702.         init_completion(&fb_data->lut15_free);
  2703.  
  2704.         fb_data->waiting_for_lut15 = true;
  2705.  
  2706.         /* Leave spinlock while waiting for LUT to free up */
  2707.         spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  2708.         wait_for_completion(&fb_data->lut15_free);
  2709.         spin_lock_irqsave(&fb_data->queue_lock, flags);
  2710.  
  2711.         epdc_choose_next_lut(&upd_data_list->lut_num);
  2712.     } else if (ret) {
  2713.         /* Synchronize update submission time to reduce
  2714.                 chances of TCE underrun */
  2715.         init_completion(&fb_data->eof_event);
  2716.  
  2717.         epdc_eof_intr(true);
  2718.  
  2719.         /* Leave spinlock while waiting for EOF event */
  2720.         spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  2721.         ret = wait_for_completion_timeout(&fb_data->eof_event,
  2722.             msecs_to_jiffies(1000));
  2723.         if (!ret) {
  2724.             dev_err(fb_data->dev, "Missed EOF event!\n");
  2725.             epdc_eof_intr(false);
  2726.         }
  2727.         udelay(fb_data->eof_sync_period);
  2728.         spin_lock_irqsave(&fb_data->queue_lock, flags);
  2729.  
  2730.     }
  2731.  
  2732.     /* LUTs are available, so we get one here */
  2733.     fb_data->cur_update = upd_data_list;
  2734.  
  2735.     /* Reset mask for LUTS that have completed during WB processing */
  2736.     fb_data->luts_complete_wb = 0;
  2737.  
  2738.     /* Associate LUT with update marker */
  2739.     if ((fb_data->cur_update->upd_marker_data)
  2740.         && (fb_data->cur_update->upd_marker_data->update_marker != 0))
  2741.         fb_data->cur_update->upd_marker_data->lut_num =
  2742.                         fb_data->cur_update->lut_num;
  2743.  
  2744.     /* Mark LUT with order */
  2745.     fb_data->lut_update_order[fb_data->cur_update->lut_num] =
  2746.         fb_data->cur_update->update_order;
  2747.  
  2748.     /* Enable Collision and WB complete IRQs */
  2749.     epdc_working_buf_intr(true);
  2750.     epdc_lut_complete_intr(fb_data->cur_update->lut_num, true);
  2751.  
  2752.     /* Program EPDC update to process buffer */
  2753.     if (fb_data->cur_update->upd_data.temp != TEMP_USE_AMBIENT) {
  2754.         temp_index = mxc_epdc_fb_get_temp_index(fb_data,
  2755.                 fb_data->cur_update->upd_data.temp);
  2756.         epdc_set_temp(temp_index);
  2757.     }
  2758. /* 2011/02/14 FY11 : Fixed the bug does not set current temperature. */
  2759.     else
  2760.     {
  2761.         epdc_set_temp(fb_data->temp_index);
  2762.     }
  2763.  
  2764.     epdc_set_update_addr(fb_data->cur_update->phys_addr
  2765.                 + fb_data->cur_update->epdc_offs);
  2766.     epdc_set_update_coord(adj_update_region.left, adj_update_region.top);
  2767.     epdc_set_update_dimensions(adj_update_region.width,
  2768.                    adj_update_region.height);
  2769.     epdc_submit_update(fb_data->cur_update->lut_num,
  2770.                fb_data->cur_update->upd_data.waveform_mode,
  2771.                fb_data->cur_update->upd_data.update_mode, false, 0);
  2772.  
  2773.     /* Release buffer queues */
  2774.     spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  2775. }
  2776.  
  2777.  
  2778. /* 2011/03/15 FY11 : Supported standby screen. */
  2779. int mxc_epdc_fb_send_update(struct mxcfb_update_data *upd_data,
  2780.                    struct fb_info *info, bool bStandbyScreen )
  2781. {
  2782.     struct mxc_epdc_fb_data *fb_data = info ?
  2783.         (struct mxc_epdc_fb_data *)info:g_fb_data;
  2784.     struct update_data_list *upd_data_list = NULL;
  2785.     unsigned long flags;
  2786.     int i;
  2787.     struct mxcfb_rect *screen_upd_region; /* Region on screen to update */
  2788.     int temp_index;
  2789.     int ret;
  2790.  
  2791.     /* Has EPDC HW been initialized? */
  2792.     if (!fb_data->hw_ready) {
  2793.         dev_err(fb_data->dev, "Display HW not properly initialized."
  2794.             "  Aborting update.\n");
  2795.         return -EPERM;
  2796.     }
  2797.  
  2798.     /* Check validity of update params */
  2799.     if ((upd_data->update_mode != UPDATE_MODE_PARTIAL) &&
  2800.         (upd_data->update_mode != UPDATE_MODE_FULL)) {
  2801.         dev_err(fb_data->dev,
  2802.             "Update mode 0x%x is invalid.  Aborting update.\n",
  2803.             upd_data->update_mode);
  2804.         return -EINVAL;
  2805.     }
  2806.     if ((upd_data->waveform_mode > 255) &&
  2807.         (upd_data->waveform_mode != WAVEFORM_MODE_AUTO)) {
  2808.         dev_err(fb_data->dev,
  2809.             "Update waveform mode 0x%x is invalid."
  2810.             "  Aborting update.\n",
  2811.             upd_data->waveform_mode);
  2812.         return -EINVAL;
  2813.     }
  2814.     if ((upd_data->update_region.left + upd_data->update_region.width > fb_data->epdc_fb_var.xres) ||
  2815.         (upd_data->update_region.top + upd_data->update_region.height > fb_data->epdc_fb_var.yres)) {
  2816.         dev_err(fb_data->dev,
  2817.             "Update region is outside bounds of framebuffer."
  2818.             "Aborting update.\n");
  2819.         return -EINVAL;
  2820.     }
  2821.     if ((upd_data->flags & EPDC_FLAG_USE_ALT_BUFFER) &&
  2822.         ((upd_data->update_region.width != upd_data->alt_buffer_data.alt_update_region.width) ||
  2823.         (upd_data->update_region.height != upd_data->alt_buffer_data.alt_update_region.height))) {
  2824.         dev_err(fb_data->dev,
  2825.             "Alternate update region dimensions must match screen update region dimensions.\n");
  2826.         return -EINVAL;
  2827.     }
  2828.  
  2829.     spin_lock_irqsave(&fb_data->queue_lock, flags);
  2830.  
  2831.     /*
  2832.      * If we are waiting to go into suspend, or the FB is blanked,
  2833.      * we do not accept new updates
  2834.      */
  2835.     if ((fb_data->waiting_for_idle) ||
  2836.         (fb_data->blank != FB_BLANK_UNBLANK)) {
  2837.         dev_dbg(fb_data->dev, "EPDC not active."
  2838.             "Update request abort.\n");
  2839.         spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  2840.         return -EPERM;
  2841.     }
  2842.  
  2843.     /*
  2844.      * Get available intermediate (PxP output) buffer to hold
  2845.      * processed update region
  2846.      */
  2847.     if (list_empty(&fb_data->upd_buf_free_list->list)) {
  2848.         dev_err(fb_data->dev,
  2849.             "No free intermediate buffers available.\n");
  2850.         spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  2851.         return -ENOMEM;
  2852.     }
  2853.  
  2854. /* 2011/07/05 FY11 : Fixed A2 limitation. */
  2855.     if (    (   ( fb_data->force_wf_mode == false )
  2856.              && ( upd_data->waveform_mode == fb_data->wv_modes.mode_a2 )
  2857.         )
  2858.          || (   ( fb_data->force_wf_mode == true )
  2859.              && ( upd_data->waveform_mode == fb_data->wv_modes.mode_gc16 )
  2860.              && ( upd_data->update_mode == UPDATE_MODE_FULL )
  2861.         )
  2862.        )
  2863.     {
  2864.         // wait all update completion.
  2865.         spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  2866.         epdc_debug_printk( "wait previous updates completion\n" );
  2867.         mxc_epdc_fb_flush_updates(fb_data);
  2868.         spin_lock_irqsave(&fb_data->queue_lock, flags);
  2869.     }
  2870.  
  2871.    
  2872.     /* Grab first available buffer and delete it from the free list */
  2873.     upd_data_list =
  2874.         list_entry(fb_data->upd_buf_free_list->list.next,
  2875.                struct update_data_list, list);
  2876.  
  2877. /* 2011/04/19 FY11 : Supported wake lock. */
  2878.     epdc_wake_lock_for_update_buffer( fb_data );
  2879.     list_del_init(&upd_data_list->list);
  2880.  
  2881.     /* copy update parameters to the current update data object */
  2882.     memcpy(&upd_data_list->upd_data, upd_data,
  2883.            sizeof(struct mxcfb_update_data));
  2884.     memcpy(&upd_data_list->upd_data.update_region, &upd_data->update_region,
  2885.            sizeof(struct mxcfb_rect));
  2886. /* 2011/03/05 FY11 : Supported A2 mode limitations. */
  2887.     upd_data_list->use_white_buf = 0;
  2888.     if (    (   ( fb_data->force_wf_mode == false )
  2889.              && ( upd_data->waveform_mode == fb_data->wv_modes.mode_a2 )
  2890.         )
  2891.          || (   ( fb_data->force_wf_mode == true )
  2892.              && ( upd_data->waveform_mode == fb_data->wv_modes.mode_gc16 )
  2893.              && ( upd_data->update_mode == UPDATE_MODE_FULL )
  2894.         )
  2895.        )
  2896.     {
  2897.         upd_data_list->use_white_buf = 1;
  2898.  
  2899.         if ( fb_data->force_wf_mode == true )
  2900.         {
  2901.             /* modify update area. */
  2902.             upd_data->update_region.top = 0;
  2903.             upd_data->update_region.left = 0;
  2904.             upd_data->update_region.width = fb_data->info.var.xres;
  2905.             upd_data->update_region.height = fb_data->info.var.yres;
  2906.  
  2907. /* 2011/07/14 FY11 : Added wake lock for A2. (Workaround for noise after sleep.) */
  2908.             wake_unlock( &(fb_data->wake_lock_a2) );
  2909.         }
  2910.         else
  2911.         {
  2912. /* 2011/07/14 FY11 : Added wake lock for A2. (Workaround for noise after sleep.) */
  2913.             wake_lock( &(fb_data->wake_lock_a2) );
  2914.         }
  2915.  
  2916.         /* Set force wf mode flag */
  2917.         fb_data->force_wf_mode = !(fb_data->force_wf_mode);
  2918.     }
  2919.  
  2920.  
  2921.     /* If marker specified, associate it with a completion */
  2922.     if (upd_data->update_marker != 0) {
  2923.         /* Find available update marker and set it up */
  2924.         for (i = 0; i < EPDC_MAX_NUM_UPDATES; i++) {
  2925.             /* Marker value set to 0 signifies it is not currently in use */
  2926.             if (fb_data->update_marker_array[i].update_marker == 0) {
  2927.                 fb_data->update_marker_array[i].update_marker = upd_data->update_marker;
  2928.                 init_completion(&fb_data->update_marker_array[i].update_completion);
  2929.                 upd_data_list->upd_marker_data = &fb_data->update_marker_array[i];
  2930.                 break;
  2931.             }
  2932.         }
  2933.     } else {
  2934.         if (upd_data_list->upd_marker_data)
  2935.             upd_data_list->upd_marker_data->update_marker = 0;
  2936.     }
  2937.  
  2938.     upd_data_list->update_order = fb_data->order_cnt++;
  2939.  
  2940.  
  2941. /* 2011/03/15 FY11 : Supported standby screen. */
  2942.     if ( bStandbyScreen )
  2943.     {
  2944.         upd_data_list->use_standbyscreen = true;
  2945.     }
  2946.     else
  2947.     {
  2948.         upd_data_list->use_standbyscreen = false;
  2949.     }
  2950.  
  2951.     if (fb_data->upd_scheme != UPDATE_SCHEME_SNAPSHOT) {
  2952.         /* Queued update scheme processing */
  2953.  
  2954.         /* Add processed Y buffer to update list */
  2955.         list_add_tail(&upd_data_list->list,
  2956.                   &fb_data->upd_buf_queue->list);
  2957.  
  2958.         spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  2959.  
  2960.         /* Signal workqueue to handle new update */
  2961.         queue_work(fb_data->epdc_submit_workqueue,
  2962.             &fb_data->epdc_submit_work);
  2963.  
  2964.         return 0;
  2965.     }
  2966.  
  2967.     /* Snapshot update scheme processing */
  2968.  
  2969.     spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  2970.  
  2971.     /*
  2972.      * Hold on to original screen update region, which we
  2973.      * will ultimately use when telling EPDC where to update on panel
  2974.      */
  2975.     screen_upd_region = &upd_data_list->upd_data.update_region;
  2976.  
  2977.     ret = epdc_process_update(upd_data_list, fb_data);
  2978.     if (ret) {
  2979.         mutex_unlock(&fb_data->pxp_mutex);
  2980.         return ret;
  2981.     }
  2982.  
  2983. /* 2011/2/14 FY11 : Supported auto temperature reading. */
  2984.     mxc_epdc_fb_read_temperature(fb_data);
  2985.  
  2986.     /* Pass selected waveform mode back to user */
  2987.     upd_data->waveform_mode = upd_data_list->upd_data.waveform_mode;
  2988.  
  2989.     /* Get rotation-adjusted coordinates */
  2990.     adjust_coordinates(fb_data, &upd_data_list->upd_data.update_region,
  2991.         NULL);
  2992.  
  2993.     /* Grab lock for queue manipulation and update submission */
  2994.     spin_lock_irqsave(&fb_data->queue_lock, flags);
  2995.  
  2996.     /*
  2997.      * Is the working buffer idle?
  2998.      * If either the working buffer is busy, or there are no LUTs available,
  2999.      * then we return and let the ISR handle the update later
  3000.      */
  3001.     if ((fb_data->cur_update != NULL) || !epdc_any_luts_available()) {
  3002.         /* Add processed Y buffer to update list */
  3003.         list_add_tail(&upd_data_list->list,
  3004.                   &fb_data->upd_buf_queue->list);
  3005.  
  3006.         /* Return and allow the update to be submitted by the ISR. */
  3007.         spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  3008.         return 0;
  3009.     }
  3010.  
  3011.     /* LUTs are available, so we get one here */
  3012.     ret = epdc_choose_next_lut(&upd_data_list->lut_num);
  3013.     if (ret && fb_data->tce_prevent) {
  3014.         dev_dbg(fb_data->dev, "Must wait for LUT15\n");
  3015.         /* Add processed Y buffer to update list */
  3016.         list_add_tail(&upd_data_list->list, &fb_data->upd_buf_queue->list);
  3017.  
  3018.         /* Return and allow the update to be submitted by the ISR. */
  3019.         spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  3020.         return 0;
  3021.     }
  3022.  
  3023.     /* Reset mask for LUTS that have completed during WB processing */
  3024.     fb_data->luts_complete_wb = 0;
  3025.  
  3026.     /* Save current update */
  3027.     fb_data->cur_update = upd_data_list;
  3028.  
  3029.     /* Associate LUT with update marker */
  3030.     if (upd_data_list->upd_marker_data)
  3031.         if (upd_data_list->upd_marker_data->update_marker != 0)
  3032.             upd_data_list->upd_marker_data->lut_num = upd_data_list->lut_num;
  3033.  
  3034.     /* Mark LUT as containing new update */
  3035.     fb_data->lut_update_order[upd_data_list->lut_num] =
  3036.         upd_data_list->update_order;
  3037.  
  3038.     /* Clear status and Enable LUT complete and WB complete IRQs */
  3039.     epdc_working_buf_intr(true);
  3040.     epdc_lut_complete_intr(fb_data->cur_update->lut_num, true);
  3041.  
  3042.     /* Program EPDC update to process buffer */
  3043.     epdc_set_update_addr(upd_data_list->phys_addr + upd_data_list->epdc_offs);
  3044.     epdc_set_update_coord(screen_upd_region->left, screen_upd_region->top);
  3045.     epdc_set_update_dimensions(screen_upd_region->width,
  3046.         screen_upd_region->height);
  3047.     if (upd_data_list->upd_data.temp != TEMP_USE_AMBIENT) {
  3048.         temp_index = mxc_epdc_fb_get_temp_index(fb_data,
  3049.             upd_data_list->upd_data.temp);
  3050.         epdc_set_temp(temp_index);
  3051.     } else
  3052.         epdc_set_temp(fb_data->temp_index);
  3053.  
  3054.     epdc_submit_update(upd_data_list->lut_num,
  3055.                upd_data_list->upd_data.waveform_mode,
  3056.                upd_data_list->upd_data.update_mode, false, 0);
  3057.  
  3058.     spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  3059.     return 0;
  3060. }
  3061. EXPORT_SYMBOL(mxc_epdc_fb_send_update);
  3062.  
  3063. int mxc_epdc_fb_wait_update_complete(u32 update_marker, struct fb_info *info)
  3064. {
  3065.     struct mxc_epdc_fb_data *fb_data = info ?
  3066.         (struct mxc_epdc_fb_data *)info:g_fb_data;
  3067.     int ret = 0;
  3068.     int i, retry;
  3069.  
  3070. /* 2011/06/13 FY11 : Added the function to wait all update requests. */
  3071.     /* 0 means to wait all update requests. */
  3072.     if (update_marker == 0)
  3073.     {
  3074.         epdc_debug_printk( "wait all update request's completion\n" );
  3075.  
  3076.         // wait starting of all panel update requested by application.
  3077.         mxc_epdc_fb_flush_updates(fb_data);
  3078.  
  3079.         /* Enable clocks to EPDC */
  3080.         mutex_lock(&fb_data->power_mutex);
  3081.         clk_enable(fb_data->epdc_clk_axi);
  3082.         clk_enable(fb_data->epdc_clk_pix);
  3083.         epdc_clock_gating(false);
  3084.         mutex_unlock(&fb_data->power_mutex);
  3085.  
  3086.         epdc_debug_printk( "wait each lut completion\n" );
  3087.         // wait all update completion.
  3088.         for ( i = 0; i < EPDC_NUM_LUTS; i++ )
  3089.         {
  3090.             retry = 30;
  3091.             while( epdc_is_lut_active(i) ||
  3092.                 epdc_is_working_buffer_busy() )
  3093.             {
  3094.                 epdc_debug_printk( "wait lut %d completion\n", i );
  3095.                 msleep(100);
  3096.                 retry--;
  3097.                 if ( retry == 0 )
  3098.                 {
  3099.                     printk( KERN_ERR "%s wait lut %d idle timeout.\n", __func__, i );
  3100.                     ret = -ETIMEDOUT;
  3101.                     break;
  3102.                 }
  3103.             }
  3104.         }
  3105.  
  3106.         /* disable clocks to EPDC */
  3107.         mutex_lock(&fb_data->power_mutex);
  3108.         epdc_clock_gating(true);
  3109.         clk_disable(fb_data->epdc_clk_axi);
  3110.         clk_disable(fb_data->epdc_clk_pix);
  3111.         mutex_unlock(&fb_data->power_mutex);
  3112.  
  3113.         return ret;    
  3114.     }
  3115.  
  3116.     /*
  3117.      * Wait for completion associated with update_marker requested.
  3118.      * Note: If update completed already, marker will have been
  3119.      * cleared and we will just return
  3120.      */
  3121.     epdc_debug_printk( "wait update request(marker=0x%08X\n", update_marker );
  3122.     for (i = 0; i < EPDC_MAX_NUM_UPDATES; i++) {
  3123.         if (fb_data->update_marker_array[i].update_marker == update_marker) {
  3124.             dev_dbg(fb_data->dev, "Waiting for marker %d\n", update_marker);
  3125.             ret = wait_for_completion_timeout(&fb_data->update_marker_array[i].update_completion, msecs_to_jiffies(5000));
  3126.             if (!ret)
  3127.                 dev_err(fb_data->dev, "Timed out waiting for update completion\n");
  3128.             dev_dbg(fb_data->dev, "marker %d signalled!\n", update_marker);
  3129.             break;
  3130.         }
  3131.     }
  3132.  
  3133.     return 0;
  3134. }
  3135. EXPORT_SYMBOL(mxc_epdc_fb_wait_update_complete);
  3136.  
  3137. int mxc_epdc_fb_set_pwrdown_delay(u32 pwrdown_delay,
  3138.                         struct fb_info *info)
  3139. {
  3140.     struct mxc_epdc_fb_data *fb_data = info ?
  3141.         (struct mxc_epdc_fb_data *)info:g_fb_data;
  3142.  
  3143.     fb_data->pwrdown_delay = pwrdown_delay;
  3144.  
  3145.     return 0;
  3146. }
  3147. EXPORT_SYMBOL(mxc_epdc_fb_set_pwrdown_delay);
  3148.  
  3149. int mxc_epdc_get_pwrdown_delay(struct fb_info *info)
  3150. {
  3151.     struct mxc_epdc_fb_data *fb_data = info ?
  3152.         (struct mxc_epdc_fb_data *)info:g_fb_data;
  3153.  
  3154.     return fb_data->pwrdown_delay;
  3155. }
  3156. EXPORT_SYMBOL(mxc_epdc_get_pwrdown_delay);
  3157.  
  3158. static int mxc_epdc_fb_set_pwr0_ctrl(u32 ctrl,
  3159.                         struct fb_info *info)
  3160. {
  3161.     struct mxc_epdc_fb_data *fb_data = (struct mxc_epdc_fb_data *)info;
  3162.  
  3163.     if (ctrl)
  3164.       regulator_enable(fb_data->epd_pwr0_regulator);
  3165.     else
  3166.       regulator_disable(fb_data->epd_pwr0_regulator);
  3167.  
  3168.     return 0;
  3169. }
  3170.  
  3171. static int mxc_epdc_fb_set_pwr2_ctrl(u32 ctrl,
  3172.                         struct fb_info *info)
  3173. {
  3174.     struct mxc_epdc_fb_data *fb_data = (struct mxc_epdc_fb_data *)info;
  3175.  
  3176.     if (ctrl)
  3177.         regulator_enable(fb_data->epd_pwr2_regulator);
  3178.     else
  3179.         regulator_disable(fb_data->epd_pwr2_regulator);
  3180.     return 0;
  3181. }
  3182.  
  3183.  
  3184. /* 2011/1/19 FY11 : Added function to read/write VCOM. */
  3185. int mxc_epdc_fb_set_vcom_voltage( u32 uvoltage, struct fb_info *info)
  3186. {
  3187.     int ret = 0;
  3188.     int savedPowerState;
  3189.     struct mxc_epdc_fb_data *fb_data = (struct mxc_epdc_fb_data*)info;
  3190.  
  3191.     if ((savedPowerState = fb_data->power_state) == POWER_STATE_OFF)
  3192.         regulator_enable(fb_data->display_regulator);
  3193.  
  3194.     ret = regulator_set_voltage(fb_data->vcom_regulator, 0, uvoltage);
  3195.     if ( ret < 0 )
  3196.     {
  3197.         printk( KERN_ERR "Fail to set vcom voltage!! %d\n", ret );
  3198.     }
  3199.  
  3200.     if (savedPowerState == POWER_STATE_OFF)
  3201.         regulator_disable(fb_data->display_regulator);
  3202.  
  3203.     return ret;
  3204. }
  3205.  
  3206. /* 2011/1/19 FY11 : Added function to read/write VCOM. */
  3207. int mxc_epdc_fb_get_vcom_voltage( u32* uvoltage, struct fb_info *info)
  3208. {
  3209.     int ret = 0;
  3210.     int savedPowerState;
  3211.     struct mxc_epdc_fb_data *fb_data;
  3212.  
  3213.     if ( uvoltage == NULL )
  3214.     {
  3215.         return -EINVAL;
  3216.     }
  3217.     fb_data = (struct mxc_epdc_fb_data*)info;
  3218.  
  3219.     if ((savedPowerState = fb_data->power_state) == POWER_STATE_OFF)
  3220.         regulator_enable(fb_data->display_regulator);
  3221.  
  3222.  
  3223.     ret = regulator_get_voltage(fb_data->vcom_regulator);
  3224.     if ( ret < 0 )
  3225.     {
  3226.         printk( KERN_ERR "Fail to get vcom voltage. %d\n", ret );
  3227.     }
  3228.     else
  3229.     {
  3230.         *uvoltage = (u32)ret;
  3231.         ret = 0;    /* 2011/04/14 FY11 : Fixed invalid return value. */
  3232.     }
  3233.  
  3234.     if (savedPowerState == POWER_STATE_OFF)
  3235.         regulator_disable(fb_data->display_regulator);
  3236.  
  3237.     return ret;
  3238. }
  3239.  
  3240.  
  3241. /* 2011/03/08 FY11 : Added command to write waveform. */
  3242. static int mxc_epdc_fb_write_wf( struct mxcfb_waveform_data *wf_data,
  3243.                  struct fb_info *fbinfo )
  3244. {
  3245.     int ret = 0;
  3246.     int i, wf_data_size;
  3247.     unsigned long ulWfIndex, ulWfAreaSize;
  3248.  
  3249.     ulWfIndex = rawdata_index("Waveform", &ulWfAreaSize);
  3250.     if ( (ulWfAreaSize - sizeof(struct epd_settings) - sizeof(unsigned long) ) < wf_data->uiSize )
  3251.     {
  3252.         printk( KERN_ERR "Waveform is too large !!\n" );
  3253.         return -EINVAL;
  3254.     }
  3255.  
  3256. /* 2011/06/08 FY11 : Modified to use static buffer for waveform. */
  3257.     wf_data_size = (wf_data->uiSize);
  3258.     for ( i = 0; wf_data_size > 0; i++ )
  3259.     {
  3260.         ret = copy_from_user(   wf_tmp_buf,
  3261.                     wf_data->pcData + i * WF_TMP_BUF_SIZE,
  3262.                     wf_data_size > WF_TMP_BUF_SIZE ? WF_TMP_BUF_SIZE : wf_data_size);
  3263.         if ( ret < 0 )
  3264.         {
  3265.             printk( KERN_ERR "%s fail to read wf from user. %d\n", __func__, ret );
  3266.             goto out;
  3267.         }
  3268.  
  3269.         ret = rawdata_write( ulWfIndex, i*WF_TMP_BUF_SIZE,
  3270.                      wf_tmp_buf,
  3271.                      wf_data_size > WF_TMP_BUF_SIZE ? WF_TMP_BUF_SIZE : wf_data_size);
  3272.         if ( ret < 0 )
  3273.         {
  3274.             printk( KERN_ERR "%s fail to write wf. %d\n", __func__, ret );
  3275.             goto out;
  3276.         }
  3277.  
  3278.         wf_data_size -= WF_TMP_BUF_SIZE;
  3279.     }
  3280.  
  3281. out:
  3282.     return ret;
  3283. }
  3284.  
  3285.  
  3286. /* 2011/04/12 FY11 : Supported to write panel init flag. */
  3287. static int mxc_epdc_set_panel_init_flag ( unsigned char ucFlag, struct mxc_epdc_fb_data *fb_data )
  3288. {
  3289.     int ret = 0;
  3290.     unsigned long ulWfIndex, ulWfAreaSize;
  3291.     unsigned long epd_setting_flag;
  3292.  
  3293.     ulWfIndex = rawdata_index("Waveform", &ulWfAreaSize);
  3294.     ret = rawdata_read( ulWfIndex,
  3295.                 ulWfAreaSize - sizeof(struct epd_settings) + offsetof(struct epd_settings, flag),
  3296.                 (char*)&epd_setting_flag,
  3297.                 sizeof(epd_setting_flag) );
  3298.     if ( ret < 0 )
  3299.     {
  3300.         printk ( KERN_ERR "%s fail to read flag from eMMC.\n", __func__ );
  3301.     }
  3302.     else
  3303.     {
  3304.         if (ucFlag)
  3305.         {
  3306.             epd_setting_flag |= EPD_SETTING_PANEL_INIT;
  3307.             fb_data->panel_clear_at_shutdown = false;
  3308.         }
  3309.         else
  3310.         {
  3311.             epd_setting_flag &= ~EPD_SETTING_PANEL_INIT;
  3312.             fb_data->panel_clear_at_shutdown = true;
  3313.         }
  3314.         ret = rawdata_write( ulWfIndex,
  3315.                     ulWfAreaSize - sizeof(struct epd_settings) + offsetof(struct epd_settings, flag),
  3316.                     (char*)&epd_setting_flag,
  3317.                     sizeof(epd_setting_flag) );
  3318.         if ( ret < 0 )
  3319.         {
  3320.             printk ( KERN_ERR "%s fail to write flag to eMMC.\n", __func__ );
  3321.         }
  3322.     }
  3323.  
  3324.     return ret;
  3325. }
  3326.  
  3327.  
  3328.  
  3329. static int mxc_epdc_fb_ioctl(struct fb_info *info, unsigned int cmd,
  3330.                  unsigned long arg)
  3331. {
  3332.     void __user *argp = (void __user *)arg;
  3333.     int ret = -EINVAL;
  3334.  
  3335.  
  3336. /* 2011/04/19 FY11 : Supported wake lock. */
  3337.     struct mxc_epdc_fb_data *fb_data_ioctl =
  3338.             (struct mxc_epdc_fb_data *)info;
  3339.     wake_lock(&(fb_data_ioctl->wake_lock_ioctl));
  3340.  
  3341.  
  3342.     switch (cmd) {
  3343.     case MXCFB_SET_WAVEFORM_MODES:
  3344.         {
  3345.             struct mxcfb_waveform_modes modes;
  3346.             if (!copy_from_user(&modes, argp, sizeof(modes))) {
  3347.                 mxc_epdc_fb_set_waveform_modes(&modes, info);
  3348.                 ret = 0;
  3349.             }
  3350.             break;
  3351.         }
  3352.     case MXCFB_SET_TEMPERATURE:
  3353.         {
  3354.             int temperature;
  3355.             if (!get_user(temperature, (int32_t __user *) arg))
  3356.                 ret = mxc_epdc_fb_set_temperature(temperature,
  3357.                     info);
  3358.             break;
  3359.         }
  3360.     case MXCFB_SET_AUTO_UPDATE_MODE:
  3361.         {
  3362.             u32 auto_mode = 0;
  3363.             if (!get_user(auto_mode, (__u32 __user *) arg))
  3364.                 ret = mxc_epdc_fb_set_auto_update(auto_mode,
  3365.                     info);
  3366.             break;
  3367.         }
  3368.     case MXCFB_SET_UPDATE_SCHEME:
  3369.         {
  3370.             u32 upd_scheme = 0;
  3371.             if (!get_user(upd_scheme, (__u32 __user *) arg))
  3372.                 ret = mxc_epdc_fb_set_upd_scheme(upd_scheme,
  3373.                     info);
  3374.             break;
  3375.         }
  3376.     case MXCFB_SEND_UPDATE:
  3377.         {
  3378.             struct mxcfb_update_data upd_data;
  3379.             if (!copy_from_user(&upd_data, argp,
  3380.                 sizeof(upd_data))) {
  3381.                 ret = mxc_epdc_fb_send_update(&upd_data, info, false);
  3382.                 if (ret == 0 && copy_to_user(argp, &upd_data,
  3383.                     sizeof(upd_data)))
  3384.                     ret = -EFAULT;
  3385.             } else {
  3386.                 ret = -EFAULT;
  3387.             }
  3388.  
  3389.             break;
  3390.         }
  3391.     case MXCFB_WAIT_FOR_UPDATE_COMPLETE:
  3392.         {
  3393.             u32 update_marker = 0;
  3394.             if (!get_user(update_marker, (__u32 __user *) arg))
  3395.                 ret =
  3396.                     mxc_epdc_fb_wait_update_complete(update_marker,
  3397.                     info);
  3398.             break;
  3399.         }
  3400.  
  3401.     case MXCFB_SET_PWRDOWN_DELAY:
  3402.         {
  3403.             int delay = 0;
  3404.             if (!get_user(delay, (__u32 __user *) arg))
  3405.                 ret =
  3406.                     mxc_epdc_fb_set_pwrdown_delay(delay, info);
  3407.             break;
  3408.         }
  3409.  
  3410.     case MXCFB_GET_PWRDOWN_DELAY:
  3411.         {
  3412.             int pwrdown_delay = mxc_epdc_get_pwrdown_delay(info);
  3413.             if (put_user(pwrdown_delay,
  3414.                 (int __user *)argp))
  3415.                 ret = -EFAULT;
  3416.             ret = 0;
  3417.             break;
  3418.         }
  3419.  
  3420. /* 2011/1/19 FY11 : Added function to read/write VCOM. */
  3421.     case MXCFB_SET_VCOM:
  3422.         {
  3423.             u32 uvoltage = 0;
  3424.             if (!get_user(uvoltage, (__u32 __user *) arg))
  3425.                 ret = mxc_epdc_fb_set_vcom_voltage(uvoltage, info);
  3426.             break;
  3427.         }
  3428.     case MXCFB_GET_VCOM:
  3429.         {
  3430.             u32 uvoltage = 0;
  3431.             ret = mxc_epdc_fb_get_vcom_voltage(&uvoltage, info);
  3432.             if ( ret < 0 )
  3433.             {
  3434.                 break;
  3435.             }
  3436.             if (put_user(uvoltage,(__u32 __user *)argp))
  3437.             {
  3438.                 ret = -EFAULT;
  3439.             }
  3440.             break;
  3441.         }
  3442.  
  3443.     case MXCFB_GET_PMIC_TEMPERATURE:
  3444.         {
  3445.             struct mxc_epdc_fb_data *fb_data =
  3446.                 (struct mxc_epdc_fb_data *)info;
  3447.            
  3448.             int temperature;
  3449.             int savedPowerState;
  3450.  
  3451. /* 2011/2/3 FY11: Fixed the bug that could not disable power after reading temperature.*/
  3452.             if ((savedPowerState = fb_data->power_state) == POWER_STATE_OFF)
  3453.                 regulator_enable(fb_data->display_regulator);
  3454.             temperature = regulator_get_voltage(fb_data->temp_regulator);
  3455.             if (savedPowerState == POWER_STATE_OFF)
  3456.                 regulator_disable(fb_data->display_regulator);
  3457.  
  3458.             ret = 0;
  3459. #if 1 /* E_BOOK */
  3460. /* 2010/12/10 FY11: Fixed the bug to return correct temperature.*/
  3461.             if (temperature < 0 )   // err
  3462.             {
  3463.                 ret = temperature;
  3464.             }
  3465.             else
  3466.             {
  3467.                 if ( temperature >= MINUS_TEMPERATURE )
  3468.                 {
  3469.                     temperature -= MINUS_TEMP_ADJUST_VAL;
  3470.                 }
  3471.    
  3472.                 if (put_user(temperature,(int __user *)argp))
  3473.                 {
  3474.                     ret = -EFAULT;
  3475.                 }
  3476.             }
  3477. #endif /* E_BOOK */
  3478.             break;
  3479.         }
  3480.  
  3481.     case MXCFB_SET_BORDER_MODE:
  3482.         {
  3483.             int mode;
  3484.             if (!get_user(mode, (int32_t __user *) arg))
  3485.                 ret =
  3486.                     mxc_epdc_fb_set_border_mode(mode,
  3487.                     info);
  3488.             break;
  3489.         }
  3490.     case MXCFB_SET_EPD_PWR0_CTRL:
  3491.         {
  3492.             int control = 0;
  3493.             if (!get_user(control, (__u32 __user *) arg))
  3494.                 ret =
  3495.                     mxc_epdc_fb_set_pwr0_ctrl(control, info);
  3496.             break;
  3497.         }
  3498.  
  3499.     case MXCFB_SET_EPD_PWR2_CTRL:
  3500.         {
  3501.             int control = 0;
  3502.             if (!get_user(control, (__u32 __user *) arg))
  3503.                 ret =
  3504.                     mxc_epdc_fb_set_pwr2_ctrl(control, info);
  3505.             break;
  3506.         }
  3507. /* 2011/2/24 FY11 : Supported to read waveform version. */
  3508.     case MXCFB_GET_WF_VERSION:
  3509.         {
  3510.             ret = copy_to_user(argp, &(s_st_wfversion.version[0]), WF_VER_LEN );
  3511.             if ( ret < 0 )
  3512.             {
  3513.                 printk( KERN_ERR "copy waveform version failed. %d\n", ret );
  3514.             }
  3515.             break;
  3516.         }
  3517. /* 2011/03/08 FY11 : Added command to write waveform. */
  3518.     case MXCFB_WRITE_WF:
  3519.         {
  3520.             struct mxc_epdc_fb_data *fb_data =
  3521.                 (struct mxc_epdc_fb_data *)info;
  3522.             struct mxcfb_waveform_data wf_data;
  3523.             ret = copy_from_user(&wf_data, argp, sizeof(wf_data) );
  3524.             if ( ret != 0 )
  3525.             {
  3526.                 printk( KERN_ERR "Fail to read waveform from user.\n" );
  3527.                 ret = -EFAULT;
  3528.             }
  3529.  
  3530.             /* wait for completion of all updates */
  3531.             flush_workqueue(fb_data->epdc_submit_workqueue);
  3532.  
  3533.             /* write waveform to eMMC. */
  3534.             ret = mxc_epdc_fb_write_wf(&wf_data, info );
  3535.             if ( ret < 0 )
  3536.             {
  3537.                 printk( KERN_ERR "Fail to write waveform to eMMC.\n" );
  3538.             }
  3539.  
  3540.             /* reload waveform */
  3541. /* 2011/06/07 FY11 : Modified to share static memory for epdc with bootloader. */
  3542.             ret = mxc_epdc_fb_load_wf( fb_data, true );
  3543.             if ( ret < 0 )
  3544.             {
  3545.                 printk( KERN_ERR "Fail to reload waveform from eMMC and to init EPDC.\n" );
  3546.             }
  3547.  
  3548.             /* panel init */
  3549. /* 2011/04/06 FY11 : Modified to call panel init independently. (Not included in mxc_epdc_fb_load_wf) */
  3550.             draw_mode0( fb_data );
  3551.             break;
  3552.         }
  3553. /* 2011/03/30 FY11 : Supported to write stanby screen image. */
  3554.     case MXCFB_WRITE_SSCREEN:
  3555.         {
  3556.             struct mxc_epdc_fb_data *fb_data =
  3557.                 (struct mxc_epdc_fb_data *)info;
  3558.             char *pBuf = NULL;
  3559.             int line = 0;
  3560.             int byteperpix = info->var.bits_per_pixel/8;
  3561.             ret = copy_from_user(&pBuf, argp, sizeof(char*) );
  3562.             if ( ret != 0 )
  3563.             {
  3564.                 printk( KERN_ERR "Fail to read buffer pointer from user.\n" );
  3565.                 ret = -EFAULT;
  3566.             }
  3567.  
  3568.             for ( line = 0; line < info->var.yres; line++ )
  3569.             {
  3570.                 ret = copy_from_user( (fb_data->standbyscreen_buff_virt) + line*(info->var.xres_virtual)*byteperpix,
  3571.                             pBuf + line*(info->var.xres)*byteperpix,
  3572.                             (info->var.xres) * byteperpix );
  3573.                 if ( ret < 0 )
  3574.                 {
  3575.                     printk( KERN_ERR "Fail to read standby screen image from user. %d\n", ret );
  3576.                     break;
  3577.                 }
  3578.             }
  3579.  
  3580.             break;
  3581.         }
  3582. /* 2011/04/12 FY11 : Supported to write panel init flag. */
  3583.     case MXCFB_SET_PANELINIT:
  3584.         {
  3585.             struct mxc_epdc_fb_data *fb_data =
  3586.                 (struct mxc_epdc_fb_data *)info;
  3587.             unsigned char ucFlag;
  3588.             ret = copy_from_user(&ucFlag, argp, sizeof(unsigned char) );
  3589.             if ( ret != 0 )
  3590.             {
  3591.                 printk( KERN_ERR "Fail to read Flag from user.\n" );
  3592.                 ret = -EFAULT;
  3593.                 break;
  3594.             }
  3595.             ret = mxc_epdc_set_panel_init_flag(ucFlag, fb_data);
  3596.             break;
  3597.         }
  3598.     default:
  3599.         break;
  3600.     }
  3601.  
  3602. /* 2011/04/19 FY11 : Supported wake lock. */
  3603.     wake_unlock(&(fb_data_ioctl->wake_lock_ioctl));
  3604.  
  3605.     return ret;
  3606. }
  3607.  
  3608. static void mxc_epdc_fb_update_pages(struct mxc_epdc_fb_data *fb_data,
  3609.                      u16 y1, u16 y2)
  3610. {
  3611.     struct mxcfb_update_data update;
  3612.  
  3613.     /* Do partial screen update, Update full horizontal lines */
  3614.     update.update_region.left = 0;
  3615.     update.update_region.width = fb_data->epdc_fb_var.xres;
  3616.     update.update_region.top = y1;
  3617.     update.update_region.height = y2 - y1;
  3618.     update.waveform_mode = WAVEFORM_MODE_AUTO;
  3619.     update.update_mode = UPDATE_MODE_FULL;
  3620.     update.update_marker = 0;
  3621.     update.temp = TEMP_USE_AMBIENT;
  3622.     update.flags = 0;
  3623.  
  3624.     mxc_epdc_fb_send_update(&update, &fb_data->info, false);
  3625. }
  3626.  
  3627. /* this is called back from the deferred io workqueue */
  3628. static void mxc_epdc_fb_deferred_io(struct fb_info *info,
  3629.                     struct list_head *pagelist)
  3630. {
  3631.     struct mxc_epdc_fb_data *fb_data = (struct mxc_epdc_fb_data *)info;
  3632.     struct page *page;
  3633.     unsigned long beg, end;
  3634.     int y1, y2, miny, maxy;
  3635.  
  3636.     if (fb_data->auto_mode != AUTO_UPDATE_MODE_AUTOMATIC_MODE)
  3637.         return;
  3638.  
  3639.     miny = INT_MAX;
  3640.     maxy = 0;
  3641.     list_for_each_entry(page, pagelist, lru) {
  3642.         beg = page->index << PAGE_SHIFT;
  3643.         end = beg + PAGE_SIZE - 1;
  3644.         y1 = beg / info->fix.line_length;
  3645.         y2 = end / info->fix.line_length;
  3646.         if (y2 >= fb_data->epdc_fb_var.yres)
  3647.             y2 = fb_data->epdc_fb_var.yres - 1;
  3648.         if (miny > y1)
  3649.             miny = y1;
  3650.         if (maxy < y2)
  3651.             maxy = y2;
  3652.     }
  3653.  
  3654.     mxc_epdc_fb_update_pages(fb_data, miny, maxy);
  3655. }
  3656.  
  3657. void mxc_epdc_fb_flush_updates(struct mxc_epdc_fb_data *fb_data)
  3658. {
  3659.     unsigned long flags;
  3660.     int ret;
  3661.  
  3662.     clk_enable(fb_data->epdc_clk_axi);
  3663.     epdc_clock_gating(false);       // enable clock
  3664.  
  3665.     /* Grab queue lock to prevent any new updates from being submitted */
  3666.     spin_lock_irqsave(&fb_data->queue_lock, flags);
  3667.  
  3668. /* 2011/07/15 FY11 : Added checking of active luts. */
  3669.     if ( (!is_free_list_full(fb_data)) ||
  3670.         epdc_any_luts_active() )
  3671.     {
  3672.         /* Initialize event signalling updates are done */
  3673.         init_completion(&fb_data->updates_done);
  3674.         fb_data->waiting_for_idle = true;
  3675.  
  3676.         spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  3677.         /* Wait for any currently active updates to complete */
  3678.         ret = wait_for_completion_timeout(&fb_data->updates_done, msecs_to_jiffies(10000));
  3679.         if(!ret)
  3680.         {
  3681.             printk(KERN_ERR "%s wait timeout. ret=%d\n", __func__, ret );
  3682.         }
  3683.  
  3684.         spin_lock_irqsave(&fb_data->queue_lock, flags);
  3685.         fb_data->waiting_for_idle = false;
  3686.     }
  3687.  
  3688.     spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  3689.  
  3690.     epdc_clock_gating(true);
  3691.     clk_disable(fb_data->epdc_clk_axi);
  3692. }
  3693.  
  3694. static int mxc_epdc_fb_blank(int blank, struct fb_info *info)
  3695. {
  3696.     struct mxc_epdc_fb_data *fb_data = (struct mxc_epdc_fb_data *)info;
  3697.  
  3698.     dev_dbg(fb_data->dev, "blank = %d\n", blank);
  3699.  
  3700.     if (fb_data->blank == blank)
  3701.         return 0;
  3702.  
  3703.     fb_data->blank = blank;
  3704.  
  3705.     switch (blank) {
  3706.     case FB_BLANK_POWERDOWN:
  3707.     case FB_BLANK_VSYNC_SUSPEND:
  3708.     case FB_BLANK_HSYNC_SUSPEND:
  3709.     case FB_BLANK_NORMAL:
  3710.         mxc_epdc_fb_flush_updates(fb_data);
  3711.         break;
  3712.     }
  3713.     return 0;
  3714. }
  3715.  
  3716. static int mxc_epdc_fb_pan_display(struct fb_var_screeninfo *var,
  3717.                    struct fb_info *info)
  3718. {
  3719.     struct mxc_epdc_fb_data *fb_data = (struct mxc_epdc_fb_data *)info;
  3720.     u_int y_bottom;
  3721.     unsigned long flags;
  3722.  
  3723.     dev_dbg(info->device, "%s: var->yoffset %d, info->var.yoffset %d\n",
  3724.          __func__, var->yoffset, info->var.yoffset);
  3725.     /* check if var is valid; also, xpan is not supported */
  3726.     if (!var || (var->xoffset != info->var.xoffset) ||
  3727.         (var->yoffset + var->yres > var->yres_virtual)) {
  3728.         dev_dbg(info->device, "x panning not supported\n");
  3729.         return -EINVAL;
  3730.     }
  3731.  
  3732.     if ((fb_data->epdc_fb_var.xoffset == var->xoffset) &&
  3733.         (fb_data->epdc_fb_var.yoffset == var->yoffset))
  3734.         return 0;   /* No change, do nothing */
  3735.  
  3736.     y_bottom = var->yoffset;
  3737.  
  3738.     if (!(var->vmode & FB_VMODE_YWRAP))
  3739.         y_bottom += var->yres;
  3740.  
  3741.     if (y_bottom > info->var.yres_virtual) {
  3742.         return -EINVAL;
  3743.     }
  3744.  
  3745.     /* Display panning should be done when PXP doesn't access
  3746.      * the frame buffer
  3747.      */
  3748.     mutex_lock(&fb_data->pxp_mutex);
  3749.  
  3750.     spin_lock_irqsave(&fb_data->queue_lock, flags);
  3751.  
  3752.     fb_data->fb_offset = (var->yoffset * var->xres_virtual + var->xoffset)
  3753.         * (var->bits_per_pixel) / 8;
  3754.  
  3755.     fb_data->epdc_fb_var.xoffset = var->xoffset;
  3756.     fb_data->epdc_fb_var.yoffset = var->yoffset;
  3757.  
  3758.     if (var->vmode & FB_VMODE_YWRAP)
  3759.         info->var.vmode |= FB_VMODE_YWRAP;
  3760.     else
  3761.         info->var.vmode &= ~FB_VMODE_YWRAP;
  3762.  
  3763.     spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  3764.  
  3765.     mutex_unlock(&fb_data->pxp_mutex);
  3766.  
  3767.     return 0;
  3768. }
  3769.  
  3770. static struct fb_ops mxc_epdc_fb_ops = {
  3771.     .owner = THIS_MODULE,
  3772.     .fb_check_var = mxc_epdc_fb_check_var,
  3773.     .fb_set_par = mxc_epdc_fb_set_par,
  3774.     .fb_setcolreg = mxc_epdc_fb_setcolreg,
  3775.     .fb_pan_display = mxc_epdc_fb_pan_display,
  3776.     .fb_ioctl = mxc_epdc_fb_ioctl,
  3777.     .fb_mmap = mxc_epdc_fb_mmap,
  3778.     .fb_blank = mxc_epdc_fb_blank,
  3779.     .fb_fillrect = cfb_fillrect,
  3780.     .fb_copyarea = cfb_copyarea,
  3781.     .fb_imageblit = cfb_imageblit,
  3782. };
  3783.  
  3784. static struct fb_deferred_io mxc_epdc_fb_defio = {
  3785.     .delay = HZ,
  3786.     .deferred_io = mxc_epdc_fb_deferred_io,
  3787. };
  3788.  
  3789. static void epdc_done_work_func(struct work_struct *work)
  3790. {
  3791.     struct mxc_epdc_fb_data *fb_data =
  3792.         container_of(work, struct mxc_epdc_fb_data,
  3793.             epdc_done_work.work);
  3794.     epdc_powerdown(fb_data);
  3795. }
  3796.  
  3797. static bool is_free_list_full(struct mxc_epdc_fb_data *fb_data)
  3798. {
  3799.     int count = 0;
  3800.     struct update_data_list *plist;
  3801.  
  3802.     /* Count buffers in free buffer list */
  3803.     list_for_each_entry(plist, &fb_data->upd_buf_free_list->list, list)
  3804.         count++;
  3805.  
  3806.     /* Check to see if all buffers are in this list */
  3807.     if (count == EPDC_MAX_NUM_UPDATES)
  3808.         return true;
  3809.     else
  3810.         return false;
  3811. }
  3812.  
  3813. static bool do_updates_overlap(struct update_data_list *update1,
  3814.                     struct update_data_list *update2)
  3815. {
  3816.     struct mxcfb_rect *rect1 = &update1->upd_data.update_region;
  3817.     struct mxcfb_rect *rect2 = &update2->upd_data.update_region;
  3818.     __u32 bottom1, bottom2, right1, right2;
  3819.     bottom1 = rect1->top + rect1->height;
  3820.     bottom2 = rect2->top + rect2->height;
  3821.     right1 = rect1->left + rect1->width;
  3822.     right2 = rect2->left + rect2->width;
  3823.  
  3824.     if ((rect1->top < bottom2) &&
  3825.         (bottom1 > rect2->top) &&
  3826.         (rect1->left < right2) &&
  3827.         (right1 > rect2->left)) {
  3828.         return true;
  3829.     } else
  3830.         return false;
  3831. }
  3832. static irqreturn_t mxc_epdc_irq_handler(int irq, void *dev_id)
  3833. {
  3834.     struct mxc_epdc_fb_data *fb_data = dev_id;
  3835.     struct update_data_list *collision_update;
  3836.     struct mxcfb_rect *next_upd_region;
  3837.     unsigned long flags;
  3838.     int temp_index;
  3839.     u32 temp_mask;
  3840.     u32 missed_coll_mask = 0;
  3841.     u32 lut;
  3842.     bool ignore_collision = false;
  3843.     int i, j;
  3844.     int ret, next_lut;
  3845.  
  3846.     /*
  3847.      * If we just completed one-time panel init, bypass
  3848.      * queue handling, clear interrupt and return
  3849.      */
  3850.     if (fb_data->in_init) {
  3851.         if (epdc_is_working_buffer_complete()) {
  3852.             epdc_working_buf_intr(false);
  3853.             epdc_clear_working_buf_irq();
  3854.             dev_dbg(fb_data->dev, "Cleared WB for init update\n");
  3855.         }
  3856.  
  3857.         if (epdc_is_lut_complete(0)) {
  3858.             epdc_lut_complete_intr(0, false);
  3859.             epdc_clear_lut_complete_irq(0);
  3860.             fb_data->in_init = false;
  3861.             dev_dbg(fb_data->dev, "Cleared LUT complete for init update\n");
  3862.         }
  3863.  
  3864.         return IRQ_HANDLED;
  3865.     }
  3866.  
  3867.     if (!(__raw_readl(EPDC_IRQ_MASK) & __raw_readl(EPDC_IRQ)))
  3868.         return IRQ_HANDLED;
  3869.  
  3870.     if (__raw_readl(EPDC_IRQ) & EPDC_IRQ_TCE_UNDERRUN_IRQ) {
  3871.         dev_err(fb_data->dev,
  3872.             "TCE underrun! Will continue to update panel\n");
  3873.         /* Clear TCE underrun IRQ */
  3874.         __raw_writel(EPDC_IRQ_TCE_UNDERRUN_IRQ, EPDC_IRQ_CLEAR);
  3875.     }
  3876.  
  3877.     /* Check if we are waiting on EOF to sync a new update submission */
  3878.     if (epdc_signal_eof()) {
  3879.         epdc_eof_intr(false);
  3880.         epdc_clear_eof_irq();
  3881.         complete(&fb_data->eof_event);
  3882.     }
  3883.  
  3884.     /* Protect access to buffer queues and to update HW */
  3885.     spin_lock_irqsave(&fb_data->queue_lock, flags);
  3886.  
  3887.     /* Free any LUTs that have completed */
  3888.     for (i = 0; i < EPDC_NUM_LUTS; i++) {
  3889.         if (!epdc_is_lut_complete(i))
  3890.             continue;
  3891.  
  3892.         dev_dbg(fb_data->dev, "\nLUT %d completed\n", i);
  3893.  
  3894.         /* Disable IRQ for completed LUT */
  3895.         epdc_lut_complete_intr(i, false);
  3896.  
  3897.         /*
  3898.          * Go through all updates in the collision list and
  3899.          * unmask any updates that were colliding with
  3900.          * the completed LUT.
  3901.          */
  3902.         list_for_each_entry(collision_update,
  3903.                     &fb_data->upd_buf_collision_list->
  3904.                     list, list) {
  3905.             collision_update->collision_mask =
  3906.                 collision_update->collision_mask & ~(1 << i);
  3907.         }
  3908.  
  3909.         epdc_clear_lut_complete_irq(i);
  3910.  
  3911.         fb_data->luts_complete_wb |= 1 << i;
  3912.  
  3913.         fb_data->lut_update_order[i] = 0;
  3914.  
  3915.         /* Signal completion if submit workqueue needs a LUT */
  3916.         if (fb_data->waiting_for_lut) {
  3917.             complete(&fb_data->update_res_free);
  3918.             fb_data->waiting_for_lut = false;
  3919.         }
  3920.  
  3921.         /* Signal completion if LUT15 free and is needed */
  3922.         if (fb_data->waiting_for_lut15 && (i == 15)) {
  3923.             complete(&fb_data->lut15_free);
  3924.             fb_data->waiting_for_lut15 = false;
  3925.         }
  3926.  
  3927.         /* Signal completion if anyone waiting on this LUT */
  3928.         for (j = 0; j < EPDC_MAX_NUM_UPDATES; j++) {
  3929.             if (fb_data->update_marker_array[j].lut_num != i)
  3930.                 continue;
  3931.  
  3932.             /* Signal completion of update */
  3933.             dev_dbg(fb_data->dev,
  3934.                 "Signaling marker %d\n",
  3935.                 fb_data->update_marker_array[j].update_marker);
  3936.             complete(&fb_data->update_marker_array[j].update_completion);
  3937.             /* Ensure this doesn't get signaled again inadvertently */
  3938.             fb_data->update_marker_array[j].lut_num = INVALID_LUT;
  3939.             /*
  3940.              * Setting marker to 0 is OK - any wait call will
  3941.              * return when marker doesn't match any in array
  3942.              */
  3943.             fb_data->update_marker_array[j].update_marker = 0;
  3944.         }
  3945.     }
  3946.  
  3947.     /* Check to see if all updates have completed */
  3948.     if (is_free_list_full(fb_data) &&
  3949.         (fb_data->cur_update == NULL) &&
  3950.         !epdc_any_luts_active()) {
  3951.  
  3952.         if (fb_data->pwrdown_delay != FB_POWERDOWN_DISABLE) {
  3953.             /*
  3954.              * Set variable to prevent overlapping
  3955.              * enable/disable requests
  3956.              */
  3957.             fb_data->powering_down = true;
  3958.  
  3959.             /* Schedule task to disable EPDC HW until next update */
  3960.             schedule_delayed_work(&fb_data->epdc_done_work,
  3961.                 msecs_to_jiffies(fb_data->pwrdown_delay));
  3962.  
  3963.             /* Reset counter to reduce chance of overflow */
  3964.             fb_data->order_cnt = 0;
  3965.         }
  3966.  
  3967.         if (fb_data->waiting_for_idle)
  3968.             complete(&fb_data->updates_done);
  3969.     }
  3970.  
  3971.     /* Is Working Buffer busy? */
  3972.     if (epdc_is_working_buffer_busy()) {
  3973.         /* Can't submit another update until WB is done */
  3974.         spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  3975.         return IRQ_HANDLED;
  3976.     }
  3977.  
  3978.     /*
  3979.      * Were we waiting on working buffer?
  3980.      * If so, update queues and check for collisions
  3981.      */
  3982.     if (fb_data->cur_update != NULL) {
  3983.         dev_dbg(fb_data->dev, "\nWorking buffer completed\n");
  3984.  
  3985.         /* Signal completion if submit workqueue was waiting on WB */
  3986.         if (fb_data->waiting_for_wb) {
  3987.             complete(&fb_data->update_res_free);
  3988.             fb_data->waiting_for_lut = false;
  3989.         }
  3990.  
  3991.         /*
  3992.          * Check for "missed collision" conditions:
  3993.          *  - Current update overlaps one or more updates
  3994.          *    in collision list
  3995.          *  - No collision reported with current active updates
  3996.          */
  3997.         list_for_each_entry(collision_update,
  3998.                     &fb_data->upd_buf_collision_list->list,
  3999.                     list)
  4000.             if (do_updates_overlap(collision_update,
  4001.                 fb_data->cur_update))
  4002.                 missed_coll_mask |=
  4003.                     collision_update->collision_mask;
  4004.  
  4005.         /* Was there a collision? */
  4006.         if (epdc_is_collision() || missed_coll_mask) {
  4007.             /* Check list of colliding LUTs, and add to our collision mask */
  4008.             fb_data->cur_update->collision_mask =
  4009.                 epdc_get_colliding_luts();
  4010.  
  4011.             if (!fb_data->cur_update->collision_mask) {
  4012.                 fb_data->cur_update->collision_mask =
  4013.                     missed_coll_mask;
  4014.                 dev_dbg(fb_data->dev, "Missed collision "
  4015.                     "possible. Mask = 0x%x\n",
  4016.                     missed_coll_mask);
  4017.             }
  4018.  
  4019.             /* Clear collisions that completed since WB began */
  4020.             fb_data->cur_update->collision_mask &=
  4021.                 ~fb_data->luts_complete_wb;
  4022.  
  4023.             dev_dbg(fb_data->dev, "\nCollision mask = 0x%x\n",
  4024.                    fb_data->cur_update->collision_mask);
  4025.  
  4026.             /*
  4027.              * If we collide with newer updates, then
  4028.              * we don't need to re-submit the update. The
  4029.              * idea is that the newer updates should take
  4030.              * precedence anyways, so we don't want to
  4031.              * overwrite them.
  4032.              */
  4033.             for (temp_mask = fb_data->cur_update->collision_mask, lut = 0;
  4034.                 temp_mask != 0;
  4035.                 lut++, temp_mask = temp_mask >> 1) {
  4036.                 if (!(temp_mask & 0x1))
  4037.                     continue;
  4038.  
  4039.                 if (fb_data->lut_update_order[lut] >=
  4040.                     fb_data->cur_update->update_order) {
  4041.                     dev_dbg(fb_data->dev, "Ignoring collision with newer update.\n");
  4042.                     ignore_collision = true;
  4043.                     break;
  4044.                 }
  4045.             }
  4046.  
  4047.             if (ignore_collision) {
  4048.                 /* Add to free buffer list */
  4049.                 list_add_tail(&fb_data->cur_update->list,
  4050.                      &fb_data->upd_buf_free_list->list);
  4051. /* 2011/04/19 FY11 : Supported wake lock. */
  4052.                 epdc_wake_unlock_for_update_buffer( fb_data );
  4053.             } else {
  4054.                 /*
  4055.                  * If update has a marker, clear the LUT, since we
  4056.                  * don't want to signal that it is complete.
  4057.                  */
  4058.                 if (fb_data->cur_update->upd_marker_data)
  4059.                     if (fb_data->cur_update->upd_marker_data->update_marker != 0)
  4060.                         fb_data->cur_update->upd_marker_data->lut_num = INVALID_LUT;
  4061.  
  4062.                 /* Move to collision list */
  4063.                 list_add_tail(&fb_data->cur_update->list,
  4064.                      &fb_data->upd_buf_collision_list->list);
  4065.             }
  4066.         } else {
  4067.             /* Add to free buffer list */
  4068.             list_add_tail(&fb_data->cur_update->list,
  4069.                  &fb_data->upd_buf_free_list->list);
  4070. /* 2011/04/19 FY11 : Supported wake lock. */
  4071.             epdc_wake_unlock_for_update_buffer( fb_data );
  4072.         }
  4073.         /* Clear current update */
  4074.         fb_data->cur_update = NULL;
  4075.  
  4076.         /* Clear IRQ for working buffer */
  4077.         epdc_working_buf_intr(false);
  4078.         epdc_clear_working_buf_irq();
  4079.     }
  4080.  
  4081.     if (fb_data->upd_scheme != UPDATE_SCHEME_SNAPSHOT) {
  4082.         /* Queued update scheme processing */
  4083.  
  4084.         /* Schedule task to submit collision and pending update */
  4085.         if (!fb_data->powering_down)
  4086.             queue_work(fb_data->epdc_submit_workqueue,
  4087.                 &fb_data->epdc_submit_work);
  4088.  
  4089.         /* Release buffer queues */
  4090.         spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  4091.  
  4092.         return IRQ_HANDLED;
  4093.     }
  4094.  
  4095.     /* Snapshot update scheme processing */
  4096.  
  4097.     /* Check to see if any LUTs are free */
  4098.     if (!epdc_any_luts_available()) {
  4099.         dev_dbg(fb_data->dev, "No luts available.\n");
  4100.         spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  4101.         return IRQ_HANDLED;
  4102.     }
  4103.  
  4104.     /* Check to see if there is a valid LUT to use */
  4105.     ret = epdc_choose_next_lut(&next_lut);
  4106.     if (ret && fb_data->tce_prevent) {
  4107.         dev_dbg(fb_data->dev, "Must wait for LUT15\n");
  4108.         spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  4109.         return IRQ_HANDLED;
  4110.     }
  4111.  
  4112.     /*
  4113.      * Are any of our collision updates able to go now?
  4114.      * Go through all updates in the collision list and check to see
  4115.      * if the collision mask has been fully cleared
  4116.      */
  4117.     list_for_each_entry(collision_update,
  4118.                 &fb_data->upd_buf_collision_list->list, list) {
  4119.  
  4120.         if (collision_update->collision_mask != 0)
  4121.             continue;
  4122.  
  4123.         dev_dbg(fb_data->dev, "A collision update is ready to go!\n");
  4124.         /*
  4125.          * We have a collision cleared, so select it
  4126.          * and we will retry the update
  4127.          */
  4128.         fb_data->cur_update = collision_update;
  4129.         list_del_init(&fb_data->cur_update->list);
  4130.         break;
  4131.     }
  4132.  
  4133.     /*
  4134.      * If we didn't find a collision update ready to go,
  4135.      * we try to grab one from the update queue
  4136.      */
  4137.     if (fb_data->cur_update == NULL) {
  4138.         /* Is update list empty? */
  4139.         if (list_empty(&fb_data->upd_buf_queue->list)) {
  4140.             dev_dbg(fb_data->dev, "No pending updates.\n");
  4141.  
  4142.             /* No updates pending, so we are done */
  4143.             spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  4144.             return IRQ_HANDLED;
  4145.         } else {
  4146.             dev_dbg(fb_data->dev, "Found a pending update!\n");
  4147.  
  4148.             /* Process next item in update list */
  4149.             fb_data->cur_update =
  4150.                 list_entry(fb_data->upd_buf_queue->list.next,
  4151.                        struct update_data_list, list);
  4152.             list_del_init(&fb_data->cur_update->list);
  4153.         }
  4154.     }
  4155.  
  4156.     /* Use LUT selected above */
  4157.     fb_data->cur_update->lut_num = next_lut;
  4158.  
  4159.     /* Associate LUT with update marker */
  4160.     if ((fb_data->cur_update->upd_marker_data)
  4161.         && (fb_data->cur_update->upd_marker_data->update_marker != 0))
  4162.         fb_data->cur_update->upd_marker_data->lut_num =
  4163.                         fb_data->cur_update->lut_num;
  4164.  
  4165.     /* Mark LUT as containing new update */
  4166.     fb_data->lut_update_order[fb_data->cur_update->lut_num] =
  4167.         fb_data->cur_update->update_order;
  4168.  
  4169.     /* Enable Collision and WB complete IRQs */
  4170.     epdc_working_buf_intr(true);
  4171.     epdc_lut_complete_intr(fb_data->cur_update->lut_num, true);
  4172.  
  4173.     /* Program EPDC update to process buffer */
  4174.     next_upd_region = &fb_data->cur_update->upd_data.update_region;
  4175.     if (fb_data->cur_update->upd_data.temp != TEMP_USE_AMBIENT) {
  4176.         temp_index = mxc_epdc_fb_get_temp_index(fb_data, fb_data->cur_update->upd_data.temp);
  4177.         epdc_set_temp(temp_index);
  4178.     } else
  4179.         epdc_set_temp(fb_data->temp_index);
  4180.     epdc_set_update_addr(fb_data->cur_update->phys_addr + fb_data->cur_update->epdc_offs);
  4181.     epdc_set_update_coord(next_upd_region->left, next_upd_region->top);
  4182.     epdc_set_update_dimensions(next_upd_region->width,
  4183.                    next_upd_region->height);
  4184.  
  4185.     epdc_submit_update(fb_data->cur_update->lut_num,
  4186.                fb_data->cur_update->upd_data.waveform_mode,
  4187.                fb_data->cur_update->upd_data.update_mode, false, 0);
  4188.  
  4189.     /* Release buffer queues */
  4190.     spin_unlock_irqrestore(&fb_data->queue_lock, flags);
  4191.  
  4192.     return IRQ_HANDLED;
  4193. }
  4194.  
  4195. /* 2011/04/06 FY11 : Modified to power on/off in this method. */
  4196. static void draw_mode0(struct mxc_epdc_fb_data *fb_data)
  4197. {
  4198.     u32 *upd_buf_ptr;
  4199.     int i, ret;
  4200.     struct fb_var_screeninfo *screeninfo = &fb_data->epdc_fb_var;
  4201.     u32 xres, yres;
  4202.  
  4203. /* 2011/04/06 FY11 : Added power on. */
  4204.     ret = epdc_powerup(fb_data);
  4205.     if ( ret < 0 )
  4206.     {
  4207.         printk( KERN_ERR "%s Fails to powerup.%d\n", __func__, ret );
  4208.         return;
  4209.     }
  4210.  
  4211.     upd_buf_ptr = (u32 *)fb_data->info.screen_base;
  4212.  
  4213.     epdc_working_buf_intr(true);
  4214.     epdc_lut_complete_intr(0, true);
  4215.     fb_data->in_init = true;
  4216.  
  4217.     /* Use unrotated (native) width/height */
  4218.     if ((screeninfo->rotate == FB_ROTATE_CW) ||
  4219.         (screeninfo->rotate == FB_ROTATE_CCW)) {
  4220.         xres = screeninfo->yres;
  4221.         yres = screeninfo->xres;
  4222.     } else {
  4223.         xres = screeninfo->xres;
  4224.         yres = screeninfo->yres;
  4225.     }
  4226.  
  4227.     /* Program EPDC update to process buffer */
  4228.     epdc_set_update_addr(fb_data->phys_start);
  4229.     epdc_set_update_coord(0, 0);
  4230.     epdc_set_update_dimensions(xres, yres);
  4231. /* 2011/03/08 FY11 : Added reading temperature. */
  4232.     if ( mxc_epdc_fb_read_temperature( fb_data ) )
  4233.     {
  4234.         printk( KERN_ERR "%s fails to init panel.\n", __func__ );
  4235.     }
  4236.     epdc_set_temp(fb_data->temp_index);
  4237.     epdc_submit_update(0, fb_data->wv_modes.mode_init, UPDATE_MODE_FULL, true, 0xFF);
  4238.  
  4239.     dev_dbg(fb_data->dev, "Mode0 update - Waiting for LUT to complete...\n");
  4240.  
  4241.     /* Will timeout after ~4-5 seconds */
  4242.  
  4243.     for (i = 0; i < 40; i++) {
  4244.         if (!epdc_is_lut_active(0)) {
  4245.             dev_dbg(fb_data->dev, "Mode0 init complete\n");
  4246. /* 2011/04/06 FY11 : Added power off. */
  4247. /* 2011/06/09 FY11 : Fixed the failure of power off. */
  4248.             fb_data->powering_down = true;
  4249.             schedule_delayed_work(&fb_data->epdc_done_work,
  4250.                         msecs_to_jiffies(fb_data->pwrdown_delay));
  4251.             return;
  4252.         }
  4253.         msleep(100);
  4254.     }
  4255.  
  4256. /* 2011/04/06 FY11 : Added power off. */
  4257. /* 2011/06/09 FY11 : Fixed the failure of power off. */
  4258.     fb_data->powering_down = true;
  4259.     schedule_delayed_work(&fb_data->epdc_done_work,
  4260.                 msecs_to_jiffies(fb_data->pwrdown_delay));
  4261.     dev_err(fb_data->dev, "Mode0 init failed!\n");
  4262.  
  4263.     return;
  4264. }
  4265.  
  4266.  
  4267. /*2011/2/17 FY11 : Supported to read waveform in eMMC. */
  4268. /* 2011/06/07 FY11 : Modified to share static memory for epdc with bootloader. */
  4269. static int mxc_epdc_fb_load_wf( struct mxc_epdc_fb_data *fb_data, bool from_eMMC )
  4270. {
  4271.     int ret = 0;
  4272.     struct mxcfb_waveform_data_file *wv_file;
  4273.     int wv_data_offs;
  4274.     int i;
  4275. /* 2011/03/08 FY11 : Removed panel update just after init. */
  4276.  
  4277.     unsigned long ulWfIndex, ulWfSize;
  4278.     u8 *pucWfVer = NULL;
  4279.  
  4280.  
  4281. /* 2011/06/07 FY11 : Modified to share static memory for epdc with bootloader. */
  4282.     struct resource * res_waveform;
  4283.     ulWfIndex = rawdata_index( "Waveform", &ulWfSize );
  4284. #ifdef CONFIG_EPD_STATIC_MEM_WAVEFORM
  4285.     res_waveform = get_res_epd_waveform();
  4286.     ulWfSize = (unsigned long)(res_waveform->end - res_waveform->start +1);
  4287. #endif
  4288.  
  4289.     if ( fb_data->waveform_buffer_virt == NULL )
  4290.     {
  4291. #ifdef CONFIG_EPD_STATIC_MEM_WAVEFORM
  4292.         fb_data->waveform_buffer_virt = (u32 *)ioremap((phys_addr_t)res_waveform->start, ulWfSize );
  4293.         fb_data->waveform_buffer_phys = res_waveform->start;
  4294. #else
  4295.         /* Allocate memory for waveform data */
  4296.         fb_data->waveform_buffer_virt = dma_alloc_coherent(fb_data->dev,
  4297.                             fb_data->waveform_buffer_size,
  4298.                             &fb_data->waveform_buffer_phys,
  4299.                             GFP_DMA);
  4300. #endif
  4301.         if (fb_data->waveform_buffer_virt == NULL)
  4302.         {
  4303.             dev_err(fb_data->dev, "Can't allocate mem for waveform!\n");
  4304.             return -ENOMEM;
  4305.         }
  4306.     }
  4307.  
  4308.  
  4309.     if ( from_eMMC )
  4310.     {
  4311. /* 2011/06/08 FY11 : Modified to use static buffer for waveform read. */
  4312.         u8 *pCurBuf = NULL;
  4313.  
  4314.         /* read wf header */
  4315.         ret = rawdata_read( ulWfIndex,
  4316.                     0,
  4317.                     wf_tmp_buf,
  4318.                     WF_TMP_BUF_SIZE );
  4319.         if ( ret < 0 )
  4320.         {
  4321.             printk( KERN_ERR "%s fail to read wf header.\n", __func__ );
  4322.             return ret;
  4323.         }
  4324.  
  4325.         /* get waveform header.  (wf_tmp_buf must be larger than waveform header. */
  4326.         wv_file = (struct mxcfb_waveform_data_file *)wf_tmp_buf;
  4327.  
  4328.         /* Get size and allocate temperature range table */
  4329.         fb_data->trt_entries = wv_file->wdh.trc + 1;
  4330.  
  4331. /* 2011/03/08 FY11 : Supported to write waveform and reload. */
  4332.         /* free temp range table if it has already exist. */
  4333.         if ( fb_data->temp_range_bounds )
  4334.         {
  4335.             kzfree( fb_data->temp_range_bounds );
  4336.             fb_data->temp_range_bounds = NULL;
  4337.         }
  4338.         fb_data->temp_range_bounds = kzalloc(fb_data->trt_entries, GFP_KERNEL);
  4339.         if ( fb_data->temp_range_bounds == NULL )
  4340.         {
  4341.             printk(KERN_ERR "%s fail to mallock trt table.\n", __func__ );
  4342.             return -ENOMEM;
  4343.         }
  4344.  
  4345.         /* Copy TRT data. (wf_tmp_buf must be larger than waveform header + 256 bytes) */
  4346.         memcpy(fb_data->temp_range_bounds, &wv_file->data, fb_data->trt_entries);
  4347.  
  4348.  
  4349.         /* Get offset and size for waveform data */
  4350.         wv_data_offs = sizeof(wv_file->wdh) + fb_data->trt_entries + 1;
  4351.         fb_data->waveform_buffer_size = ulWfSize - wv_data_offs;
  4352.  
  4353.  
  4354.         /* set the pointer to waveform version. */
  4355.         pucWfVer = wf_tmp_buf + WF_VER_OFFSET;
  4356. /* 2011/2/24 FY11 : Supported to read waveform version. */
  4357.         memcpy( &(s_st_wfversion.version[0]), (u8*)pucWfVer, WF_VER_LEN );
  4358.  
  4359.  
  4360.         // copy waveform data from temporary buffer.
  4361.         pCurBuf = (u8*)(fb_data->waveform_buffer_virt);
  4362.         memcpy( pCurBuf,
  4363.             wf_tmp_buf + wv_data_offs,
  4364.             WF_TMP_BUF_SIZE - wv_data_offs );
  4365.         pCurBuf += (WF_TMP_BUF_SIZE - wv_data_offs);
  4366.  
  4367.         for ( i = WF_TMP_BUF_SIZE; i < ulWfSize; i+=WF_TMP_BUF_SIZE )
  4368.         {
  4369.             ret = rawdata_read( ulWfIndex,
  4370.                         i,
  4371.                         wf_tmp_buf,
  4372.                         WF_TMP_BUF_SIZE );
  4373.             if ( ret < 0 )
  4374.             {
  4375.                 printk( KERN_ERR "%s fail to read wf.\n", __func__ );
  4376.                 return ret;
  4377.             }
  4378.  
  4379.             memcpy( pCurBuf, wf_tmp_buf, ( ret < WF_TMP_BUF_SIZE ? ret : WF_TMP_BUF_SIZE ) );
  4380.             pCurBuf += WF_TMP_BUF_SIZE;
  4381.         }
  4382.         ret = 0;
  4383.  
  4384.     }
  4385. #ifdef CONFIG_EPD_STATIC_MEM_WAVEFORM
  4386.     else    // use data on RAM
  4387.     {
  4388. /* 2011/06/07 FY11 : Modified to share static memory for epdc with bootloader. */
  4389.         u8 *ptmp = NULL;
  4390.         unsigned long res_wf_size = ulWfSize;
  4391.  
  4392.         fb_data->waveform_buffer_size = res_wf_size - sizeof(struct epd_settings) - sizeof(unsigned long);
  4393.  
  4394.         fb_data->trt_entries = *((unsigned long*)((u8*)(fb_data->waveform_buffer_virt) + fb_data->waveform_buffer_size));
  4395.  
  4396.         fb_data->temp_range_bounds = kzalloc(fb_data->trt_entries, GFP_KERNEL);
  4397.         if ( fb_data->temp_range_bounds == NULL )
  4398.         {
  4399.             printk(KERN_ERR "%s fail to mallock trt table.\n", __func__ );
  4400.             return -ENOMEM;
  4401.         }
  4402.         fb_data->waveform_buffer_size -= fb_data->trt_entries;
  4403.         ptmp = (u8*)(fb_data->waveform_buffer_virt) + fb_data->waveform_buffer_size;
  4404.         /* Copy TRT data */
  4405.         memcpy(fb_data->temp_range_bounds, ptmp, fb_data->trt_entries);
  4406.  
  4407.         fb_data->waveform_buffer_size -= WF_VER_LEN;
  4408.         pucWfVer = (u8*)(fb_data->waveform_buffer_virt) + fb_data->waveform_buffer_size;
  4409. /* 2011/2/24 FY11 : Supported to read waveform version. */
  4410.         memcpy( &(s_st_wfversion.version[0]), (u8*)pucWfVer, WF_VER_LEN );
  4411.     }
  4412. #endif
  4413.  
  4414.     /* Set default temperature index using TRT and room temp */
  4415.     fb_data->temp_index = mxc_epdc_fb_get_temp_index(fb_data, DEFAULT_TEMP);
  4416.  
  4417.     /* Enable clocks to access EPDC regs */
  4418.     clk_enable(fb_data->epdc_clk_axi);
  4419.  
  4420.     /* Enable pix clk for EPDC */
  4421.     clk_enable(fb_data->epdc_clk_pix);
  4422.     clk_set_rate(fb_data->epdc_clk_pix, fb_data->cur_mode->vmode->pixclock);
  4423.  
  4424.     epdc_init_sequence(fb_data);
  4425.  
  4426.     /* Disable clocks */
  4427.     clk_disable(fb_data->epdc_clk_axi);
  4428.     clk_disable(fb_data->epdc_clk_pix);
  4429.  
  4430.     fb_data->hw_ready = true;
  4431.  
  4432. /* 2011/03/08 FY11 : Removed panel update just after init. */
  4433.  
  4434.  
  4435.     return ret;
  4436. }
  4437.  
  4438.  
  4439. static int mxc_epdc_fb_init_hw(struct fb_info *info)
  4440. {
  4441.     struct mxc_epdc_fb_data *fb_data = (struct mxc_epdc_fb_data *)info;
  4442.     int ret;
  4443.     char *p = NULL;
  4444.     bool read_from_eMMC = true;
  4445.  
  4446.     /*
  4447.      * Create fw search string based on ID string in selected videomode.
  4448.      * Format is "imx/epdc_[panel string].fw"
  4449.      */
  4450.     if (fb_data->cur_mode) {
  4451.         strcat(fb_data->fw_str, "imx/epdc_");
  4452.         strcat(fb_data->fw_str, fb_data->cur_mode->vmode->name);
  4453.         strcat(fb_data->fw_str, ".fw");
  4454.     }
  4455.  
  4456.     fb_data->fw_default_load = false;
  4457.  
  4458. /* 2011/06/07 FY11 : Modified to share static memory for epdc with bootloader. */
  4459.     p = strstr(saved_command_line, "nfsroot=" );
  4460.     if ( p == NULL )
  4461.     {
  4462.         // if not nfs boot, read wf from eMMC.
  4463.         read_from_eMMC = false;
  4464.     }
  4465.  
  4466. /*2011/2/17 FY11 : Supported to read waveform in eMMC. */
  4467. /* 2011/06/07 FY11 : Modified to share static memory for epdc with bootloader. */
  4468.     ret = mxc_epdc_fb_load_wf( fb_data , read_from_eMMC );
  4469.     if (ret)
  4470.         dev_err(fb_data->dev,
  4471.             "Failed request_firmware_nowait err %d\n", ret);
  4472.  
  4473. /*2011/04/06 FY11 : Added panel init for NFS boot. */
  4474.     if ( p )
  4475.     {
  4476.         draw_mode0(fb_data);
  4477.     }
  4478.  
  4479.     return ret;
  4480. }
  4481.  
  4482. static ssize_t store_update(struct device *device,
  4483.                  struct device_attribute *attr,
  4484.                  const char *buf, size_t count)
  4485. {
  4486.     struct mxcfb_update_data update;
  4487.     struct fb_info *info = dev_get_drvdata(device);
  4488.     struct mxc_epdc_fb_data *fb_data = (struct mxc_epdc_fb_data *)info;
  4489.  
  4490.     if (strncmp(buf, "direct", 6) == 0)
  4491.         update.waveform_mode = fb_data->wv_modes.mode_du;
  4492.     else if (strncmp(buf, "gc16", 4) == 0)
  4493.         update.waveform_mode = fb_data->wv_modes.mode_gc16;
  4494.     else if (strncmp(buf, "gc4", 3) == 0)
  4495.         update.waveform_mode = fb_data->wv_modes.mode_gc4;
  4496.  
  4497.     /* Now, request full screen update */
  4498.     update.update_region.left = 0;
  4499.     update.update_region.width = fb_data->epdc_fb_var.xres;
  4500.     update.update_region.top = 0;
  4501.     update.update_region.height = fb_data->epdc_fb_var.yres;
  4502.     update.update_mode = UPDATE_MODE_FULL;
  4503.     update.temp = TEMP_USE_AMBIENT;
  4504.     update.update_marker = 0;
  4505.     update.flags = 0;
  4506.  
  4507.     mxc_epdc_fb_send_update(&update, info, false);
  4508.  
  4509.     return count;
  4510. }
  4511.  
  4512. static struct device_attribute fb_attrs[] = {
  4513.     __ATTR(update, S_IRUGO|S_IWUSR, NULL, store_update),
  4514. };
  4515.  
  4516. int __devinit mxc_epdc_fb_probe(struct platform_device *pdev)
  4517. {
  4518.     int ret = 0;
  4519.     struct mxc_epdc_fb_data *fb_data;
  4520.     struct resource *res;
  4521.     struct fb_info *info;
  4522.     char *options, *opt;
  4523.     char *panel_str = NULL;
  4524.     char name[] = "mxcepdcfb";
  4525.     struct fb_videomode *vmode;
  4526.     int xres_virt, yres_virt, buf_size;
  4527.     int xres_virt_rot, yres_virt_rot, pix_size_rot;
  4528.     struct fb_var_screeninfo *var_info;
  4529.     struct fb_fix_screeninfo *fix_info;
  4530.     struct pxp_config_data *pxp_conf;
  4531.     struct pxp_proc_data *proc_data;
  4532.     struct scatterlist *sg;
  4533.     struct update_data_list *upd_list;
  4534.     struct update_data_list *plist, *temp_list;
  4535.     int i;
  4536.     unsigned long x_mem_size = 0;
  4537. /* 2011/03/05 FY11 : Supported A2 mode limitations. */
  4538.     unsigned short *pusWhiteBuf = NULL;
  4539.  
  4540.  
  4541.     fb_data = (struct mxc_epdc_fb_data *)framebuffer_alloc(
  4542.             sizeof(struct mxc_epdc_fb_data), &pdev->dev);
  4543.     if (fb_data == NULL) {
  4544.         ret = -ENOMEM;
  4545.         goto out;
  4546.     }
  4547.  
  4548.     /* Get platform data and check validity */
  4549.     fb_data->pdata = pdev->dev.platform_data;
  4550.     if ((fb_data->pdata == NULL) || (fb_data->pdata->num_modes < 1)
  4551.         || (fb_data->pdata->epdc_mode == NULL)
  4552.         || (fb_data->pdata->epdc_mode->vmode == NULL)) {
  4553.         ret = -EINVAL;
  4554.         goto out_fbdata;
  4555.     }
  4556.  
  4557.     if (fb_get_options(name, &options)) {
  4558.         ret = -ENODEV;
  4559.         goto out_fbdata;
  4560.     }
  4561.  
  4562.     fb_data->tce_prevent = 0;
  4563.  
  4564.     if (options)
  4565.         while ((opt = strsep(&options, ",")) != NULL) {
  4566.             if (!*opt)
  4567.                 continue;
  4568.  
  4569.             if (!strncmp(opt, "bpp=", 4))
  4570.                 fb_data->default_bpp =
  4571.                     simple_strtoul(opt + 4, NULL, 0);
  4572.             else if (!strncmp(opt, "x_mem=", 6))
  4573.                 x_mem_size = memparse(opt + 6, NULL);
  4574.             else if (!strncmp(opt, "tce_prevent", 4))
  4575.                 fb_data->tce_prevent = 1;
  4576.             else
  4577.                 panel_str = opt;
  4578.         }
  4579.  
  4580.     fb_data->dev = &pdev->dev;
  4581.  
  4582.     if (!fb_data->default_bpp)
  4583.         fb_data->default_bpp = 16;
  4584.  
  4585.     /* Set default (first defined mode) before searching for a match */
  4586.     fb_data->cur_mode = &fb_data->pdata->epdc_mode[0];
  4587.  
  4588.     if (panel_str)
  4589.         for (i = 0; i < fb_data->pdata->num_modes; i++)
  4590.             if (!strcmp(fb_data->pdata->epdc_mode[i].vmode->name,
  4591.                         panel_str)) {
  4592.                 fb_data->cur_mode =
  4593.                     &fb_data->pdata->epdc_mode[i];
  4594.                 break;
  4595.             }
  4596.  
  4597.     vmode = fb_data->cur_mode->vmode;
  4598.  
  4599.     platform_set_drvdata(pdev, fb_data);
  4600.     info = &fb_data->info;
  4601.  
  4602.     /* Allocate color map for the FB */
  4603.     ret = fb_alloc_cmap(&info->cmap, 256, 0);
  4604.     if (ret)
  4605.         goto out_fbdata;
  4606.  
  4607.     dev_dbg(&pdev->dev, "resolution %dx%d, bpp %d\n",
  4608.         vmode->xres, vmode->yres, fb_data->default_bpp);
  4609.  
  4610.     /*
  4611.      * GPU alignment restrictions dictate framebuffer parameters:
  4612.      * - 32-byte alignment for buffer width
  4613.      * - 128-byte alignment for buffer height
  4614.      * => 4K buffer alignment for buffer start
  4615.      */
  4616.     xres_virt = ALIGN(vmode->xres, 32);
  4617.     yres_virt = ALIGN(vmode->yres, 128);
  4618.     fb_data->max_pix_size = PAGE_ALIGN(xres_virt * yres_virt);
  4619.  
  4620.     /*
  4621.      * Have to check to see if aligned buffer size when rotated
  4622.      * is bigger than when not rotated, and use the max
  4623.      */
  4624.     xres_virt_rot = ALIGN(vmode->yres, 32);
  4625.     yres_virt_rot = ALIGN(vmode->xres, 128);
  4626.     pix_size_rot = PAGE_ALIGN(xres_virt_rot * yres_virt_rot);
  4627.     fb_data->max_pix_size = (fb_data->max_pix_size > pix_size_rot) ?
  4628.                 fb_data->max_pix_size : pix_size_rot;
  4629.  
  4630.     buf_size = fb_data->max_pix_size * fb_data->default_bpp/8;
  4631.  
  4632.     /* Compute the number of screens needed based on X memory requested */
  4633.     if (x_mem_size > 0) {
  4634.         fb_data->num_screens = DIV_ROUND_UP(x_mem_size, buf_size);
  4635.         if (fb_data->num_screens < NUM_SCREENS_MIN)
  4636.             fb_data->num_screens = NUM_SCREENS_MIN;
  4637.         else if (buf_size * fb_data->num_screens > SZ_16M)
  4638.             fb_data->num_screens = SZ_16M / buf_size;
  4639.     } else
  4640.         fb_data->num_screens = NUM_SCREENS_MIN;
  4641.  
  4642.     fb_data->map_size = buf_size * fb_data->num_screens;
  4643.     dev_dbg(&pdev->dev, "memory to allocate: %d\n", fb_data->map_size);
  4644.  
  4645.     res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  4646.     if (res == NULL) {
  4647.         ret = -ENODEV;
  4648.         goto out_cmap;
  4649.     }
  4650.  
  4651.     epdc_base = ioremap(res->start, SZ_4K);
  4652.     if (epdc_base == NULL) {
  4653.         ret = -ENOMEM;
  4654.         goto out_cmap;
  4655.     }
  4656.  
  4657.     /* Allocate FB memory */
  4658.     info->screen_base = dma_alloc_writecombine(&pdev->dev,
  4659.                           fb_data->map_size + buf_size,
  4660.                             /* 2011/03/15 FY11 : Supported standby screen. */
  4661.                           &fb_data->phys_start,
  4662.                           GFP_DMA);
  4663.  
  4664.     if (info->screen_base == NULL) {
  4665.         ret = -ENOMEM;
  4666.         goto out_mapregs;
  4667.     }
  4668.     dev_dbg(&pdev->dev, "allocated at %p:0x%x\n", info->screen_base,
  4669.         fb_data->phys_start);
  4670.  
  4671. /* 2011/03/05 FY11 : Supported A2 mode limitations. */
  4672.     fb_data->force_wf_mode = false;
  4673.  
  4674. /* 2011/03/15 FY11 : Supported standby screen. */
  4675.     fb_data->standbyscreen_buff_size = buf_size;
  4676.     fb_data->standbyscreen_buff_virt = (info->screen_base) + fb_data->map_size;
  4677.     fb_data->standbyscreen_buff = (fb_data->phys_start) + fb_data->map_size;
  4678.     /* Initialize standby screen buffer */
  4679.     pusWhiteBuf = (unsigned short*)(fb_data->standbyscreen_buff_virt);
  4680.     for ( i = 0; i < (buf_size)/sizeof(unsigned short); i++ )
  4681.     {
  4682.         pusWhiteBuf[i] = 0x630C;
  4683.     }
  4684.    
  4685.  
  4686.     var_info = &info->var;
  4687.     var_info->activate = FB_ACTIVATE_TEST;
  4688.     var_info->bits_per_pixel = fb_data->default_bpp;
  4689.     var_info->xres = vmode->xres;
  4690.     var_info->yres = vmode->yres;
  4691.     var_info->xres_virtual = xres_virt;
  4692.     /* Additional screens allow for panning  and buffer flipping */
  4693.     var_info->yres_virtual = yres_virt * fb_data->num_screens;
  4694.  
  4695.     var_info->pixclock = vmode->pixclock;
  4696.     var_info->left_margin = vmode->left_margin;
  4697.     var_info->right_margin = vmode->right_margin;
  4698.     var_info->upper_margin = vmode->upper_margin;
  4699.     var_info->lower_margin = vmode->lower_margin;
  4700.     var_info->hsync_len = vmode->hsync_len;
  4701.     var_info->vsync_len = vmode->vsync_len;
  4702.     var_info->vmode = FB_VMODE_NONINTERLACED;
  4703.  
  4704.     switch (fb_data->default_bpp) {
  4705.     case 32:
  4706.     case 24:
  4707.         var_info->red.offset = 16;
  4708.         var_info->red.length = 8;
  4709.         var_info->green.offset = 8;
  4710.         var_info->green.length = 8;
  4711.         var_info->blue.offset = 0;
  4712.         var_info->blue.length = 8;
  4713.         break;
  4714.  
  4715.     case 16:
  4716.         var_info->red.offset = 11;
  4717.         var_info->red.length = 5;
  4718.         var_info->green.offset = 5;
  4719.         var_info->green.length = 6;
  4720.         var_info->blue.offset = 0;
  4721.         var_info->blue.length = 5;
  4722.         break;
  4723.  
  4724.     case 8:
  4725.         /*
  4726.          * For 8-bit grayscale, R, G, and B offset are equal.
  4727.          *
  4728.          */
  4729.         var_info->grayscale = GRAYSCALE_8BIT;
  4730.  
  4731.         var_info->red.length = 8;
  4732.         var_info->red.offset = 0;
  4733.         var_info->red.msb_right = 0;
  4734.         var_info->green.length = 8;
  4735.         var_info->green.offset = 0;
  4736.         var_info->green.msb_right = 0;
  4737.         var_info->blue.length = 8;
  4738.         var_info->blue.offset = 0;
  4739.         var_info->blue.msb_right = 0;
  4740.         break;
  4741.  
  4742.     default:
  4743.         dev_err(&pdev->dev, "unsupported bitwidth %d\n",
  4744.             fb_data->default_bpp);
  4745.         ret = -EINVAL;
  4746.         goto out_dma_fb;
  4747.     }
  4748.  
  4749.     fix_info = &info->fix;
  4750.  
  4751.     strcpy(fix_info->id, "mxc_epdc_fb");
  4752.     fix_info->type = FB_TYPE_PACKED_PIXELS;
  4753.     fix_info->visual = FB_VISUAL_TRUECOLOR;
  4754.     fix_info->xpanstep = 0;
  4755.     fix_info->ypanstep = 0;
  4756.     fix_info->ywrapstep = 0;
  4757.     fix_info->accel = FB_ACCEL_NONE;
  4758.     fix_info->smem_start = fb_data->phys_start;
  4759.     fix_info->smem_len = fb_data->map_size;
  4760.     fix_info->ypanstep = 0;
  4761.  
  4762.     fb_data->native_width = vmode->xres;
  4763.     fb_data->native_height = vmode->yres;
  4764.  
  4765.     info->fbops = &mxc_epdc_fb_ops;
  4766.     info->var.activate = FB_ACTIVATE_NOW;
  4767.     info->pseudo_palette = fb_data->pseudo_palette;
  4768.     info->screen_size = info->fix.smem_len;
  4769.     info->flags = FBINFO_FLAG_DEFAULT;
  4770.  
  4771.     mxc_epdc_fb_set_fix(info);
  4772.  
  4773.     fb_data->auto_mode = AUTO_UPDATE_MODE_REGION_MODE;
  4774.     fb_data->upd_scheme = UPDATE_SCHEME_QUEUE_AND_MERGE; // UPDATE_SCHEME_SNAPSHOT;
  4775.  
  4776.     /* Initialize our internal copy of the screeninfo */
  4777.     fb_data->epdc_fb_var = *var_info;
  4778.     fb_data->fb_offset = 0;
  4779.     fb_data->eof_sync_period = 0;
  4780.  
  4781.     /* Allocate head objects for our lists */
  4782.     fb_data->upd_buf_queue =
  4783.         kzalloc(sizeof(struct update_data_list), GFP_KERNEL);
  4784.     fb_data->upd_buf_collision_list =
  4785.         kzalloc(sizeof(struct update_data_list), GFP_KERNEL);
  4786.     fb_data->upd_buf_free_list =
  4787.         kzalloc(sizeof(struct update_data_list), GFP_KERNEL);
  4788.     if ((fb_data->upd_buf_queue == NULL) || (fb_data->upd_buf_free_list == NULL)
  4789.         || (fb_data->upd_buf_collision_list == NULL)) {
  4790.         ret = -ENOMEM;
  4791.         goto out_dma_fb;
  4792.     }
  4793.  
  4794.     /*
  4795.      * Initialize lists for update requests, update collisions,
  4796.      * and available update (PxP output) buffers
  4797.      */
  4798.     INIT_LIST_HEAD(&fb_data->upd_buf_queue->list);
  4799.     INIT_LIST_HEAD(&fb_data->upd_buf_free_list->list);
  4800.     INIT_LIST_HEAD(&fb_data->upd_buf_collision_list->list);
  4801.  
  4802.     /* Allocate update buffers and add them to the list */
  4803.     for (i = 0; i < EPDC_MAX_NUM_UPDATES; i++) {
  4804.         upd_list = kzalloc(sizeof(*upd_list), GFP_KERNEL);
  4805.         if (upd_list == NULL) {
  4806.             ret = -ENOMEM;
  4807.             goto out_upd_buffers;
  4808.         }
  4809.  
  4810.         /* Clear update data structure */
  4811.         memset(&upd_list->upd_data, 0,
  4812.                sizeof(struct mxcfb_update_data));
  4813.  
  4814.         /*
  4815.          * Allocate memory for PxP output buffer.
  4816.          * Each update buffer is 1 byte per pixel, and can
  4817.          * be as big as the full-screen frame buffer
  4818.          */
  4819.         upd_list->virt_addr =
  4820.             dma_alloc_coherent(fb_data->info.device, fb_data->max_pix_size,
  4821.                        &upd_list->phys_addr, GFP_DMA);
  4822.         if (upd_list->virt_addr == NULL) {
  4823.             kfree(upd_list);
  4824.             ret = -ENOMEM;
  4825.             goto out_upd_buffers;
  4826.         }
  4827.  
  4828.         /* Add newly allocated buffer to free list */
  4829.         list_add(&upd_list->list, &fb_data->upd_buf_free_list->list);
  4830.  
  4831.         dev_dbg(fb_data->info.device, "allocated %d bytes @ 0x%08X\n",
  4832.             fb_data->max_pix_size, upd_list->phys_addr);
  4833.     }
  4834.  
  4835.     /*
  4836.      * Allocate memory for PxP SW workaround buffer
  4837.      * These buffers are used to hold copy of the update region,
  4838.      * before sending it to PxP for processing.
  4839.      */
  4840.     fb_data->virt_addr_copybuf =
  4841.         dma_alloc_coherent(fb_data->info.device, fb_data->max_pix_size*2,
  4842.                    &fb_data->phys_addr_copybuf, GFP_DMA);
  4843.     if (fb_data->virt_addr_copybuf == NULL) {
  4844.         ret = -ENOMEM;
  4845.         goto out_upd_buffers;
  4846.     }
  4847.  
  4848.     fb_data->working_buffer_size = vmode->yres * vmode->xres * 2;
  4849.     /* Allocate memory for EPDC working buffer */
  4850. /* 2011/06/07 FY11 : Modified to share static memory for epdc with bootloader. */
  4851. #ifdef CONFIG_EPD_STATIC_MEM_WORKBUFF
  4852.     {
  4853.     struct resource * res_wb = get_res_epd_workbuff();
  4854.     unsigned long res_wb_size = (unsigned long)(res_wb->end - res_wb->start +1);
  4855.     fb_data->working_buffer_virt = (u32 *)ioremap((phys_addr_t)res_wb->start, res_wb_size );
  4856.     fb_data->working_buffer_phys = res_wb->start;
  4857.     }
  4858. #else
  4859.     fb_data->working_buffer_virt =
  4860.         dma_alloc_coherent(&pdev->dev, fb_data->working_buffer_size,
  4861.                    &fb_data->working_buffer_phys, GFP_DMA);
  4862. #endif
  4863.     if (fb_data->working_buffer_virt == NULL) {
  4864.         dev_err(&pdev->dev, "Can't allocate mem for working buf!\n");
  4865.         ret = -ENOMEM;
  4866.         goto out_copybuffer;
  4867.     }
  4868.  
  4869. /* 2011/05/12 FY11 : Initialize working buffer. */
  4870. /* 2011/06/07 FY11 : Modified to share static memory for epdc with bootloader. */
  4871. #ifdef CONFIG_EPD_STATIC_MEM_WORKBUFF
  4872. #else
  4873.     memset( fb_data->working_buffer_virt, 0xFF, fb_data->working_buffer_size );
  4874. #endif
  4875.  
  4876.  
  4877. /* 2011/06/08 FY11 : Modified to use static buffer for waveofrm. */
  4878.     wf_tmp_buf = kmalloc( WF_TMP_BUF_SIZE, GFP_KERNEL );
  4879.     if( wf_tmp_buf == NULL )
  4880.     {
  4881.         ret = -ENOMEM;
  4882.         goto out_dma_work_buf;
  4883.     }
  4884.  
  4885.  
  4886.     /* Initialize EPDC pins */
  4887.     if (fb_data->pdata->get_pins)
  4888.         fb_data->pdata->get_pins();
  4889.  
  4890.     fb_data->epdc_clk_axi = clk_get(fb_data->dev, "epdc_axi");
  4891.     if (IS_ERR(fb_data->epdc_clk_axi)) {
  4892.         dev_err(&pdev->dev, "Unable to get EPDC AXI clk."
  4893.             "err = 0x%x\n", (int)fb_data->epdc_clk_axi);
  4894.         ret = -ENODEV;
  4895.         goto out_wf_tmp_buf;
  4896.     }
  4897.     fb_data->epdc_clk_pix = clk_get(fb_data->dev, "epdc_pix");
  4898.     if (IS_ERR(fb_data->epdc_clk_pix)) {
  4899.         dev_err(&pdev->dev, "Unable to get EPDC pix clk."
  4900.             "err = 0x%x\n", (int)fb_data->epdc_clk_pix);
  4901.         ret = -ENODEV;
  4902.         goto out_wf_tmp_buf;
  4903.     }
  4904.  
  4905.     fb_data->in_init = false;
  4906.  
  4907.     fb_data->hw_ready = false;
  4908.  
  4909.     /*
  4910.      * Set default waveform mode values.
  4911.      * Should be overwritten via ioctl.
  4912.      */
  4913.     fb_data->wv_modes.mode_init = 0;
  4914.     fb_data->wv_modes.mode_du = 1;
  4915.     fb_data->wv_modes.mode_gc4 = 3;
  4916.     fb_data->wv_modes.mode_gc8 = 2;
  4917.     fb_data->wv_modes.mode_gc16 = 2;
  4918.     fb_data->wv_modes.mode_gc32 = 2;
  4919. /* 2011/03/05 FY11 : Supported A2 mode limitations. */
  4920.     fb_data->wv_modes.mode_a2 = 4;
  4921.  
  4922.     /* Initialize markers */
  4923.     for (i = 0; i < EPDC_MAX_NUM_UPDATES; i++) {
  4924.         fb_data->update_marker_array[i].update_marker = 0;
  4925.         fb_data->update_marker_array[i].lut_num = INVALID_LUT;
  4926.     }
  4927.  
  4928.     /* Initialize all LUTs to inactive */
  4929.     for (i = 0; i < EPDC_NUM_LUTS; i++)
  4930.         fb_data->lut_update_order[i] = 0;
  4931.  
  4932.     /* Retrieve EPDC IRQ num */
  4933.     res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  4934.     if (res == NULL) {
  4935.         dev_err(&pdev->dev, "cannot get IRQ resource\n");
  4936.         ret = -ENODEV;
  4937.         goto out_wf_tmp_buf;
  4938.     }
  4939.     fb_data->epdc_irq = res->start;
  4940.  
  4941.     /* Register IRQ handler */
  4942.     ret = request_irq(fb_data->epdc_irq, mxc_epdc_irq_handler, 0,
  4943.             "fb_dma", fb_data);
  4944.     if (ret) {
  4945.         dev_err(&pdev->dev, "request_irq (%d) failed with error %d\n",
  4946.             fb_data->epdc_irq, ret);
  4947.         ret = -ENODEV;
  4948.         goto out_wf_tmp_buf;
  4949.     }
  4950.  
  4951.     INIT_DELAYED_WORK(&fb_data->epdc_done_work, epdc_done_work_func);
  4952.     fb_data->epdc_submit_workqueue = create_rt_workqueue("submit");
  4953.     INIT_WORK(&fb_data->epdc_submit_work, epdc_submit_work_func);
  4954.  
  4955.     info->fbdefio = &mxc_epdc_fb_defio;
  4956. #ifdef CONFIG_FB_MXC_EINK_AUTO_UPDATE_MODE
  4957.     fb_deferred_io_init(info);
  4958. #endif
  4959.  
  4960.     /* get pmic regulators */
  4961. /* 2011/07/05 FY11 : Added VSYS_EPD_ON. */
  4962.     fb_data->vsys_regulator = regulator_get(NULL, "VSYS_EPD");
  4963.     if (IS_ERR(fb_data->vsys_regulator)) {
  4964.         dev_err(&pdev->dev, "Unable to get vsys PMIC regulator."
  4965.             "err = 0x%x\n", (int)fb_data->vsys_regulator);
  4966.         ret = -ENODEV;
  4967.         goto out_irq;
  4968.     }
  4969.     regulator_enable(fb_data->vsys_regulator);
  4970.     fb_data->display_regulator = regulator_get(NULL, "DISPLAY");
  4971.     if (IS_ERR(fb_data->display_regulator)) {
  4972.         dev_err(&pdev->dev, "Unable to get display PMIC regulator."
  4973.             "err = 0x%x\n", (int)fb_data->display_regulator);
  4974.         ret = -ENODEV;
  4975.         goto out_irq;
  4976.     }
  4977.     fb_data->vcom_regulator = regulator_get(NULL, "VCOM");
  4978.     if (IS_ERR(fb_data->vcom_regulator)) {
  4979.         regulator_put(fb_data->display_regulator);
  4980.         dev_err(&pdev->dev, "Unable to get VCOM regulator."
  4981.             "err = 0x%x\n", (int)fb_data->vcom_regulator);
  4982.         ret = -ENODEV;
  4983.         goto out_irq;
  4984.     }
  4985.     fb_data->epd_pwr0_regulator = regulator_get(NULL, "PWR0_CTRL");
  4986.     if (IS_ERR(fb_data->epd_pwr0_regulator)) {
  4987.         dev_err(&pdev->dev, "Unable to get PWR0_CTRL regulator."
  4988.             "err = 0x%x\n", (int)fb_data->epd_pwr0_regulator);
  4989.         ret = -ENODEV;
  4990.         goto out_irq;
  4991.     }
  4992.  
  4993.     fb_data->epd_pwr2_regulator = regulator_get(NULL, "PWR2_CTRL");
  4994.     if (IS_ERR(fb_data->epd_pwr2_regulator)) {
  4995.         dev_err(&pdev->dev, "Unable to get PWR2_CTRL regulator."
  4996.             "err = 0x%x\n", (int)fb_data->epd_pwr2_regulator);
  4997.         ret = -ENODEV;
  4998.         goto out_irq;
  4999.     }
  5000.  
  5001.     fb_data->temp_regulator = regulator_get(NULL, "PMIC_TEMP");
  5002.     if (IS_ERR(fb_data->temp_regulator)) {
  5003.         dev_err(&pdev->dev, "Unable to get PMIC TEMP regulator."
  5004.             "err = 0x%x\n", (int)fb_data->temp_regulator);
  5005.         ret = -ENODEV;
  5006.         goto out_irq;
  5007.     }
  5008.  
  5009.  
  5010.     fb_data->v3p3_regulator = regulator_get(NULL, "V3P3_CTRL");
  5011.     if (IS_ERR(fb_data->v3p3_regulator)) {
  5012.         dev_err(&pdev->dev, "Unable to get PMIC 3.3V regulator."
  5013.             "err = 0x%x\n", (int)fb_data->v3p3_regulator);
  5014.         ret = -ENODEV;
  5015.         goto out_irq;
  5016.     }
  5017.  
  5018.  
  5019.     if (device_create_file(info->dev, &fb_attrs[0]))
  5020.         dev_err(&pdev->dev, "Unable to create file from fb_attrs\n");
  5021.  
  5022.     fb_data->cur_update = NULL;
  5023.  
  5024.     spin_lock_init(&fb_data->queue_lock);
  5025.  
  5026.     mutex_init(&fb_data->pxp_mutex);
  5027.  
  5028.     mutex_init(&fb_data->power_mutex);
  5029.  
  5030.     /* PxP DMA interface */
  5031.     dmaengine_get();
  5032.  
  5033.     /*
  5034.      * Fill out PxP config data structure based on FB info and
  5035.      * processing tasks required
  5036.      */
  5037.     pxp_conf = &fb_data->pxp_conf;
  5038.     proc_data = &pxp_conf->proc_data;
  5039.  
  5040.     /* Initialize non-channel-specific PxP parameters */
  5041.     proc_data->drect.left = proc_data->srect.left = 0;
  5042.     proc_data->drect.top = proc_data->srect.top = 0;
  5043.     proc_data->drect.width = proc_data->srect.width = fb_data->info.var.xres;
  5044.     proc_data->drect.height = proc_data->srect.height = fb_data->info.var.yres;
  5045.     proc_data->scaling = 0;
  5046.     proc_data->hflip = 0;
  5047.     proc_data->vflip = 0;
  5048.     proc_data->rotate = 0;
  5049.     proc_data->bgcolor = 0;
  5050.     proc_data->overlay_state = 0;
  5051.     proc_data->lut_transform = PXP_LUT_NONE;
  5052.  
  5053.     /*
  5054.      * We initially configure PxP for RGB->YUV conversion,
  5055.      * and only write out Y component of the result.
  5056.      */
  5057.  
  5058.     /*
  5059.      * Initialize S0 channel parameters
  5060.      * Parameters should match FB format/width/height
  5061.      */
  5062.     pxp_conf->s0_param.pixel_fmt = PXP_PIX_FMT_RGB565;
  5063.     pxp_conf->s0_param.width = fb_data->info.var.xres_virtual;
  5064.     pxp_conf->s0_param.height = fb_data->info.var.yres;
  5065.     pxp_conf->s0_param.color_key = -1;
  5066.     pxp_conf->s0_param.color_key_enable = false;
  5067.  
  5068.     /*
  5069.      * Initialize OL0 channel parameters
  5070.      * No overlay will be used for PxP operation
  5071.      */
  5072.     for (i = 0; i < 8; i++) {
  5073.         pxp_conf->ol_param[i].combine_enable = false;
  5074.         pxp_conf->ol_param[i].width = 0;
  5075.         pxp_conf->ol_param[i].height = 0;
  5076.         pxp_conf->ol_param[i].pixel_fmt = PXP_PIX_FMT_RGB565;
  5077.         pxp_conf->ol_param[i].color_key_enable = false;
  5078.         pxp_conf->ol_param[i].color_key = -1;
  5079.         pxp_conf->ol_param[i].global_alpha_enable = false;
  5080.         pxp_conf->ol_param[i].global_alpha = 0;
  5081.         pxp_conf->ol_param[i].local_alpha_enable = false;
  5082.     }
  5083.  
  5084.     /*
  5085.      * Initialize Output channel parameters
  5086.      * Output is Y-only greyscale
  5087.      * Output width/height will vary based on update region size
  5088.      */
  5089.     pxp_conf->out_param.width = fb_data->info.var.xres;
  5090.     pxp_conf->out_param.height = fb_data->info.var.yres;
  5091.     pxp_conf->out_param.pixel_fmt = PXP_PIX_FMT_GREY;
  5092.  
  5093.     /*
  5094.      * Ensure this is set to NULL here...we will initialize pxp_chan
  5095.      * later in our thread.
  5096.      */
  5097.     fb_data->pxp_chan = NULL;
  5098.  
  5099.     /* Initialize Scatter-gather list containing 2 buffer addresses. */
  5100.     sg = fb_data->sg;
  5101.     sg_init_table(sg, 2);
  5102.  
  5103.     /*
  5104.      * For use in PxP transfers:
  5105.      * sg[0] holds the FB buffer pointer
  5106.      * sg[1] holds the Output buffer pointer (configured before TX request)
  5107.      */
  5108.     sg_dma_address(&sg[0]) = info->fix.smem_start;
  5109.     sg_set_page(&sg[0], virt_to_page(info->screen_base),
  5110.             info->fix.smem_len, offset_in_page(info->screen_base));
  5111.  
  5112.     fb_data->order_cnt = 0;
  5113.     fb_data->waiting_for_wb = false;
  5114.     fb_data->waiting_for_lut = false;
  5115.     fb_data->waiting_for_lut15 = false;
  5116.     fb_data->waiting_for_idle = false;
  5117.     fb_data->blank = FB_BLANK_UNBLANK;
  5118.     fb_data->power_state = POWER_STATE_OFF;
  5119.     fb_data->powering_down = false;
  5120. /* 2011/04/19 FY11 : Modified default powerdown delay.  */
  5121.     fb_data->pwrdown_delay = DEFAULT_POWER_DOWN_DELAY;
  5122. /* 2011/04/20 FY11 : Supported to clear panel when shutdown. */
  5123.     fb_data->panel_clear_at_shutdown = false;
  5124.  
  5125. /* 2011/04/19 FY11 : Supported wake lock. */
  5126.     wake_lock_init( &(fb_data->wake_lock_ioctl), WAKE_LOCK_SUSPEND, "wl_epdc_ioctl" );
  5127.     wake_lock_init( &(fb_data->wake_lock_update), WAKE_LOCK_SUSPEND, "wl_epdc_update" );
  5128.     wake_lock_init( &(fb_data->wake_lock_power), WAKE_LOCK_SUSPEND, "wl_epdc_power" );
  5129.     fb_data->counter_for_wlupdate = 0;
  5130. /* 2011/07/14 FY11 : Added wake lock for A2. (Workaround for noise after sleep.) */
  5131.     wake_lock_init( &(fb_data->wake_lock_a2), WAKE_LOCK_SUSPEND, "wl_epdc_a2" );
  5132.  
  5133.     /* Register FB */
  5134.     ret = register_framebuffer(info);
  5135.     if (ret) {
  5136.         dev_err(&pdev->dev,
  5137.             "register_framebuffer failed with error %d\n", ret);
  5138.         goto out_dmaengine;
  5139.     }
  5140.  
  5141.     g_fb_data = fb_data;
  5142.  
  5143.     ret = device_create_file(fb_data->info.dev, &epdc_debug_attr);
  5144.  
  5145.  
  5146. /* 2011/03/08 FY11 : Initialize the pointer for temperature range table and waveform buffer. */
  5147.     fb_data->temp_range_bounds = NULL;
  5148.     fb_data->waveform_buffer_virt = NULL;
  5149.     fb_data->waveform_buffer_phys = 0;
  5150.     fb_data->waveform_buffer_size = 0;
  5151.  
  5152.  
  5153. #ifdef DEFAULT_PANEL_HW_INIT
  5154.     ret = mxc_epdc_fb_init_hw((struct fb_info *)fb_data);
  5155.     if (ret) {
  5156.         dev_err(&pdev->dev, "Failed to initialize HW!\n");
  5157.     }
  5158. #endif
  5159.  
  5160.     epdc_fb_data = fb_data;
  5161.  
  5162. /* 2011/04/07 FY11 : Removed showing LOGO. */
  5163.  
  5164. /* 2011/05/12 FY11 : Supported boot progress. */
  5165.     // start progress thread
  5166.     fb_data->epdc_progress_work_queue = create_singlethread_workqueue( "boot_progress" );
  5167.     INIT_DELAYED_WORK(&(fb_data->epdc_progress_work), epdc_progress_work_func);
  5168.     queue_delayed_work( fb_data->epdc_progress_work_queue,
  5169.                 &(fb_data->epdc_progress_work),
  5170.                 HZ / 100 );
  5171.    
  5172.  
  5173.     goto out;
  5174.  
  5175. out_dmaengine:
  5176.     dmaengine_put();
  5177. out_irq:
  5178.     free_irq(fb_data->epdc_irq, fb_data);
  5179. /* 2011/06/08 FY11 : Modified to use static buffer for waveofrm. */
  5180. out_wf_tmp_buf:
  5181.     if (fb_data->pdata->put_pins)
  5182.         fb_data->pdata->put_pins();
  5183.  
  5184.     if ( wf_tmp_buf )
  5185.     {
  5186.         kfree(wf_tmp_buf);
  5187.         wf_tmp_buf = NULL;
  5188.     }
  5189.  
  5190. out_dma_work_buf:
  5191. /* 2011/06/07 FY11 : Modified to share static memory for epdc with bootloader. */
  5192. #ifdef CONFIG_EPD_STATIC_MEM_WORKBUFF
  5193. #else
  5194.     dma_free_writecombine(&pdev->dev, fb_data->working_buffer_size,
  5195.         fb_data->working_buffer_virt, fb_data->working_buffer_phys);
  5196. #endif
  5197.  out_copybuffer:
  5198.     dma_free_writecombine(&pdev->dev, fb_data->max_pix_size*2,
  5199.                   fb_data->virt_addr_copybuf,
  5200.                   fb_data->phys_addr_copybuf);
  5201. out_upd_buffers:
  5202.     list_for_each_entry_safe(plist, temp_list, &fb_data->upd_buf_free_list->list, list) {
  5203.         list_del(&plist->list);
  5204.         dma_free_writecombine(&pdev->dev, fb_data->max_pix_size,
  5205.                       plist->virt_addr,
  5206.                       plist->phys_addr);
  5207.         kfree(plist);
  5208.     }
  5209. out_dma_fb:
  5210. /* 2011/03/15 FY11 : Supported standby screen. */
  5211.     dma_free_writecombine(&pdev->dev, fb_data->map_size + fb_data->standbyscreen_buff_size, info->screen_base,
  5212.                   fb_data->phys_start);
  5213.  
  5214. out_mapregs:
  5215.     iounmap(epdc_base);
  5216. out_cmap:
  5217.     fb_dealloc_cmap(&info->cmap);
  5218. out_fbdata:
  5219.     kfree(fb_data);
  5220. out:
  5221.     return ret;
  5222. }
  5223.  
  5224. static int mxc_epdc_fb_remove(struct platform_device *pdev)
  5225. {
  5226.     struct update_data_list *plist, *temp_list;
  5227.     struct mxc_epdc_fb_data *fb_data = platform_get_drvdata(pdev);
  5228.  
  5229.     epdc_fb_data = NULL;
  5230.     /* wait starting of all panel update. */
  5231.     mxc_epdc_fb_blank(FB_BLANK_POWERDOWN, &fb_data->info);
  5232.  
  5233.     flush_workqueue(fb_data->epdc_submit_workqueue);
  5234.     destroy_workqueue(fb_data->epdc_submit_workqueue);
  5235.  
  5236.     regulator_put(fb_data->display_regulator);
  5237.     regulator_put(fb_data->vcom_regulator);
  5238.     regulator_put(fb_data->epd_pwr0_regulator);
  5239.     regulator_put(fb_data->epd_pwr2_regulator);
  5240.     regulator_put(fb_data->temp_regulator);
  5241.  
  5242.     unregister_framebuffer(&fb_data->info);
  5243.     free_irq(fb_data->epdc_irq, fb_data);
  5244.  
  5245. /* 2011/04/19 FY11 : Supported wake lock. */
  5246.     wake_lock_destroy( &(fb_data->wake_lock_ioctl) );
  5247.     wake_lock_destroy( &(fb_data->wake_lock_update) );
  5248.     wake_lock_destroy( &(fb_data->wake_lock_power) );
  5249.  
  5250. /* 2011/06/08 FY11 : Modified to use static buffer for waveofrm. */
  5251.     if ( wf_tmp_buf )
  5252.     {
  5253.         kfree(wf_tmp_buf);
  5254.         wf_tmp_buf = NULL;
  5255.     }
  5256.  
  5257. /* 2011/06/07 FY11 : Modified to share static memory for epdc with bootloader. */
  5258. #ifdef CONFIG_EPD_STATIC_MEM_WORKBUFF
  5259. #else
  5260.     dma_free_writecombine(&pdev->dev, fb_data->working_buffer_size,
  5261.                 fb_data->working_buffer_virt,
  5262.                 fb_data->working_buffer_phys);
  5263. #endif
  5264.  
  5265.     if (fb_data->waveform_buffer_virt != NULL)
  5266.     {
  5267. /* 2011/06/07 FY11 : Modified to share static memory for epdc with bootloader. */
  5268. #ifdef CONFIG_EPD_STATIC_MEM_WAVEFORM
  5269. #else
  5270.         dma_free_writecombine(&pdev->dev, fb_data->waveform_buffer_size,
  5271.                 fb_data->waveform_buffer_virt,
  5272.                 fb_data->waveform_buffer_phys);
  5273. #endif
  5274.     }
  5275.  
  5276.     if (fb_data->virt_addr_copybuf != NULL)
  5277.         dma_free_writecombine(&pdev->dev, fb_data->max_pix_size*2,
  5278.                 fb_data->virt_addr_copybuf,
  5279.                 fb_data->phys_addr_copybuf);
  5280.     list_for_each_entry_safe(plist, temp_list, &fb_data->upd_buf_free_list->list, list) {
  5281.         list_del(&plist->list);
  5282.         dma_free_writecombine(&pdev->dev, fb_data->max_pix_size,
  5283.                       plist->virt_addr,
  5284.                       plist->phys_addr);
  5285.         kfree(plist);
  5286.     }
  5287. #ifdef CONFIG_FB_MXC_EINK_AUTO_UPDATE_MODE
  5288.     fb_deferred_io_cleanup(&fb_data->info);
  5289. #endif
  5290.  
  5291. /* 2011/03/15 FY11 : Supported standby screen. */
  5292.     dma_free_writecombine(&pdev->dev, fb_data->map_size + fb_data->standbyscreen_buff_size, fb_data->info.screen_base,
  5293.                   fb_data->phys_start);
  5294.  
  5295.     if (fb_data->pdata->put_pins)
  5296.         fb_data->pdata->put_pins();
  5297.  
  5298.     /* Release PxP-related resources */
  5299.     if (fb_data->pxp_chan != NULL)
  5300.         dma_release_channel(&fb_data->pxp_chan->dma_chan);
  5301.  
  5302. /* 2011/03/08 FY11 : Supported to write waveform. */
  5303.     if ( fb_data->temp_range_bounds )
  5304.     {
  5305.         kzfree(fb_data->temp_range_bounds);
  5306.         fb_data->temp_range_bounds = NULL;
  5307.     }
  5308.  
  5309.     dmaengine_put();
  5310.  
  5311.     iounmap(epdc_base);
  5312.  
  5313.     fb_dealloc_cmap(&fb_data->info.cmap);
  5314.  
  5315.     framebuffer_release(&fb_data->info);
  5316.     platform_set_drvdata(pdev, NULL);
  5317.  
  5318.     return 0;
  5319. }
  5320.  
  5321. #ifdef CONFIG_EARLYSUSPEND
  5322. static void mxc_epdc_early_suspend(struct early_suspend *h)
  5323. {
  5324. /* 2011/03/09 FY11 : Fixed the bug that CPU hangs caused by accessing to EPDC without clock. */
  5325. /* 2011/03/15 FY11 : Supported standby screen. */
  5326.     struct mxcfb_update_data stUpdateData;
  5327.     struct fb_info *info;
  5328.     int ret = 0;
  5329.  
  5330.     epdc_debug_printk( "mode=%d\n", h->pm_mode );
  5331.  
  5332.     if (!epdc_fb_data)
  5333.         return;
  5334.  
  5335.     info = (struct fb_info*)epdc_fb_data;
  5336.  
  5337.     if (h->pm_mode == EARLY_SUSPEND_MODE_NORMAL)
  5338.     {
  5339.         mutex_lock(&info->lock);
  5340.  
  5341.         //printk( KERN_ERR "%s mode=EARLY_SUSPEND_MODE_NORMAL\n", __func__ );
  5342.  
  5343. /* 2011/06/21 FY11 : Added black screen. */
  5344.         // wait for completion of all previous update request.
  5345.         ret = mxc_epdc_fb_wait_update_complete( 0, info );
  5346.         if ( ret < 0 )
  5347.         {
  5348.             printk(KERN_ERR "%s fails to wait completion of all previous update.\n", __func__ );
  5349.         }
  5350.  
  5351.         // cancel power down delayed work and power up
  5352.         cancel_delayed_work( &(epdc_fb_data->epdc_done_work) );
  5353.         epdc_powerup(epdc_fb_data);
  5354.  
  5355.         // insert black screen
  5356.         stUpdateData.update_region.top = 0;
  5357.         stUpdateData.update_region.left = 0;
  5358.         stUpdateData.update_region.width = epdc_fb_data->native_width;
  5359.         stUpdateData.update_region.height = epdc_fb_data->native_height;
  5360.         stUpdateData.waveform_mode = epdc_fb_data->wv_modes.mode_gc16;
  5361.         stUpdateData.update_mode = UPDATE_MODE_FULL;
  5362.         epdc_draw_rect( epdc_fb_data, &stUpdateData, 0x00, true );
  5363.  
  5364.  
  5365.         // set parameter
  5366.         stUpdateData.update_region.top = 0;
  5367.         stUpdateData.update_region.left = 0;
  5368.         stUpdateData.update_region.width = epdc_fb_data->info.var.xres;
  5369.         stUpdateData.update_region.height = epdc_fb_data->info.var.yres;
  5370.         stUpdateData.waveform_mode = epdc_fb_data->wv_modes.mode_gc16;
  5371.         stUpdateData.update_mode = UPDATE_MODE_FULL;
  5372.         stUpdateData.update_marker = SSCREEN_UPDATE_MARKER;
  5373.         stUpdateData.temp = TEMP_USE_AMBIENT;
  5374.         stUpdateData.flags = 0;
  5375.  
  5376.         ret = mxc_epdc_fb_send_update( &stUpdateData, &(epdc_fb_data->info), true );
  5377.         if ( ret < 0 )
  5378.         {
  5379.             printk (KERN_ERR "%s send_update failed. %d\n", __func__, ret );
  5380.             mutex_unlock(&info->lock);
  5381.             return;
  5382.         }
  5383.  
  5384.         ret = mxc_epdc_fb_wait_update_complete( stUpdateData.update_marker, &(epdc_fb_data->info));
  5385.         if ( ret < 0 )
  5386.         {
  5387.             printk (KERN_ERR "%s wait complete failed. %d\n", __func__, ret );
  5388.             mutex_unlock(&info->lock);
  5389.             return;
  5390.         }
  5391.  
  5392.         // cancel power down delayed work and power down
  5393.         cancel_delayed_work( &(epdc_fb_data->epdc_done_work) );
  5394.         epdc_fb_data->powering_down = true;
  5395.         epdc_powerdown(epdc_fb_data);
  5396.  
  5397.         mutex_unlock(&info->lock);
  5398.  
  5399.     }
  5400. }
  5401.  
  5402. /* 2011/03/15 FY11 : Supported standby screen. */
  5403. static void mxc_epdc_late_resume(struct early_suspend *h)
  5404. {
  5405.     struct mxcfb_update_data stUpdateData;
  5406.     struct fb_info *info;
  5407.     int ret;
  5408.  
  5409.     epdc_debug_printk( "mode=%d\n", h->pm_mode );
  5410.  
  5411.     if (!epdc_fb_data)
  5412.         return;
  5413.  
  5414.     if (h->pm_mode == EARLY_SUSPEND_MODE_NORMAL)
  5415.     {
  5416.         //printk( KERN_ERR "%s mode=EARLY_SUSPEND_MODE_NORMAL\n", __func__ );
  5417.  
  5418.         info = (struct fb_info*)epdc_fb_data;
  5419.         // wait for early suspend completion.
  5420.         mutex_lock(&info->lock);
  5421.  
  5422.         flush_workqueue(epdc_fb_data->epdc_submit_workqueue);
  5423.  
  5424. /* 2011/06/21 FY11 : Added black screen. */
  5425.         // powerup
  5426.         epdc_powerup(epdc_fb_data);
  5427.  
  5428.         // insert black screen
  5429.         stUpdateData.update_region.top = 0;
  5430.         stUpdateData.update_region.left = 0;
  5431.         stUpdateData.update_region.width = epdc_fb_data->native_width;
  5432.         stUpdateData.update_region.height = epdc_fb_data->native_height;
  5433.         stUpdateData.waveform_mode = epdc_fb_data->wv_modes.mode_gc16;
  5434.         stUpdateData.update_mode = UPDATE_MODE_FULL;
  5435.         epdc_draw_rect( epdc_fb_data, &stUpdateData, 0x00, true );
  5436.  
  5437. /* 2011/07/07 FY11 : Removed restoring FB and added clearing FB. */
  5438.         memset( info->screen_base, 0x00, epdc_fb_data->map_size  );
  5439.  
  5440.         mutex_unlock(&info->lock);
  5441.     }
  5442. }
  5443.  
  5444. static struct early_suspend mxc_epdc_earlysuspend = {
  5445.     .level = EARLY_SUSPEND_LEVEL_DISABLE_FB,
  5446.     .suspend = mxc_epdc_early_suspend,
  5447.     .resume = mxc_epdc_late_resume,
  5448. };
  5449. #endif
  5450.  
  5451. #ifdef CONFIG_PM
  5452. static int mxc_epdc_fb_suspend(struct platform_device *pdev, pm_message_t state)
  5453. {
  5454.     struct mxc_epdc_fb_data *data = platform_get_drvdata(pdev);
  5455.     int ret;
  5456.     ret = mxc_epdc_fb_blank(FB_BLANK_POWERDOWN, &data->info);
  5457.     if (ret)
  5458.         goto out;
  5459.  
  5460. out:
  5461.     return ret;
  5462. }
  5463.  
  5464. static int mxc_epdc_fb_resume(struct platform_device *pdev)
  5465. {
  5466.     struct mxc_epdc_fb_data *data = platform_get_drvdata(pdev);
  5467.  
  5468.     mxc_epdc_fb_blank(FB_BLANK_UNBLANK, &data->info);
  5469.     return 0;
  5470. }
  5471. #else
  5472. #define mxc_epdc_fb_suspend NULL
  5473. #define mxc_epdc_fb_resume  NULL
  5474. #endif
  5475.  
  5476. /* 2011/04/20 FY11 : Supported to clear panel when shutdown. */
  5477. static void mxc_epdc_fb_shutdown(struct platform_device *pdev)
  5478. {
  5479.     int i, retry=0, white_lut;
  5480.     struct mxc_epdc_fb_data *fb_data = platform_get_drvdata(pdev);
  5481.  
  5482.     epdc_debug_printk( "start" );
  5483.     mutex_lock(&(fb_data->info.lock));
  5484.  
  5485.     // wait starting of all panel update requested by application.
  5486.     mxc_epdc_fb_blank( FB_BLANK_POWERDOWN, &(fb_data->info) );
  5487.  
  5488.     epdc_debug_printk( "power up\n" );
  5489.     fb_data->pwrdown_delay = FB_POWERDOWN_DISABLE;
  5490.     cancel_delayed_work( &(fb_data->epdc_done_work) );
  5491.     epdc_powerup(fb_data);
  5492.  
  5493.     // if panel init flag is not set, display white image.
  5494.     if ( fb_data->panel_clear_at_shutdown )
  5495.     {
  5496.         if ( !epdc_any_luts_available() )
  5497.         {
  5498.             epdc_debug_printk( "wait lut.\n" );
  5499.             /* Initialize event signalling an update resource is free */
  5500.             init_completion(&fb_data->update_res_free);
  5501.             fb_data->waiting_for_lut = true;
  5502.             wait_for_completion(&fb_data->update_res_free);
  5503.         }
  5504.         white_lut = epdc_get_next_lut();
  5505.  
  5506.         epdc_debug_printk( "read temp.\n" );
  5507.         mxc_epdc_fb_read_temperature(fb_data);
  5508.         epdc_set_temp(fb_data->temp_index);
  5509.    
  5510.         epdc_set_update_coord(0, 0);
  5511.         epdc_set_update_dimensions( fb_data->cur_mode->vmode->xres,
  5512.                         fb_data->cur_mode->vmode->yres );
  5513.         epdc_debug_printk( "start display black.\n" );
  5514.         epdc_submit_update(white_lut,
  5515.                    fb_data->wv_modes.mode_gc16,
  5516.                    UPDATE_MODE_FULL,
  5517.                    true, 0);
  5518.         // wait black display
  5519.         retry = 30;
  5520.         while( epdc_is_lut_active(white_lut) ||
  5521.             epdc_is_working_buffer_busy() )
  5522.         {
  5523.             msleep(100);
  5524.             retry--;
  5525.             if ( retry == 0 )
  5526.             {
  5527.                 printk( KERN_ERR "%s  black complete timeout.\n", __func__ );
  5528.                 goto out;
  5529.             }
  5530.         }
  5531.  
  5532.         epdc_debug_printk( "start clear panel.\n" );
  5533.         epdc_submit_update(white_lut,
  5534.                    fb_data->wv_modes.mode_gc16,
  5535.                    UPDATE_MODE_FULL,
  5536.                    true, 0xFF);
  5537.     }
  5538.  
  5539.     epdc_debug_printk( "wait lut completion\n" );
  5540.  
  5541.     // wait all update completion.
  5542.     for ( i = 0; i < EPDC_NUM_LUTS; i++ )
  5543.     {
  5544.         retry = 30;
  5545.         while( epdc_is_lut_active(i) ||
  5546.             epdc_is_working_buffer_busy() )
  5547.         {
  5548.             msleep(100);
  5549.             retry--;
  5550.             if ( retry == 0 )
  5551.             {
  5552.                 printk( KERN_ERR "%s wait lut %d idle timeout.\n", __func__, i );
  5553.                 break;
  5554.             }
  5555.         }
  5556.     }
  5557.  
  5558. out:
  5559.     epdc_debug_printk( "powerdown\n" );
  5560.     fb_data->powering_down = true;
  5561.     epdc_powerdown(fb_data);
  5562.  
  5563.     epdc_debug_printk( "end" );
  5564. }
  5565.  
  5566.  
  5567. static struct platform_driver mxc_epdc_fb_driver = {
  5568.     .probe = mxc_epdc_fb_probe,
  5569. /* 2011/04/20 FY11 : Supported to clear panel when shutdown. */
  5570.     .shutdown = mxc_epdc_fb_shutdown,
  5571.     .remove = mxc_epdc_fb_remove,
  5572.     .suspend = mxc_epdc_fb_suspend,
  5573.     .resume = mxc_epdc_fb_resume,
  5574.     .driver = {
  5575.            .name = "mxc_epdc_fb",
  5576.            .owner = THIS_MODULE,
  5577.            },
  5578. };
  5579.  
  5580. /* Callback function triggered after PxP receives an EOF interrupt */
  5581. static void pxp_dma_done(void *arg)
  5582. {
  5583.     struct pxp_tx_desc *tx_desc = to_tx_desc(arg);
  5584.     struct dma_chan *chan = tx_desc->txd.chan;
  5585.     struct pxp_channel *pxp_chan = to_pxp_channel(chan);
  5586.     struct mxc_epdc_fb_data *fb_data = pxp_chan->client;
  5587.  
  5588.     /* This call will signal wait_for_completion_timeout() in send_buffer_to_pxp */
  5589.     complete(&fb_data->pxp_tx_cmpl);
  5590. }
  5591.  
  5592. /* Function to request PXP DMA channel */
  5593. static int pxp_chan_init(struct mxc_epdc_fb_data *fb_data)
  5594. {
  5595.     dma_cap_mask_t mask;
  5596.     struct dma_chan *chan;
  5597.  
  5598.     /*
  5599.      * Request a free channel
  5600.      */
  5601.     dma_cap_zero(mask);
  5602.     dma_cap_set(DMA_SLAVE, mask);
  5603.     dma_cap_set(DMA_PRIVATE, mask);
  5604.     chan = dma_request_channel(mask, NULL, NULL);
  5605.     if (!chan) {
  5606.         dev_err(fb_data->dev, "Unsuccessfully received channel!!!!\n");
  5607.         return -EBUSY;
  5608.     }
  5609.  
  5610.     dev_dbg(fb_data->dev, "Successfully received channel.\n");
  5611.  
  5612.     fb_data->pxp_chan = to_pxp_channel(chan);
  5613.  
  5614.     fb_data->pxp_chan->client = fb_data;
  5615.  
  5616.     init_completion(&fb_data->pxp_tx_cmpl);
  5617.  
  5618.     return 0;
  5619. }
  5620.  
  5621. /*
  5622.  * Function to call PxP DMA driver and send our latest FB update region
  5623.  * through the PxP and out to an intermediate buffer.
  5624.  * Note: This is a blocking call, so upon return the PxP tx should be complete.
  5625.  */
  5626. static int pxp_process_update(struct mxc_epdc_fb_data *fb_data,
  5627.                   u32 src_width, u32 src_height,
  5628.                   struct mxcfb_rect *update_region)
  5629. {
  5630.     dma_cookie_t cookie;
  5631.     struct scatterlist *sg = fb_data->sg;
  5632.     struct dma_chan *dma_chan;
  5633.     struct pxp_tx_desc *desc;
  5634.     struct dma_async_tx_descriptor *txd;
  5635.     struct pxp_config_data *pxp_conf = &fb_data->pxp_conf;
  5636.     struct pxp_proc_data *proc_data = &fb_data->pxp_conf.proc_data;
  5637.     int i, ret;
  5638.     int length;
  5639.  
  5640.     dev_dbg(fb_data->dev, "Starting PxP Send Buffer\n");
  5641.  
  5642.     /* First, check to see that we have acquired a PxP Channel object */
  5643.     if (fb_data->pxp_chan == NULL) {
  5644.         /*
  5645.          * PxP Channel has not yet been created and initialized,
  5646.          * so let's go ahead and try
  5647.          */
  5648.         ret = pxp_chan_init(fb_data);
  5649.         if (ret) {
  5650.             /*
  5651.              * PxP channel init failed, and we can't use the
  5652.              * PxP until the PxP DMA driver has loaded, so we abort
  5653.              */
  5654.             dev_err(fb_data->dev, "PxP chan init failed\n");
  5655.             return -ENODEV;
  5656.         }
  5657.     }
  5658.  
  5659.     /*
  5660.      * Init completion, so that we
  5661.      * can be properly informed of the completion
  5662.      * of the PxP task when it is done.
  5663.      */
  5664.     init_completion(&fb_data->pxp_tx_cmpl);
  5665.  
  5666.     dev_dbg(fb_data->dev, "sg[0] = 0x%x, sg[1] = 0x%x\n",
  5667.         sg_dma_address(&sg[0]), sg_dma_address(&sg[1]));
  5668.  
  5669.     dma_chan = &fb_data->pxp_chan->dma_chan;
  5670.  
  5671.     txd = dma_chan->device->device_prep_slave_sg(dma_chan, sg, 2,
  5672.                              DMA_TO_DEVICE,
  5673.                              DMA_PREP_INTERRUPT);
  5674.     if (!txd) {
  5675.         dev_err(fb_data->info.device,
  5676.             "Error preparing a DMA transaction descriptor.\n");
  5677.         return -EIO;
  5678.     }
  5679.  
  5680.     txd->callback_param = txd;
  5681.     txd->callback = pxp_dma_done;
  5682.  
  5683.     /*
  5684.      * Configure PxP for processing of new update region
  5685.      * The rest of our config params were set up in
  5686.      * probe() and should not need to be changed.
  5687.      */
  5688.     pxp_conf->s0_param.width = src_width;
  5689.     pxp_conf->s0_param.height = src_height;
  5690.     proc_data->srect.top = update_region->top;
  5691.     proc_data->srect.left = update_region->left;
  5692.     proc_data->srect.width = update_region->width;
  5693.     proc_data->srect.height = update_region->height;
  5694.  
  5695.     /*
  5696.      * Because only YUV/YCbCr image can be scaled, configure
  5697.      * drect equivalent to srect, as such do not perform scaling.
  5698.      */
  5699.     proc_data->drect.top = 0;
  5700.     proc_data->drect.left = 0;
  5701.     proc_data->drect.width = proc_data->srect.width;
  5702.     proc_data->drect.height = proc_data->srect.height;
  5703.  
  5704.     /* PXP expects rotation in terms of degrees */
  5705.     proc_data->rotate = fb_data->epdc_fb_var.rotate * 90;
  5706.     if (proc_data->rotate > 270)
  5707.         proc_data->rotate = 0;
  5708.  
  5709.     pxp_conf->out_param.width = update_region->width;
  5710.     pxp_conf->out_param.height = update_region->height;
  5711.  
  5712.     desc = to_tx_desc(txd);
  5713.     length = desc->len;
  5714.     for (i = 0; i < length; i++) {
  5715.         if (i == 0) {/* S0 */
  5716.             memcpy(&desc->proc_data, proc_data, sizeof(struct pxp_proc_data));
  5717.             pxp_conf->s0_param.paddr = sg_dma_address(&sg[0]);
  5718.             memcpy(&desc->layer_param.s0_param, &pxp_conf->s0_param,
  5719.                 sizeof(struct pxp_layer_param));
  5720.         } else if (i == 1) {
  5721.             pxp_conf->out_param.paddr = sg_dma_address(&sg[1]);
  5722.             memcpy(&desc->layer_param.out_param, &pxp_conf->out_param,
  5723.                 sizeof(struct pxp_layer_param));
  5724.         }
  5725.         /* TODO: OverLay */
  5726.  
  5727.         desc = desc->next;
  5728.     }
  5729.  
  5730.     /* Submitting our TX starts the PxP processing task */
  5731.     cookie = txd->tx_submit(txd);
  5732.     dev_dbg(fb_data->info.device, "%d: Submit %p #%d\n", __LINE__, txd,
  5733.         cookie);
  5734.     if (cookie < 0) {
  5735.         dev_err(fb_data->info.device, "Error sending FB through PxP\n");
  5736.         return -EIO;
  5737.     }
  5738.  
  5739.     fb_data->txd = txd;
  5740.  
  5741.     /* trigger ePxP */
  5742.     dma_async_issue_pending(dma_chan);
  5743.  
  5744.     return 0;
  5745. }
  5746.  
  5747. static int pxp_complete_update(struct mxc_epdc_fb_data *fb_data, u32 *hist_stat)
  5748. {
  5749.     int ret;
  5750.     /*
  5751.      * Wait for completion event, which will be set
  5752.      * through our TX callback function.
  5753.      */
  5754.     ret = wait_for_completion_timeout(&fb_data->pxp_tx_cmpl, HZ / 2);
  5755.     if (ret <= 0) {
  5756.         dev_info(fb_data->info.device,
  5757.              "PxP operation failed due to %s\n",
  5758.              ret < 0 ? "user interrupt" : "timeout");
  5759.         dma_release_channel(&fb_data->pxp_chan->dma_chan);
  5760.         fb_data->pxp_chan = NULL;
  5761.         return ret ? : -ETIMEDOUT;
  5762.     }
  5763.  
  5764.     *hist_stat = to_tx_desc(fb_data->txd)->hist_status;
  5765.     dma_release_channel(&fb_data->pxp_chan->dma_chan);
  5766.     fb_data->pxp_chan = NULL;
  5767.  
  5768.     dev_dbg(fb_data->dev, "TX completed\n");
  5769.  
  5770.     return 0;
  5771. }
  5772.  
  5773. static int __init mxc_epdc_fb_init(void)
  5774. {
  5775. #ifdef CONFIG_EARLYSUSPEND
  5776. /* 2011/03/15 FY11 : Supported standby screen. */
  5777.     register_early_suspend(&mxc_epdc_earlysuspend);
  5778. #endif
  5779.     return platform_driver_register(&mxc_epdc_fb_driver);
  5780. }
  5781. late_initcall(mxc_epdc_fb_init);
  5782.  
  5783.  
  5784. static void __exit mxc_epdc_fb_exit(void)
  5785. {
  5786.     platform_driver_unregister(&mxc_epdc_fb_driver);
  5787. #ifdef CONFIG_EARLYSUSPEND
  5788. /* 2011/03/15 FY11 : Supported standby screen. */
  5789.     unregister_early_suspend(&mxc_epdc_earlysuspend);
  5790. #endif
  5791. }
  5792. module_exit(mxc_epdc_fb_exit);
  5793.  
  5794. MODULE_AUTHOR("Freescale Semiconductor, Inc.");
  5795. MODULE_DESCRIPTION("MXC EPDC framebuffer driver");
  5796. MODULE_LICENSE("GPL");
  5797. MODULE_SUPPORTED_DEVICE("fb");
  5798.  
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