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usi2e.asm Tx sort of OK. Usi uart

prjbrook
Oct 12th, 2014
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  1. Trying to use tn85's usi as UART. First "sucess"
  2. .include "tn85def.inc" ;usi2e: Prvious one worked in that it sent two bytes that came out
  3. ; back to fron but were OK at 600baud. ie I sent a4 then bf. This gets interpreted as 49 by the
  4. ; time the initial high+start bit come off the front and the last two bits are read from the
  5. ; second byte and then the whole thing is interpreted as lsb first but was sent the other way round
  6. again:
  7. ldi r16, low(RAMEND)
  8. out SPL, r16
  9. ldi r16,high(RAMEND)
  10. out SPH, r16
  11. ldi r16,$ff
  12. out DDRB,r16
  13. out PORTB,r16
  14. ldi r17,(1<<USIWM0)|(0<<USICS0) ;need this otherwise msb not initially joined to D0
  15. out USICR,r17
  16. ldi r16,$a4
  17. rcall SPITransfer_Fast2
  18. ldi r16,$bf
  19. rcall SPITransfer_Fast2
  20.  
  21. ;rcall SPITransfer
  22. here:
  23. rcall oneSec
  24. rcall oneSec
  25. rcall oneSec
  26. rjmp again
  27.  
  28.  
  29.  
  30. ;-----------------------------------
  31. SPITransfer_Fast2:
  32. out USIDR,r16
  33. ;fin2:
  34. ;rjmp fin2
  35. ;ldi r16,(1<<USIWM0)|(0<<USICS0)|(1<<USITC)
  36. ldi r17,(1<<USIWM0)|(0<<USICS0)|(1<<USITC)|(1<<USICLK)
  37. ldi r18,8
  38. upt2:
  39. ;out USICR,r16 ; MSB
  40. rcall oneBitTime
  41. ;rcall oneSec
  42. ;rjmp upt2
  43. out USICR,r17
  44. up3:
  45. ;rjmp up3
  46. dec r18
  47. brne upt2
  48.  
  49. ret
  50. ;---------------------------------------
  51.  
  52. halfBitTime: ;better name for this delay. Half of 1/600
  53. ;myDelay1200:
  54. ;ldi r21,13 ; 13 works for m328 at 16Mhz
  55. push r20
  56. push r21
  57. ldi r21,7 ;try 7 for tiny85 at 8Hmz
  58. ldi r20,130 ;r20,21 at 130,7 give 833uS. Good for 600baud at 8Mhz
  59. starthbt:
  60. inc r20
  61. nop
  62. brne starthbt
  63. dec r21
  64. brne starthbt
  65. pop r21
  66. pop r20
  67. ret
  68. ;--------------------------------------------------
  69. oneBitTime:
  70. rcall halfBitTime
  71. rcall halfBitTime
  72. ret
  73. ;---------------------------------
  74. delay100ms: ;handy; delay for about 0.1 sec = 100 ms
  75. ;header endif_1,10,"delay100ms"
  76. ;delay100ms:
  77. ;.ifdef testing
  78. ; ldi r16,1
  79. ;.else
  80. push r16
  81. ldi r16,60
  82. .;endif
  83. upd100:
  84. rcall oneBitTime
  85. dec r16
  86. brne upd100
  87. pop r16
  88. ret ;after about a tenth of a second
  89. ;------------------------
  90. oneSec:
  91. ;jmp finsec ;take out when not simulating
  92. push r17
  93. ldi r17,5
  94. upones:
  95. rcall delay100ms
  96. dec r17
  97. brne upones
  98. pop r17
  99. finsec:
  100. ret
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