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  1. /*
  2.  *  linux/arch/arm/mach-bcm2708/bcm2708.c
  3.  *
  4.  *  Copyright (C) 2010 Broadcom
  5.  *
  6.  * This program is free software; you can redistribute it and/or modify
  7.  * it under the terms of the GNU General Public License as published by
  8.  * the Free Software Foundation; either version 2 of the License, or
  9.  * (at your option) any later version.
  10.  *
  11.  * This program is distributed in the hope that it will be useful,
  12.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14.  * GNU General Public License for more details.
  15.  *
  16.  * You should have received a copy of the GNU General Public License
  17.  * along with this program; if not, write to the Free Software
  18.  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19.  */
  20.  
  21. #include <linux/init.h>
  22. #include <linux/device.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/serial_8250.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/syscore_ops.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/amba/bus.h>
  29. #include <linux/amba/clcd.h>
  30. #include <linux/clockchips.h>
  31. #include <linux/cnt32_to_63.h>
  32. #include <linux/io.h>
  33. #include <linux/module.h>
  34. #include <linux/spi/spi.h>
  35. #include <linux/w1-gpio.h>
  36. #include <linux/pps-gpio.h>
  37. #include <linux/gpio.h>
  38. #include <linux/irq.h>
  39. #include <linux/platform_data/max310x.h>
  40. #include <linux/rtc/ds1307.h>
  41. #include <linux/irq.h>
  42.  
  43. #include <linux/version.h>
  44. #include <linux/clkdev.h>
  45. #include <asm/system.h>
  46. #include <mach/hardware.h>
  47. #include <asm/irq.h>
  48. #include <linux/leds.h>
  49. #include <asm/mach-types.h>
  50. #include <asm/sched_clock.h>
  51.  
  52. #include <asm/mach/arch.h>
  53. #include <asm/mach/flash.h>
  54. #include <asm/mach/irq.h>
  55. #include <asm/mach/time.h>
  56. #include <asm/mach/map.h>
  57.  
  58. #include <mach/timex.h>
  59. #include <mach/dma.h>
  60. #include <mach/vcio.h>
  61. #include <mach/system.h>
  62.  
  63. #include <linux/delay.h>
  64.  
  65. #include "bcm2708.h"
  66. #include "armctrl.h"
  67. #include "clock.h"
  68.  
  69. #ifdef CONFIG_BCM_VC_CMA
  70. #include <linux/broadcom/vc_cma.h>
  71. #endif
  72.  
  73.  
  74. /* Effectively we have an IOMMU (ARM<->VideoCore map) that is set up to
  75.  * give us IO access only to 64Mbytes of physical memory (26 bits).  We could
  76.  * represent this window by setting our dmamasks to 26 bits but, in fact
  77.  * we're not going to use addresses outside this range (they're not in real
  78.  * memory) so we don't bother.
  79.  *
  80.  * In the future we might include code to use this IOMMU to remap other
  81.  * physical addresses onto VideoCore memory then the use of 32-bits would be
  82.  * more legitimate.
  83.  */
  84. #define DMA_MASK_BITS_COMMON 32
  85.  
  86. // use GPIO 4 for the one-wire GPIO pin, if enabled
  87. #define W1_GPIO 4
  88.  
  89. /* command line parameters */
  90. static unsigned boardrev, serial;
  91. static unsigned uart_clock;
  92.  
  93. static void __init bcm2708_init_led(void);
  94.  
  95. void __init bcm2708_init_irq(void)
  96. {
  97.         armctrl_init(__io_address(ARMCTRL_IC_BASE), 0, 0, 0);
  98. }
  99.  
  100. static struct map_desc bcm2708_io_desc[] __initdata = {
  101.         {
  102.          .virtual = IO_ADDRESS(ARMCTRL_BASE),
  103.          .pfn = __phys_to_pfn(ARMCTRL_BASE),
  104.          .length = SZ_4K,
  105.          .type = MT_DEVICE},
  106.         {
  107.          .virtual = IO_ADDRESS(UART0_BASE),
  108.          .pfn = __phys_to_pfn(UART0_BASE),
  109.          .length = SZ_4K,
  110.          .type = MT_DEVICE},
  111.         {
  112.          .virtual = IO_ADDRESS(UART1_BASE),
  113.          .pfn = __phys_to_pfn(UART1_BASE),
  114.          .length = SZ_4K,
  115.          .type = MT_DEVICE},
  116. #ifdef CONFIG_MMC_BCM2708       /* broadcom legacy SD */
  117.         {
  118.          .virtual = IO_ADDRESS(MMCI0_BASE),
  119.          .pfn = __phys_to_pfn(MMCI0_BASE),
  120.          .length = SZ_4K,
  121.          .type = MT_DEVICE},
  122. #endif
  123.         {
  124.          .virtual = IO_ADDRESS(DMA_BASE),
  125.          .pfn = __phys_to_pfn(DMA_BASE),
  126.          .length = SZ_4K,
  127.          .type = MT_DEVICE},
  128.         {
  129.          .virtual = IO_ADDRESS(MCORE_BASE),
  130.          .pfn = __phys_to_pfn(MCORE_BASE),
  131.          .length = SZ_4K,
  132.          .type = MT_DEVICE},
  133.         {
  134.          .virtual = IO_ADDRESS(ST_BASE),
  135.          .pfn = __phys_to_pfn(ST_BASE),
  136.          .length = SZ_4K,
  137.          .type = MT_DEVICE},
  138.         {
  139.          .virtual = IO_ADDRESS(USB_BASE),
  140.          .pfn = __phys_to_pfn(USB_BASE),
  141.          .length = SZ_128K,
  142.          .type = MT_DEVICE},
  143.         {
  144.          .virtual = IO_ADDRESS(PM_BASE),
  145.          .pfn = __phys_to_pfn(PM_BASE),
  146.          .length = SZ_4K,
  147.          .type = MT_DEVICE},
  148.         {
  149.          .virtual = IO_ADDRESS(GPIO_BASE),
  150.          .pfn = __phys_to_pfn(GPIO_BASE),
  151.          .length = SZ_4K,
  152.          .type = MT_DEVICE}
  153. };
  154.  
  155. void __init bcm2708_map_io(void)
  156. {
  157.         iotable_init(bcm2708_io_desc, ARRAY_SIZE(bcm2708_io_desc));
  158. }
  159.  
  160. /* The STC is a free running counter that increments at the rate of 1MHz */
  161. #define STC_FREQ_HZ 1000000
  162.  
  163. static inline uint32_t timer_read(void)
  164. {
  165.         /* STC: a free running counter that increments at the rate of 1MHz */
  166.         return readl(__io_address(ST_BASE + 0x04));
  167. }
  168.  
  169. static unsigned long bcm2708_read_current_timer(void)
  170. {
  171.         return timer_read();
  172. }
  173.  
  174. static u32 notrace bcm2708_read_sched_clock(void)
  175. {
  176.         return timer_read();
  177. }
  178.  
  179. static cycle_t clksrc_read(struct clocksource *cs)
  180. {
  181.         return timer_read();
  182. }
  183.  
  184. static struct clocksource clocksource_stc = {
  185.         .name = "stc",
  186.         .rating = 300,
  187.         .read = clksrc_read,
  188.         .mask = CLOCKSOURCE_MASK(32),
  189.         .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  190. };
  191.  
  192. unsigned long frc_clock_ticks32(void)
  193. {
  194.         return timer_read();
  195. }
  196.  
  197. static void __init bcm2708_clocksource_init(void)
  198. {
  199.         if (clocksource_register_hz(&clocksource_stc, STC_FREQ_HZ)) {
  200.                 printk(KERN_ERR "timer: failed to initialize clock "
  201.                        "source %s\n", clocksource_stc.name);
  202.         }
  203. }
  204.  
  205.  
  206. /*
  207.  * These are fixed clocks.
  208.  */
  209. static struct clk ref24_clk = {
  210.         .rate = UART0_CLOCK,    /* The UART is clocked at 3MHz via APB_CLK */
  211. };
  212.  
  213. static struct clk osc_clk = {
  214. #ifdef CONFIG_ARCH_BCM2708_CHIPIT
  215.         .rate = 27000000,
  216. #else
  217.         .rate = 500000000,      /* ARM clock is set from the VideoCore booter */
  218. #endif
  219. };
  220.  
  221. /* warning - the USB needs a clock > 34MHz */
  222.  
  223. static struct clk sdhost_clk = {
  224. #ifdef CONFIG_ARCH_BCM2708_CHIPIT
  225.         .rate = 4000000,        /* 4MHz */
  226. #else
  227.         .rate = 250000000,      /* 250MHz */
  228. #endif
  229. };
  230.  
  231. static struct clk_lookup lookups[] = {
  232.         {                       /* UART0 */
  233.          .dev_id = "dev:f1",
  234.          .clk = &ref24_clk,
  235.          },
  236.         {                       /* USB */
  237.          .dev_id = "bcm2708_usb",
  238.          .clk = &osc_clk,
  239. #ifdef CONFIG_MMC_BCM2708
  240.          },
  241.         {                       /* MCI */
  242.          .dev_id = "bcm2708_mci.0",
  243.          .clk = &sdhost_clk,
  244. #endif
  245.          }, {   /* SPI */
  246.                  .dev_id = "bcm2708_spi.0",
  247.                  .clk = &sdhost_clk,
  248.          }, {   /* BSC0 */
  249.                  .dev_id = "bcm2708_i2c.0",
  250.                  .clk = &sdhost_clk,
  251.          }, {   /* BSC1 */
  252.                  .dev_id = "bcm2708_i2c.1",
  253.                  .clk = &sdhost_clk,
  254.          }
  255. };
  256.  
  257. #define UART0_IRQ       { IRQ_UART, 0 /*NO_IRQ*/ }
  258. #define UART0_DMA       { 15, 14 }
  259.  
  260. AMBA_DEVICE(uart0, "dev:f1", UART0, NULL);
  261.  
  262. static struct amba_device *amba_devs[] __initdata = {
  263.         &uart0_device,
  264. };
  265.  
  266. static struct resource bcm2708_dmaman_resources[] = {
  267.         {
  268.          .start = DMA_BASE,
  269.          .end = DMA_BASE + SZ_4K - 1,
  270.          .flags = IORESOURCE_MEM,
  271.          }
  272. };
  273.  
  274. static struct platform_device bcm2708_dmaman_device = {
  275.         .name = BCM_DMAMAN_DRIVER_NAME,
  276.         .id = 0,                /* first bcm2708_dma */
  277.         .resource = bcm2708_dmaman_resources,
  278.         .num_resources = ARRAY_SIZE(bcm2708_dmaman_resources),
  279. };
  280.  
  281. #ifdef CONFIG_MMC_BCM2708
  282. static struct resource bcm2708_mci_resources[] = {
  283.         {
  284.          .start = MMCI0_BASE,
  285.          .end = MMCI0_BASE + SZ_4K - 1,
  286.          .flags = IORESOURCE_MEM,
  287.          },
  288.         {
  289.          .start = IRQ_SDIO,
  290.          .end = IRQ_SDIO,
  291.          .flags = IORESOURCE_IRQ,
  292.          }
  293. };
  294.  
  295. static struct platform_device bcm2708_mci_device = {
  296.         .name = "bcm2708_mci",
  297.         .id = 0,                /* first bcm2708_mci */
  298.         .resource = bcm2708_mci_resources,
  299.         .num_resources = ARRAY_SIZE(bcm2708_mci_resources),
  300.         .dev = {
  301.                 .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON),
  302.                 },
  303. };
  304. #endif /* CONFIG_MMC_BCM2708 */
  305.  
  306. #if defined(CONFIG_W1_MASTER_GPIO) || defined(CONFIG_W1_MASTER_GPIO_MODULE)
  307. static struct w1_gpio_platform_data w1_gpio_pdata = {
  308.         .pin = W1_GPIO,
  309.         .is_open_drain = 0,
  310. };
  311.  
  312. static struct platform_device w1_device = {
  313.         .name = "w1-gpio",
  314.         .id = -1,
  315.         .dev.platform_data = &w1_gpio_pdata,
  316. };
  317. #endif
  318.  
  319. static u64 fb_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON);
  320.  
  321. static struct platform_device bcm2708_fb_device = {
  322.         .name = "bcm2708_fb",
  323.         .id = -1,               /* only one bcm2708_fb */
  324.         .resource = NULL,
  325.         .num_resources = 0,
  326.         .dev = {
  327.                 .dma_mask = &fb_dmamask,
  328.                 .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON),
  329.                 },
  330. };
  331.  
  332. static struct plat_serial8250_port bcm2708_uart1_platform_data[] = {
  333.         {
  334.          .mapbase = UART1_BASE + 0x40,
  335.          .irq = IRQ_AUX,
  336.          .uartclk = 125000000,
  337.          .regshift = 2,
  338.          .iotype = UPIO_MEM,
  339.          .flags = UPF_FIXED_TYPE | UPF_IOREMAP | UPF_SKIP_TEST,
  340.          .type = PORT_8250,
  341.          },
  342.         {},
  343. };
  344.  
  345. static struct platform_device bcm2708_uart1_device = {
  346.         .name = "serial8250",
  347.         .id = PLAT8250_DEV_PLATFORM,
  348.         .dev = {
  349.                 .platform_data = bcm2708_uart1_platform_data,
  350.                 },
  351. };
  352.  
  353. static struct resource bcm2708_usb_resources[] = {
  354.         [0] = {
  355.                .start = USB_BASE,
  356.                .end = USB_BASE + SZ_128K - 1,
  357.                .flags = IORESOURCE_MEM,
  358.                },
  359.         [1] = {
  360.                 .start = MPHI_BASE,
  361.                 .end = MPHI_BASE + SZ_4K - 1,
  362.                 .flags = IORESOURCE_MEM,
  363.               },
  364.         [2] = {
  365.                .start = IRQ_HOSTPORT,
  366.                .end = IRQ_HOSTPORT,
  367.                .flags = IORESOURCE_IRQ,
  368.                },
  369. };
  370.  
  371. bool fiq_fix_enable = true;
  372.  
  373. static struct resource bcm2708_usb_resources_no_fiq_fix[] = {
  374.         [0] = {
  375.                 .start = USB_BASE,
  376.                 .end = USB_BASE + SZ_128K - 1,
  377.                 .flags = IORESOURCE_MEM,
  378.                 },
  379.         [1] = {
  380.                 .start = IRQ_USB,
  381.                 .end = IRQ_USB,
  382.                 .flags = IORESOURCE_IRQ,
  383.                 },
  384. };
  385.  
  386. static u64 usb_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON);
  387.  
  388. static struct platform_device bcm2708_usb_device = {
  389.         .name = "bcm2708_usb",
  390.         .id = -1,               /* only one bcm2708_usb */
  391.         .resource = bcm2708_usb_resources,
  392.         .num_resources = ARRAY_SIZE(bcm2708_usb_resources),
  393.         .dev = {
  394.                 .dma_mask = &usb_dmamask,
  395.                 .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON),
  396.                 },
  397. };
  398.  
  399. static struct resource bcm2708_vcio_resources[] = {
  400.         [0] = {                 /* mailbox/semaphore/doorbell access */
  401.                .start = MCORE_BASE,
  402.                .end = MCORE_BASE + SZ_4K - 1,
  403.                .flags = IORESOURCE_MEM,
  404.                },
  405. };
  406.  
  407. static u64 vcio_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON);
  408.  
  409. static struct platform_device bcm2708_vcio_device = {
  410.         .name = BCM_VCIO_DRIVER_NAME,
  411.         .id = -1,               /* only one VideoCore I/O area */
  412.         .resource = bcm2708_vcio_resources,
  413.         .num_resources = ARRAY_SIZE(bcm2708_vcio_resources),
  414.         .dev = {
  415.                 .dma_mask = &vcio_dmamask,
  416.                 .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON),
  417.                 },
  418. };
  419.  
  420. #ifdef CONFIG_BCM2708_GPIO
  421. #define BCM_GPIO_DRIVER_NAME "bcm2708_gpio"
  422.  
  423. static struct resource bcm2708_gpio_resources[] = {
  424.         [0] = {                 /* general purpose I/O */
  425.                .start = GPIO_BASE,
  426.                .end = GPIO_BASE + SZ_4K - 1,
  427.                .flags = IORESOURCE_MEM,
  428.                },
  429. };
  430.  
  431. static u64 gpio_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON);
  432.  
  433. static struct platform_device bcm2708_gpio_device = {
  434.         .name = BCM_GPIO_DRIVER_NAME,
  435.         .id = -1,               /* only one VideoCore I/O area */
  436.         .resource = bcm2708_gpio_resources,
  437.         .num_resources = ARRAY_SIZE(bcm2708_gpio_resources),
  438.         .dev = {
  439.                 .dma_mask = &gpio_dmamask,
  440.                 .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON),
  441.                 },
  442. };
  443. #endif
  444.  
  445. static struct resource bcm2708_systemtimer_resources[] = {
  446.         [0] = {                 /* system timer access */
  447.                .start = ST_BASE,
  448.                .end = ST_BASE + SZ_4K - 1,
  449.                .flags = IORESOURCE_MEM,
  450.                },
  451.         {
  452.          .start = IRQ_TIMER3,
  453.          .end = IRQ_TIMER3,
  454.          .flags = IORESOURCE_IRQ,
  455.          }
  456.  
  457. };
  458.  
  459. static u64 systemtimer_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON);
  460.  
  461. static struct platform_device bcm2708_systemtimer_device = {
  462.         .name = "bcm2708_systemtimer",
  463.         .id = -1,               /* only one VideoCore I/O area */
  464.         .resource = bcm2708_systemtimer_resources,
  465.         .num_resources = ARRAY_SIZE(bcm2708_systemtimer_resources),
  466.         .dev = {
  467.                 .dma_mask = &systemtimer_dmamask,
  468.                 .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON),
  469.                 },
  470. };
  471.  
  472. #ifdef CONFIG_MMC_SDHCI_BCM2708 /* Arasan emmc SD */
  473. static struct resource bcm2708_emmc_resources[] = {
  474.         [0] = {
  475.                .start = EMMC_BASE,
  476.                .end = EMMC_BASE + SZ_256 - 1,   /* we only need this area */
  477.                /* the memory map actually makes SZ_4K available  */
  478.                .flags = IORESOURCE_MEM,
  479.                },
  480.         [1] = {
  481.                .start = IRQ_ARASANSDIO,
  482.                .end = IRQ_ARASANSDIO,
  483.                .flags = IORESOURCE_IRQ,
  484.                },
  485. };
  486.  
  487. static u64 bcm2708_emmc_dmamask = 0xffffffffUL;
  488.  
  489. struct platform_device bcm2708_emmc_device = {
  490.         .name = "bcm2708_sdhci",
  491.         .id = 0,
  492.         .num_resources = ARRAY_SIZE(bcm2708_emmc_resources),
  493.         .resource = bcm2708_emmc_resources,
  494.         .dev = {
  495.                 .dma_mask = &bcm2708_emmc_dmamask,
  496.                 .coherent_dma_mask = 0xffffffffUL},
  497. };
  498. #endif /* CONFIG_MMC_SDHCI_BCM2708 */
  499.  
  500. static struct resource bcm2708_powerman_resources[] = {
  501.         [0] = {
  502.                .start = PM_BASE,
  503.                .end = PM_BASE + SZ_256 - 1,
  504.                .flags = IORESOURCE_MEM,
  505.                },
  506. };
  507.  
  508. static u64 powerman_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON);
  509.  
  510. struct platform_device bcm2708_powerman_device = {
  511.         .name = "bcm2708_powerman",
  512.         .id = 0,
  513.         .num_resources = ARRAY_SIZE(bcm2708_powerman_resources),
  514.         .resource = bcm2708_powerman_resources,
  515.         .dev = {
  516.                 .dma_mask = &powerman_dmamask,
  517.                 .coherent_dma_mask = 0xffffffffUL},
  518. };
  519.  
  520.  
  521. static struct platform_device bcm2708_alsa_devices[] = {
  522.         [0] = {
  523.                .name = "bcm2835_AUD0",
  524.                .id = 0,         /* first audio device */
  525.                .resource = 0,
  526.                .num_resources = 0,
  527.                },
  528.         [1] = {
  529.                .name = "bcm2835_AUD1",
  530.                .id = 1,         /* second audio device */
  531.                .resource = 0,
  532.                .num_resources = 0,
  533.                },
  534.         [2] = {
  535.                .name = "bcm2835_AUD2",
  536.                .id = 2,         /* third audio device */
  537.                .resource = 0,
  538.                .num_resources = 0,
  539.                },
  540.         [3] = {
  541.                .name = "bcm2835_AUD3",
  542.                .id = 3,         /* forth audio device */
  543.                .resource = 0,
  544.                .num_resources = 0,
  545.                },
  546.         [4] = {
  547.                .name = "bcm2835_AUD4",
  548.                .id = 4,         /* fifth audio device */
  549.                .resource = 0,
  550.                .num_resources = 0,
  551.                },
  552.         [5] = {
  553.                .name = "bcm2835_AUD5",
  554.                .id = 5,         /* sixth audio device */
  555.                .resource = 0,
  556.                .num_resources = 0,
  557.                },
  558.         [6] = {
  559.                .name = "bcm2835_AUD6",
  560.                .id = 6,         /* seventh audio device */
  561.                .resource = 0,
  562.                .num_resources = 0,
  563.                },
  564.         [7] = {
  565.                .name = "bcm2835_AUD7",
  566.                .id = 7,         /* eighth audio device */
  567.                .resource = 0,
  568.                .num_resources = 0,
  569.                },
  570. };
  571.  
  572. static struct resource bcm2708_spi_resources[] = {
  573.         {
  574.                 .start = SPI0_BASE,
  575.                 .end = SPI0_BASE + SZ_256 - 1,
  576.                 .flags = IORESOURCE_MEM,
  577.         }, {
  578.                 .start = IRQ_SPI,
  579.                 .end = IRQ_SPI,
  580.                 .flags = IORESOURCE_IRQ,
  581.         }
  582. };
  583.  
  584.  
  585. static struct platform_device bcm2708_spi_device = {
  586.         .name = "bcm2708_spi",
  587.         .id = 0,
  588.         .num_resources = ARRAY_SIZE(bcm2708_spi_resources),
  589.         .resource = bcm2708_spi_resources,
  590. };
  591.  
  592. static struct max310x_pdata max310x_pdata = {
  593.         .driver_flags   = MAX310X_EXT_CLK,
  594.         .uart_flags[0]  = MAX310X_ECHO_SUPRESS,
  595.         .frequency      = 3686400,
  596.         .gpio_base      = -1,
  597. };
  598.  
  599. static struct spi_board_info bcm2708_spi_devices[] = {
  600.         {
  601.                 .modalias       = "max310x",
  602.                 .irq            = gpio_to_irq(25),
  603.                 .bus_num        = 0,
  604.                 .max_speed_hz   = 26000000,
  605.                 .mode           = SPI_MODE_0,
  606.                 .chip_select    = 1,
  607.                 .platform_data  = &max310x_pdata,
  608.         }
  609. };
  610.  
  611.  
  612. static struct resource bcm2708_bsc0_resources[] = {
  613.         {
  614.                 .start = BSC0_BASE,
  615.                 .end = BSC0_BASE + SZ_256 - 1,
  616.                 .flags = IORESOURCE_MEM,
  617.         }, {
  618.                 .start = INTERRUPT_I2C,
  619.                 .end = INTERRUPT_I2C,
  620.                 .flags = IORESOURCE_IRQ,
  621.         }
  622. };
  623.  
  624. static struct platform_device bcm2708_bsc0_device = {
  625.         .name = "bcm2708_i2c",
  626.         .id = 0,
  627.         .num_resources = ARRAY_SIZE(bcm2708_bsc0_resources),
  628.         .resource = bcm2708_bsc0_resources,
  629. };
  630.  
  631.  
  632. static struct resource bcm2708_bsc1_resources[] = {
  633.         {
  634.                 .start = BSC1_BASE,
  635.                 .end = BSC1_BASE + SZ_256 - 1,
  636.                 .flags = IORESOURCE_MEM,
  637.         }, {
  638.                 .start = INTERRUPT_I2C,
  639.                 .end = INTERRUPT_I2C,
  640.                 .flags = IORESOURCE_IRQ,
  641.         }
  642. };
  643.  
  644. static struct platform_device bcm2708_bsc1_device = {
  645.         .name = "bcm2708_i2c",
  646.         .id = 1,
  647.         .num_resources = ARRAY_SIZE(bcm2708_bsc1_resources),
  648.         .resource = bcm2708_bsc1_resources,
  649. };
  650.  
  651. static struct platform_device bcm2835_hwmon_device = {
  652.         .name = "bcm2835_hwmon",
  653. };
  654.  
  655. static struct platform_device bcm2835_thermal_device = {
  656.         .name = "bcm2835_thermal",
  657. };
  658.  
  659. int __init bcm_register_device(struct platform_device *pdev)
  660. {
  661.         int ret;
  662.  
  663.         ret = platform_device_register(pdev);
  664.         if (ret)
  665.                 pr_debug("Unable to register platform device '%s': %d\n",
  666.                          pdev->name, ret);
  667.  
  668.         return ret;
  669. }
  670.  
  671. static void bcm2708_restart(char mode, const char *cmd)
  672. {
  673.         uint32_t pm_rstc, pm_wdog;
  674.         uint32_t timeout = 10;
  675.  
  676.         /* For quick reset notification add reboot=q to cmdline
  677.          */
  678.         if(mode == 'q')
  679.         {
  680.                 uint32_t pm_rsts = readl(__io_address(PM_RSTS));
  681.                 pm_rsts = PM_PASSWORD | pm_rsts | PM_RSTS_HADWRQ_SET;
  682.                 writel(pm_rsts, __io_address(PM_RSTS));
  683.         }
  684.  
  685.         /* Setup watchdog for reset */
  686.         pm_rstc = readl(__io_address(PM_RSTC));
  687.  
  688.         pm_wdog = PM_PASSWORD | (timeout & PM_WDOG_TIME_SET); // watchdog timer = timer clock / 16; need password (31:16) + value (11:0)
  689.         pm_rstc = PM_PASSWORD | (pm_rstc & PM_RSTC_WRCFG_CLR) | PM_RSTC_WRCFG_FULL_RESET;
  690.  
  691.         writel(pm_wdog, __io_address(PM_WDOG));
  692.         writel(pm_rstc, __io_address(PM_RSTC));
  693. }
  694.  
  695. /* We can't really power off, but if we do the normal reset scheme, and indicate to bootcode.bin not to reboot, then most of the chip will be powered off */
  696. static void bcm2708_power_off(void)
  697. {
  698.         /* we set the watchdog hard reset bit here to distinguish this reset from the normal (full) reset. bootcode.bin will not reboot after a hard reset */
  699.         uint32_t pm_rsts = readl(__io_address(PM_RSTS));
  700.         pm_rsts = PM_PASSWORD | (pm_rsts & PM_RSTC_WRCFG_CLR) | PM_RSTS_HADWRH_SET;
  701.         writel(pm_rsts, __io_address(PM_RSTS));
  702.         /* continue with normal reset mechanism */
  703.         bcm2708_restart(0, "");
  704. }
  705. static struct i2c_board_info __initdata pi_i2c_devs[] = {
  706.         {I2C_BOARD_INFO("ds1307", 0x68), },};
  707.  
  708. /* PPS-GPIO platform data */
  709. static struct pps_gpio_platform_data pps_gpio_info = {
  710.         .assert_falling_edge = false,
  711.         .capture_clear= false,
  712.         .gpio_pin=23,
  713.         .gpio_label="PPS",
  714. };
  715.  
  716. static struct platform_device pps_gpio_device = {
  717.         .name = "pps-gpio",
  718.         .id = -1,
  719.         .dev = {.platform_data = &pps_gpio_info},
  720. };
  721.  
  722. static int __init bcm2708_max310x_init(void)
  723. {
  724.         int ret;
  725.         ret = gpio_request(25, "MAX310x");
  726.         if (ret) {
  727.                 printk("MAX310x init: failed to request GPIO with error %d\n", ret);
  728.                 return -EINVAL;
  729.         }
  730.  
  731.         ret = gpio_direction_input(25);
  732.         if (ret) {
  733.                 printk("MAX310x init: failed to set pin direction\n");
  734.                 gpio_free(25);
  735.                 return -EINVAL;
  736.         }
  737.  
  738.         bcm2708_spi_devices[0].irq = gpio_to_irq(25);
  739.         return 0;
  740. }
  741.      
  742. void __init bcm2708_init(void)
  743. {
  744.         int i;
  745.         int ret;
  746. #if defined(CONFIG_BCM_VC_CMA)
  747.         vc_cma_early_init();
  748. #endif
  749.         printk("bcm2708.uart_clock = %d\n", uart_clock);
  750.         pm_power_off = bcm2708_power_off;
  751.  
  752.         if (uart_clock)
  753.                 lookups[0].clk->rate = uart_clock;
  754.  
  755.         for (i = 0; i < ARRAY_SIZE(lookups); i++)
  756.                 clkdev_add(&lookups[i]);
  757.  
  758.         bcm_register_device(&bcm2708_dmaman_device);
  759.         bcm_register_device(&bcm2708_vcio_device);
  760. #ifdef CONFIG_BCM2708_GPIO
  761.         bcm_register_device(&bcm2708_gpio_device);
  762. #endif
  763. #if defined(CONFIG_W1_MASTER_GPIO) || defined(CONFIG_W1_MASTER_GPIO_MODULE)
  764.         platform_device_register(&w1_device);
  765. #endif
  766.         bcm_register_device(&bcm2708_systemtimer_device);
  767. #ifdef CONFIG_MMC_BCM2708
  768.         bcm_register_device(&bcm2708_mci_device);
  769. #endif
  770.         bcm_register_device(&bcm2708_fb_device);
  771.         if (!fiq_fix_enable)
  772.         {
  773.                 bcm2708_usb_device.resource = bcm2708_usb_resources_no_fiq_fix;
  774.                 bcm2708_usb_device.num_resources = ARRAY_SIZE(bcm2708_usb_resources_no_fiq_fix);
  775.         }
  776.         bcm_register_device(&bcm2708_usb_device);
  777.         bcm_register_device(&bcm2708_uart1_device);
  778.         bcm_register_device(&bcm2708_powerman_device);
  779.  
  780. #ifdef CONFIG_MMC_SDHCI_BCM2708
  781.         bcm_register_device(&bcm2708_emmc_device);
  782. #endif
  783.         bcm2708_init_led();
  784.         for (i = 0; i < ARRAY_SIZE(bcm2708_alsa_devices); i++)
  785.                 bcm_register_device(&bcm2708_alsa_devices[i]);
  786.  
  787.         bcm_register_device(&bcm2708_spi_device);
  788.         bcm_register_device(&bcm2708_bsc0_device);
  789.         bcm_register_device(&bcm2708_bsc1_device);
  790.  
  791.         bcm_register_device(&bcm2835_hwmon_device);
  792.         bcm_register_device(&bcm2835_thermal_device);
  793.  
  794.         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
  795.                 struct amba_device *d = amba_devs[i];
  796.                 amba_device_register(d, &iomem_resource);
  797.         }
  798.         system_rev = boardrev;
  799.         system_serial_low = serial;
  800.  
  801.         bcm_register_device(&pps_gpio_device);
  802.        
  803.         ret = bcm2708_max310x_init();
  804.         if (ret)
  805.             printk("could not allocate a irq for max310x");*/
  806.         spi_register_board_info(bcm2708_spi_devices,
  807.                         ARRAY_SIZE(bcm2708_spi_devices));
  808.  
  809.         i2c_register_board_info(1, pi_i2c_devs,ARRAY_SIZE(pi_i2c_devs));
  810. }
  811.  
  812. static void timer_set_mode(enum clock_event_mode mode,
  813.                            struct clock_event_device *clk)
  814. {
  815.         switch (mode) {
  816.         case CLOCK_EVT_MODE_ONESHOT: /* Leave the timer disabled, .set_next_event will enable it */
  817.         case CLOCK_EVT_MODE_SHUTDOWN:
  818.                 break;
  819.         case CLOCK_EVT_MODE_PERIODIC:
  820.  
  821.         case CLOCK_EVT_MODE_UNUSED:
  822.         case CLOCK_EVT_MODE_RESUME:
  823.  
  824.         default:
  825.                 printk(KERN_ERR "timer_set_mode: unhandled mode:%d\n",
  826.                        (int)mode);
  827.                 break;
  828.         }
  829.  
  830. }
  831.  
  832. static int timer_set_next_event(unsigned long cycles,
  833.                                 struct clock_event_device *unused)
  834. {
  835.         unsigned long stc;
  836.  
  837.         stc = readl(__io_address(ST_BASE + 0x04));
  838.         writel(stc + cycles, __io_address(ST_BASE + 0x18));     /* stc3 */
  839.         return 0;
  840. }
  841.  
  842. static struct clock_event_device timer0_clockevent = {
  843.         .name = "timer0",
  844.         .shift = 32,
  845.         .features = CLOCK_EVT_FEAT_ONESHOT,
  846.         .set_mode = timer_set_mode,
  847.         .set_next_event = timer_set_next_event,
  848. };
  849.  
  850. /*
  851.  * IRQ handler for the timer
  852.  */
  853. static irqreturn_t bcm2708_timer_interrupt(int irq, void *dev_id)
  854. {
  855.         struct clock_event_device *evt = &timer0_clockevent;
  856.  
  857.         writel(1 << 3, __io_address(ST_BASE + 0x00));   /* stcs clear timer int */
  858.  
  859.         evt->event_handler(evt);
  860.  
  861.         return IRQ_HANDLED;
  862. }
  863.  
  864. static struct irqaction bcm2708_timer_irq = {
  865.         .name = "BCM2708 Timer Tick",
  866.         .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
  867.         .handler = bcm2708_timer_interrupt,
  868. };
  869.  
  870. /*
  871.  * Set up timer interrupt, and return the current time in seconds.
  872.  */
  873.  
  874. static struct delay_timer bcm2708_delay_timer = {
  875.         .read_current_timer = bcm2708_read_current_timer,
  876.         .freq = STC_FREQ_HZ,
  877. };
  878.  
  879. static void __init bcm2708_timer_init(void)
  880. {
  881.         /* init high res timer */
  882.         bcm2708_clocksource_init();
  883.  
  884.         /*
  885.          * Initialise to a known state (all timers off)
  886.          */
  887.         writel(0, __io_address(ARM_T_CONTROL));
  888.         /*
  889.          * Make irqs happen for the system timer
  890.          */
  891.         setup_irq(IRQ_TIMER3, &bcm2708_timer_irq);
  892.  
  893.         setup_sched_clock(bcm2708_read_sched_clock, 32, STC_FREQ_HZ);
  894.  
  895.         timer0_clockevent.mult =
  896.             div_sc(STC_FREQ_HZ, NSEC_PER_SEC, timer0_clockevent.shift);
  897.         timer0_clockevent.max_delta_ns =
  898.             clockevent_delta2ns(0xffffffff, &timer0_clockevent);
  899.         timer0_clockevent.min_delta_ns =
  900.             clockevent_delta2ns(0xf, &timer0_clockevent);
  901.  
  902.         timer0_clockevent.cpumask = cpumask_of(0);
  903.         clockevents_register_device(&timer0_clockevent);
  904.  
  905.         register_current_timer_delay(&bcm2708_delay_timer);
  906. }
  907.  
  908. struct sys_timer bcm2708_timer = {
  909.         .init = bcm2708_timer_init,
  910. };
  911.  
  912. #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
  913. #include <linux/leds.h>
  914.  
  915. static struct gpio_led bcm2708_leds[] = {
  916.         [0] = {
  917.                .gpio = 16,
  918.                .name = "led0",
  919.                .default_trigger = "mmc0",
  920.                .active_low = 1,
  921.                },
  922. };
  923.  
  924. static struct gpio_led_platform_data bcm2708_led_pdata = {
  925.         .num_leds = ARRAY_SIZE(bcm2708_leds),
  926.         .leds = bcm2708_leds,
  927. };
  928.  
  929. static struct platform_device bcm2708_led_device = {
  930.         .name = "leds-gpio",
  931.         .id = -1,
  932.         .dev = {
  933.                 .platform_data = &bcm2708_led_pdata,
  934.                 },
  935. };
  936.  
  937. static void __init bcm2708_init_led(void)
  938. {
  939.         platform_device_register(&bcm2708_led_device);
  940. }
  941. #else
  942. static inline void bcm2708_init_led(void)
  943. {
  944. }
  945. #endif
  946.  
  947. void __init bcm2708_init_early(void)
  948. {
  949.         /*
  950.          * Some devices allocate their coherent buffers from atomic
  951.          * context. Increase size of atomic coherent pool to make sure such
  952.          * the allocations won't fail.
  953.          */
  954.         init_dma_coherent_pool_size(SZ_4M);
  955. }
  956.  
  957. static void __init board_reserve(void)
  958. {
  959. #if defined(CONFIG_BCM_VC_CMA)
  960.         vc_cma_reserve();
  961. #endif
  962. }
  963.  
  964. MACHINE_START(BCM2708, "BCM2708")
  965.     /* Maintainer: Broadcom Europe Ltd. */
  966.         .map_io = bcm2708_map_io,
  967.         .init_irq = bcm2708_init_irq,
  968.         .timer =&bcm2708_timer,
  969.         .init_machine = bcm2708_init,
  970.         .init_early = bcm2708_init_early,
  971.         .reserve = board_reserve,
  972.         .restart        = bcm2708_restart,
  973. MACHINE_END
  974.  
  975. module_param(boardrev, uint, 0644);
  976. module_param(serial, uint, 0644);
  977. module_param(uart_clock, uint, 0644);
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