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- --decodificador
- library IEEE;
- use IEEE.std_logic_1164.all;
- use ieee.numeric_std.all;
- entity decodificador is
- port (
- escolha: in std_logic_vector(2 downto 0);
- modulo22, modulo19, modulo16, modulo13, modulo10, modulo7, modulo4, modulo1: out std_logic;
- );
- end decodificador;
- ----------------------------------------------------------
- -------------- Arquitetura --------------------------------
- architecture comportamental of decodificador is
- --------- Declaracao de sinais usados -------
- signal output : std_logic_vector(7 downto 0);
- ---------------------------------------------------
- ---------------------------------------------
- -------- Descricao do comportamento
- begin
- saidaoutput: with escolha select
- output <= "00000001" when "000",
- "00000010" when "001",
- "00000100" when "010",
- "00001000" when "011",
- "00010000" when "100",
- "00100000" when "101",
- "01000000" when "110",
- "10000000" when "111",
- "00000000" when others;
- --- Saidas para os modulos com alcapao
- modulo1 <= output(0);
- modulo4 <= output(1);
- modulo7 <= output(2);
- modulo10 <= output(3);
- modulo13 <= output(4);
- modulo16 <= output(5);
- modulo19 <= output(6);
- modulo22 <= output(7);
- end architecture;
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