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  1. diff -rupN a/drivers/net/ethernet/freescale/dpaa/Kconfig b/drivers/net/ethernet/freescale/dpaa/Kconfig
  2. --- a/drivers/net/ethernet/freescale/dpaa/Kconfig   2022-12-31 14:16:26.423268962 +0100
  3. +++ b/drivers/net/ethernet/freescale/dpaa/Kconfig   2022-12-31 14:14:10.478183005 +0100
  4. @@ -2,8 +2,8 @@
  5.  menuconfig FSL_DPAA_ETH
  6.     tristate "DPAA Ethernet"
  7.     depends on FSL_DPAA && FSL_FMAN
  8. -   select PHYLINK
  9. -   select PCS_LYNX
  10. +   select PHYLIB
  11. +   select FIXED_PHY
  12.     help
  13.       Data Path Acceleration Architecture Ethernet driver,
  14.       supporting the Freescale QorIQ chips.
  15. diff -rupN a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
  16. --- a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c    2022-12-31 14:16:26.423268962 +0100
  17. +++ b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c    2022-12-31 14:14:10.480182976 +0100
  18. @@ -264,19 +264,8 @@ static int dpaa_netdev_init(struct net_d
  19.     net_dev->needed_headroom = priv->tx_headroom;
  20.     net_dev->watchdog_timeo = msecs_to_jiffies(tx_timeout);
  21.  
  22. -   /* The rest of the config is filled in by the mac device already */
  23. -   mac_dev->phylink_config.dev = &net_dev->dev;
  24. -   mac_dev->phylink_config.type = PHYLINK_NETDEV;
  25. +   mac_dev->net_dev = net_dev;
  26.     mac_dev->update_speed = dpaa_eth_cgr_set_speed;
  27. -   mac_dev->phylink = phylink_create(&mac_dev->phylink_config,
  28. -                     dev_fwnode(mac_dev->dev),
  29. -                     mac_dev->phy_if,
  30. -                     mac_dev->phylink_ops);
  31. -   if (IS_ERR(mac_dev->phylink)) {
  32. -       err = PTR_ERR(mac_dev->phylink);
  33. -       dev_err_probe(dev, err, "Could not create phylink\n");
  34. -       return err;
  35. -   }
  36.  
  37.     /* start without the RUNNING flag, phylib controls it later */
  38.     netif_carrier_off(net_dev);
  39. @@ -284,7 +273,6 @@ static int dpaa_netdev_init(struct net_d
  40.     err = register_netdev(net_dev);
  41.     if (err < 0) {
  42.         dev_err(dev, "register_netdev() = %d\n", err);
  43. -       phylink_destroy(mac_dev->phylink);
  44.         return err;
  45.     }
  46.  
  47. @@ -306,7 +294,8 @@ static int dpaa_stop(struct net_device *
  48.      */
  49.     msleep(200);
  50.  
  51. -   phylink_stop(mac_dev->phylink);
  52. +   if (mac_dev->phy_dev)
  53. +       phy_stop(mac_dev->phy_dev);
  54.     mac_dev->disable(mac_dev->fman_mac);
  55.  
  56.     for (i = 0; i < ARRAY_SIZE(mac_dev->port); i++) {
  57. @@ -315,7 +304,8 @@ static int dpaa_stop(struct net_device *
  58.             err = error;
  59.     }
  60.  
  61. -   phylink_disconnect_phy(mac_dev->phylink);
  62. +   if (net_dev->phydev)
  63. +       phy_disconnect(net_dev->phydev);
  64.     net_dev->phydev = NULL;
  65.  
  66.     msleep(200);
  67. @@ -843,10 +833,10 @@ static int dpaa_eth_cgr_init(struct dpaa
  68.  
  69.     /* Set different thresholds based on the configured MAC speed.
  70.      * This may turn suboptimal if the MAC is reconfigured at another
  71. -    * speed, so MACs must call dpaa_eth_cgr_set_speed in their link_up
  72. +    * speed, so MACs must call dpaa_eth_cgr_set_speed in their adjust_link
  73.      * callback.
  74.      */
  75. -   if (priv->mac_dev->phylink_config.mac_capabilities & MAC_10000FD)
  76. +   if (priv->mac_dev->if_support & SUPPORTED_10000baseT_Full)
  77.         cs_th = DPAA_CS_THRESHOLD_10G;
  78.     else
  79.         cs_th = DPAA_CS_THRESHOLD_1G;
  80. @@ -875,7 +865,7 @@ out_error:
  81.  
  82.  static void dpaa_eth_cgr_set_speed(struct mac_device *mac_dev, int speed)
  83.  {
  84. -   struct net_device *net_dev = to_net_dev(mac_dev->phylink_config.dev);
  85. +   struct net_device *net_dev = mac_dev->net_dev;
  86.     struct dpaa_priv *priv = netdev_priv(net_dev);
  87.     struct qm_mcc_initcgr opts = { };
  88.     u32 cs_th;
  89. @@ -2914,6 +2904,58 @@ static void dpaa_eth_napi_disable(struct
  90.     }
  91.  }
  92.  
  93. +static void dpaa_adjust_link(struct net_device *net_dev)
  94. +{
  95. +   struct mac_device *mac_dev;
  96. +   struct dpaa_priv *priv;
  97. +
  98. +   priv = netdev_priv(net_dev);
  99. +   mac_dev = priv->mac_dev;
  100. +   mac_dev->adjust_link(mac_dev);
  101. +}
  102. +
  103. +/* The Aquantia PHYs are capable of performing rate adaptation */
  104. +#define PHY_VEND_AQUANTIA  0x03a1b400
  105. +#define PHY_VEND_AQUANTIA2 0x31c31c00
  106. +
  107. +static int dpaa_phy_init(struct net_device *net_dev)
  108. +{
  109. +   __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
  110. +   struct mac_device *mac_dev;
  111. +   struct phy_device *phy_dev;
  112. +   struct dpaa_priv *priv;
  113. +   u32 phy_vendor;
  114. +
  115. +   priv = netdev_priv(net_dev);
  116. +   mac_dev = priv->mac_dev;
  117. +
  118. +   phy_dev = of_phy_connect(net_dev, mac_dev->phy_node,
  119. +                &dpaa_adjust_link, 0,
  120. +                mac_dev->phy_if);
  121. +   if (!phy_dev) {
  122. +       netif_err(priv, ifup, net_dev, "init_phy() failed\n");
  123. +       return -ENODEV;
  124. +   }
  125. +
  126. +   phy_vendor = phy_dev->drv->phy_id & GENMASK(31, 10);
  127. +   /* Unless the PHY is capable of rate adaptation */
  128. +   if (mac_dev->phy_if != PHY_INTERFACE_MODE_XGMII ||
  129. +       (phy_vendor != PHY_VEND_AQUANTIA &&
  130. +        phy_vendor != PHY_VEND_AQUANTIA2)) {
  131. +       /* remove any features not supported by the controller */
  132. +       ethtool_convert_legacy_u32_to_link_mode(mask,
  133. +                           mac_dev->if_support);
  134. +       linkmode_and(phy_dev->supported, phy_dev->supported, mask);
  135. +   }
  136. +
  137. +   phy_support_asym_pause(phy_dev);
  138. +
  139. +   mac_dev->phy_dev = phy_dev;
  140. +   net_dev->phydev = phy_dev;
  141. +
  142. +   return 0;
  143. +}
  144. +
  145.  static int dpaa_open(struct net_device *net_dev)
  146.  {
  147.     struct mac_device *mac_dev;
  148. @@ -2924,8 +2966,7 @@ static int dpaa_open(struct net_device *
  149.     mac_dev = priv->mac_dev;
  150.     dpaa_eth_napi_enable(priv);
  151.  
  152. -   err = phylink_of_phy_connect(mac_dev->phylink,
  153. -                    mac_dev->dev->of_node, 0);
  154. +   err = dpaa_phy_init(net_dev);
  155.     if (err)
  156.         goto phy_init_failed;
  157.  
  158. @@ -2940,7 +2981,7 @@ static int dpaa_open(struct net_device *
  159.         netif_err(priv, ifup, net_dev, "mac_dev->enable() = %d\n", err);
  160.         goto mac_start_failed;
  161.     }
  162. -   phylink_start(mac_dev->phylink);
  163. +   phy_start(priv->mac_dev->phy_dev);
  164.  
  165.     netif_tx_start_all_queues(net_dev);
  166.  
  167. @@ -2949,7 +2990,6 @@ static int dpaa_open(struct net_device *
  168.  mac_start_failed:
  169.     for (i = 0; i < ARRAY_SIZE(mac_dev->port); i++)
  170.         fman_port_disable(mac_dev->port[i]);
  171. -   phylink_disconnect_phy(mac_dev->phylink);
  172.  
  173.  phy_init_failed:
  174.     dpaa_eth_napi_disable(priv);
  175. @@ -3105,12 +3145,10 @@ static int dpaa_ts_ioctl(struct net_devi
  176.  static int dpaa_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
  177.  {
  178.     int ret = -EINVAL;
  179. -   struct dpaa_priv *priv = netdev_priv(net_dev);
  180.  
  181.     if (cmd == SIOCGMIIREG) {
  182.         if (net_dev->phydev)
  183. -           return phylink_mii_ioctl(priv->mac_dev->phylink, rq,
  184. -                        cmd);
  185. +           return phy_mii_ioctl(net_dev->phydev, rq, cmd);
  186.     }
  187.  
  188.     if (cmd == SIOCSHWTSTAMP)
  189. @@ -3513,7 +3551,6 @@ static int dpaa_remove(struct platform_d
  190.  
  191.     dev_set_drvdata(dev, NULL);
  192.     unregister_netdev(net_dev);
  193. -   phylink_destroy(priv->mac_dev->phylink);
  194.  
  195.     err = dpaa_fq_free(dev, &priv->dpaa_fq_list);
  196.  
  197. diff -rupN a/drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c b/drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c
  198. --- a/drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c    2022-12-31 14:16:26.423268962 +0100
  199. +++ b/drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c    2022-12-31 14:14:10.480182976 +0100
  200. @@ -54,19 +54,27 @@ static char dpaa_stats_global[][ETH_GSTR
  201.  static int dpaa_get_link_ksettings(struct net_device *net_dev,
  202.                    struct ethtool_link_ksettings *cmd)
  203.  {
  204. -   struct dpaa_priv *priv = netdev_priv(net_dev);
  205. -   struct mac_device *mac_dev = priv->mac_dev;
  206. +   if (!net_dev->phydev)
  207. +       return 0;
  208.  
  209. -   return phylink_ethtool_ksettings_get(mac_dev->phylink, cmd);
  210. +   phy_ethtool_ksettings_get(net_dev->phydev, cmd);
  211. +
  212. +   return 0;
  213.  }
  214.  
  215.  static int dpaa_set_link_ksettings(struct net_device *net_dev,
  216.                    const struct ethtool_link_ksettings *cmd)
  217.  {
  218. -   struct dpaa_priv *priv = netdev_priv(net_dev);
  219. -   struct mac_device *mac_dev = priv->mac_dev;
  220. +   int err;
  221. +
  222. +   if (!net_dev->phydev)
  223. +       return -ENODEV;
  224.  
  225. -   return phylink_ethtool_ksettings_set(mac_dev->phylink, cmd);
  226. +   err = phy_ethtool_ksettings_set(net_dev->phydev, cmd);
  227. +   if (err < 0)
  228. +       netdev_err(net_dev, "phy_ethtool_ksettings_set() = %d\n", err);
  229. +
  230. +   return err;
  231.  }
  232.  
  233.  static void dpaa_get_drvinfo(struct net_device *net_dev,
  234. @@ -91,28 +99,80 @@ static void dpaa_set_msglevel(struct net
  235.  
  236.  static int dpaa_nway_reset(struct net_device *net_dev)
  237.  {
  238. -   struct dpaa_priv *priv = netdev_priv(net_dev);
  239. -   struct mac_device *mac_dev = priv->mac_dev;
  240. +   int err;
  241. +
  242. +   if (!net_dev->phydev)
  243. +       return -ENODEV;
  244.  
  245. -   return phylink_ethtool_nway_reset(mac_dev->phylink);
  246. +   err = 0;
  247. +   if (net_dev->phydev->autoneg) {
  248. +       err = phy_start_aneg(net_dev->phydev);
  249. +       if (err < 0)
  250. +           netdev_err(net_dev, "phy_start_aneg() = %d\n",
  251. +                  err);
  252. +   }
  253. +
  254. +   return err;
  255.  }
  256.  
  257.  static void dpaa_get_pauseparam(struct net_device *net_dev,
  258.                 struct ethtool_pauseparam *epause)
  259.  {
  260. -   struct dpaa_priv *priv = netdev_priv(net_dev);
  261. -   struct mac_device *mac_dev = priv->mac_dev;
  262. +   struct mac_device *mac_dev;
  263. +   struct dpaa_priv *priv;
  264. +
  265. +   priv = netdev_priv(net_dev);
  266. +   mac_dev = priv->mac_dev;
  267. +
  268. +   if (!net_dev->phydev)
  269. +       return;
  270.  
  271. -   phylink_ethtool_get_pauseparam(mac_dev->phylink, epause);
  272. +   epause->autoneg = mac_dev->autoneg_pause;
  273. +   epause->rx_pause = mac_dev->rx_pause_active;
  274. +   epause->tx_pause = mac_dev->tx_pause_active;
  275.  }
  276.  
  277.  static int dpaa_set_pauseparam(struct net_device *net_dev,
  278.                    struct ethtool_pauseparam *epause)
  279.  {
  280. -   struct dpaa_priv *priv = netdev_priv(net_dev);
  281. -   struct mac_device *mac_dev = priv->mac_dev;
  282. +   struct mac_device *mac_dev;
  283. +   struct phy_device *phydev;
  284. +   bool rx_pause, tx_pause;
  285. +   struct dpaa_priv *priv;
  286. +   int err;
  287. +
  288. +   priv = netdev_priv(net_dev);
  289. +   mac_dev = priv->mac_dev;
  290. +
  291. +   phydev = net_dev->phydev;
  292. +   if (!phydev) {
  293. +       netdev_err(net_dev, "phy device not initialized\n");
  294. +       return -ENODEV;
  295. +   }
  296. +
  297. +   if (!phy_validate_pause(phydev, epause))
  298. +       return -EINVAL;
  299. +
  300. +   /* The MAC should know how to handle PAUSE frame autonegotiation before
  301. +    * adjust_link is triggered by a forced renegotiation of sym/asym PAUSE
  302. +    * settings.
  303. +    */
  304. +   mac_dev->autoneg_pause = !!epause->autoneg;
  305. +   mac_dev->rx_pause_req = !!epause->rx_pause;
  306. +   mac_dev->tx_pause_req = !!epause->tx_pause;
  307. +
  308. +   /* Determine the sym/asym advertised PAUSE capabilities from the desired
  309. +    * rx/tx pause settings.
  310. +    */
  311. +
  312. +   phy_set_asym_pause(phydev, epause->rx_pause, epause->tx_pause);
  313. +
  314. +   fman_get_pause_cfg(mac_dev, &rx_pause, &tx_pause);
  315. +   err = fman_set_mac_active_pause(mac_dev, rx_pause, tx_pause);
  316. +   if (err < 0)
  317. +       netdev_err(net_dev, "set_mac_active_pause() = %d\n", err);
  318.  
  319. -   return phylink_ethtool_set_pauseparam(mac_dev->phylink, epause);
  320. +   return err;
  321.  }
  322.  
  323.  static int dpaa_get_sset_count(struct net_device *net_dev, int type)
  324. diff -rupN a/drivers/net/ethernet/freescale/fman/Kconfig b/drivers/net/ethernet/freescale/fman/Kconfig
  325. --- a/drivers/net/ethernet/freescale/fman/Kconfig   2022-12-31 14:16:26.427268905 +0100
  326. +++ b/drivers/net/ethernet/freescale/fman/Kconfig   2022-12-31 14:14:10.480182976 +0100
  327. @@ -3,6 +3,7 @@ config FSL_FMAN
  328.     tristate "FMan support"
  329.     depends on FSL_SOC || ARCH_LAYERSCAPE || COMPILE_TEST
  330.     select GENERIC_ALLOCATOR
  331. +   select PHYLIB
  332.     select PHYLINK
  333.     select PCS
  334.     select PCS_LYNX
  335. diff -rupN a/drivers/net/ethernet/freescale/fman/fman_dtsec.c b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
  336. --- a/drivers/net/ethernet/freescale/fman/fman_dtsec.c  2022-12-31 14:16:26.427268905 +0100
  337. +++ b/drivers/net/ethernet/freescale/fman/fman_dtsec.c  2022-12-31 14:14:10.481182963 +0100
  338. @@ -17,7 +17,6 @@
  339.  #include <linux/crc32.h>
  340.  #include <linux/of_mdio.h>
  341.  #include <linux/mii.h>
  342. -#include <linux/netdevice.h>
  343.  
  344.  /* TBI register addresses */
  345.  #define MII_TBICON     0x11
  346. @@ -30,6 +29,9 @@
  347.  #define TBICON_CLK_SELECT  0x0020  /* Clock select */
  348.  #define TBICON_MI_MODE     0x0010  /* GMII mode (TBI if not set) */
  349.  
  350. +#define TBIANA_SGMII       0x4001
  351. +#define TBIANA_1000X       0x01a0
  352. +
  353.  /* Interrupt Mask Register (IMASK) */
  354.  #define DTSEC_IMASK_BREN   0x80000000
  355.  #define DTSEC_IMASK_RXCEN  0x40000000
  356. @@ -90,10 +92,9 @@
  357.  
  358.  #define DTSEC_ECNTRL_GMIIM     0x00000040
  359.  #define DTSEC_ECNTRL_TBIM      0x00000020
  360. +#define DTSEC_ECNTRL_SGMIIM        0x00000002
  361.  #define DTSEC_ECNTRL_RPM       0x00000010
  362.  #define DTSEC_ECNTRL_R100M     0x00000008
  363. -#define DTSEC_ECNTRL_RMM       0x00000004
  364. -#define DTSEC_ECNTRL_SGMIIM        0x00000002
  365.  #define DTSEC_ECNTRL_QSGMIIM       0x00000001
  366.  
  367.  #define TCTRL_TTSE         0x00000040
  368. @@ -317,8 +318,7 @@ struct fman_mac {
  369.     void *fm;
  370.     struct fman_rev_info fm_rev_info;
  371.     bool basex_if;
  372. -   struct mdio_device *tbidev;
  373. -   struct phylink_pcs pcs;
  374. +   struct phy_device *tbiphy;
  375.  };
  376.  
  377.  static void set_dflts(struct dtsec_cfg *cfg)
  378. @@ -356,14 +356,56 @@ static int init(struct dtsec_regs __iome
  379.         phy_interface_t iface, u16 iface_speed, u64 addr,
  380.         u32 exception_mask, u8 tbi_addr)
  381.  {
  382. +   bool is_rgmii, is_sgmii, is_qsgmii;
  383.     enet_addr_t eth_addr;
  384. -   u32 tmp = 0;
  385. +   u32 tmp;
  386.     int i;
  387.  
  388.     /* Soft reset */
  389.     iowrite32be(MACCFG1_SOFT_RESET, &regs->maccfg1);
  390.     iowrite32be(0, &regs->maccfg1);
  391.  
  392. +   /* dtsec_id2 */
  393. +   tmp = ioread32be(&regs->tsec_id2);
  394. +
  395. +   /* check RGMII support */
  396. +   if (iface == PHY_INTERFACE_MODE_RGMII ||
  397. +       iface == PHY_INTERFACE_MODE_RGMII_ID ||
  398. +       iface == PHY_INTERFACE_MODE_RGMII_RXID ||
  399. +       iface == PHY_INTERFACE_MODE_RGMII_TXID ||
  400. +       iface == PHY_INTERFACE_MODE_RMII)
  401. +       if (tmp & DTSEC_ID2_INT_REDUCED_OFF)
  402. +           return -EINVAL;
  403. +
  404. +   if (iface == PHY_INTERFACE_MODE_SGMII ||
  405. +       iface == PHY_INTERFACE_MODE_MII)
  406. +       if (tmp & DTSEC_ID2_INT_REDUCED_OFF)
  407. +           return -EINVAL;
  408. +
  409. +   is_rgmii = iface == PHY_INTERFACE_MODE_RGMII ||
  410. +          iface == PHY_INTERFACE_MODE_RGMII_ID ||
  411. +          iface == PHY_INTERFACE_MODE_RGMII_RXID ||
  412. +          iface == PHY_INTERFACE_MODE_RGMII_TXID;
  413. +   is_sgmii = iface == PHY_INTERFACE_MODE_SGMII;
  414. +   is_qsgmii = iface == PHY_INTERFACE_MODE_QSGMII;
  415. +
  416. +   tmp = 0;
  417. +   if (is_rgmii || iface == PHY_INTERFACE_MODE_GMII)
  418. +       tmp |= DTSEC_ECNTRL_GMIIM;
  419. +   if (is_sgmii)
  420. +       tmp |= (DTSEC_ECNTRL_SGMIIM | DTSEC_ECNTRL_TBIM);
  421. +   if (is_qsgmii)
  422. +       tmp |= (DTSEC_ECNTRL_SGMIIM | DTSEC_ECNTRL_TBIM |
  423. +           DTSEC_ECNTRL_QSGMIIM);
  424. +   if (is_rgmii)
  425. +       tmp |= DTSEC_ECNTRL_RPM;
  426. +   if (iface_speed == SPEED_100)
  427. +       tmp |= DTSEC_ECNTRL_R100M;
  428. +
  429. +   iowrite32be(tmp, &regs->ecntrl);
  430. +
  431. +   tmp = 0;
  432. +
  433.     if (cfg->tx_pause_time)
  434.         tmp |= cfg->tx_pause_time;
  435.     if (cfg->tx_pause_time_extd)
  436. @@ -404,10 +446,17 @@ static int init(struct dtsec_regs __iome
  437.  
  438.     tmp = 0;
  439.  
  440. +   if (iface_speed < SPEED_1000)
  441. +       tmp |= MACCFG2_NIBBLE_MODE;
  442. +   else if (iface_speed == SPEED_1000)
  443. +       tmp |= MACCFG2_BYTE_MODE;
  444. +
  445.     tmp |= (cfg->preamble_len << MACCFG2_PREAMBLE_LENGTH_SHIFT) &
  446.         MACCFG2_PREAMBLE_LENGTH_MASK;
  447.     if (cfg->tx_pad_crc)
  448.         tmp |= MACCFG2_PAD_CRC_EN;
  449. +   /* Full Duplex */
  450. +   tmp |= MACCFG2_FULL_DUPLEX;
  451.     iowrite32be(tmp, &regs->maccfg2);
  452.  
  453.     tmp = (((cfg->non_back_to_back_ipg1 <<
  454. @@ -476,6 +525,10 @@ static void set_bucket(struct dtsec_regs
  455.  
  456.  static int check_init_parameters(struct fman_mac *dtsec)
  457.  {
  458. +   if (dtsec->max_speed >= SPEED_10000) {
  459. +       pr_err("1G MAC driver supports 1G or lower speeds\n");
  460. +       return -EINVAL;
  461. +   }
  462.     if ((dtsec->dtsec_drv_param)->rx_prepend >
  463.         MAX_PACKET_ALIGNMENT) {
  464.         pr_err("packetAlignmentPadding can't be > than %d\n",
  465. @@ -577,10 +630,22 @@ static int get_exception_flag(enum fman_
  466.     return bit_mask;
  467.  }
  468.  
  469. +static bool is_init_done(struct dtsec_cfg *dtsec_drv_params)
  470. +{
  471. +   /* Checks if dTSEC driver parameters were initialized */
  472. +   if (!dtsec_drv_params)
  473. +       return true;
  474. +
  475. +   return false;
  476. +}
  477. +
  478.  static u16 dtsec_get_max_frame_length(struct fman_mac *dtsec)
  479.  {
  480.     struct dtsec_regs __iomem *regs = dtsec->regs;
  481.  
  482. +   if (is_init_done(dtsec->dtsec_drv_param))
  483. +       return 0;
  484. +
  485.     return (u16)ioread32be(&regs->maxfrm);
  486.  }
  487.  
  488. @@ -617,7 +682,6 @@ static void dtsec_isr(void *handle)
  489.         dtsec->exception_cb(dtsec->dev_id, FM_MAC_EX_1G_COL_RET_LMT);
  490.     if (event & DTSEC_IMASK_XFUNEN) {
  491.         /* FM_TX_LOCKUP_ERRATA_DTSEC6 Errata workaround */
  492. -       /* FIXME: This races with the rest of the driver! */
  493.         if (dtsec->fm_rev_info.major == 2) {
  494.             u32 tpkt1, tmp_reg1, tpkt2, tmp_reg2, i;
  495.             /* a. Write 0x00E0_0C00 to DTSEC_ID
  496. @@ -750,43 +814,6 @@ static void free_init_resources(struct f
  497.     dtsec->unicast_addr_hash = NULL;
  498.  }
  499.  
  500. -static struct fman_mac *pcs_to_dtsec(struct phylink_pcs *pcs)
  501. -{
  502. -   return container_of(pcs, struct fman_mac, pcs);
  503. -}
  504. -
  505. -static void dtsec_pcs_get_state(struct phylink_pcs *pcs,
  506. -               struct phylink_link_state *state)
  507. -{
  508. -   struct fman_mac *dtsec = pcs_to_dtsec(pcs);
  509. -
  510. -   phylink_mii_c22_pcs_get_state(dtsec->tbidev, state);
  511. -}
  512. -
  513. -static int dtsec_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
  514. -               phy_interface_t interface,
  515. -               const unsigned long *advertising,
  516. -               bool permit_pause_to_mac)
  517. -{
  518. -   struct fman_mac *dtsec = pcs_to_dtsec(pcs);
  519. -
  520. -   return phylink_mii_c22_pcs_config(dtsec->tbidev, mode, interface,
  521. -                     advertising);
  522. -}
  523. -
  524. -static void dtsec_pcs_an_restart(struct phylink_pcs *pcs)
  525. -{
  526. -   struct fman_mac *dtsec = pcs_to_dtsec(pcs);
  527. -
  528. -   phylink_mii_c22_pcs_an_restart(dtsec->tbidev);
  529. -}
  530. -
  531. -static const struct phylink_pcs_ops dtsec_pcs_ops = {
  532. -   .pcs_get_state = dtsec_pcs_get_state,
  533. -   .pcs_config = dtsec_pcs_config,
  534. -   .pcs_an_restart = dtsec_pcs_an_restart,
  535. -};
  536. -
  537.  static void graceful_start(struct fman_mac *dtsec)
  538.  {
  539.     struct dtsec_regs __iomem *regs = dtsec->regs;
  540. @@ -827,11 +854,36 @@ static void graceful_stop(struct fman_ma
  541.  
  542.  static int dtsec_enable(struct fman_mac *dtsec)
  543.  {
  544. +   struct dtsec_regs __iomem *regs = dtsec->regs;
  545. +   u32 tmp;
  546. +
  547. +   if (!is_init_done(dtsec->dtsec_drv_param))
  548. +       return -EINVAL;
  549. +
  550. +   /* Enable */
  551. +   tmp = ioread32be(&regs->maccfg1);
  552. +   tmp |= MACCFG1_RX_EN | MACCFG1_TX_EN;
  553. +   iowrite32be(tmp, &regs->maccfg1);
  554. +
  555. +   /* Graceful start - clear the graceful Rx/Tx stop bit */
  556. +   graceful_start(dtsec);
  557. +
  558.     return 0;
  559.  }
  560.  
  561.  static void dtsec_disable(struct fman_mac *dtsec)
  562.  {
  563. +   struct dtsec_regs __iomem *regs = dtsec->regs;
  564. +   u32 tmp;
  565. +
  566. +   WARN_ON_ONCE(!is_init_done(dtsec->dtsec_drv_param));
  567. +
  568. +   /* Graceful stop - Assert the graceful Rx/Tx stop bit */
  569. +   graceful_stop(dtsec);
  570. +
  571. +   tmp = ioread32be(&regs->maccfg1);
  572. +   tmp &= ~(MACCFG1_RX_EN | MACCFG1_TX_EN);
  573. +   iowrite32be(tmp, &regs->maccfg1);
  574.  }
  575.  
  576.  static int dtsec_set_tx_pause_frames(struct fman_mac *dtsec,
  577. @@ -842,6 +894,11 @@ static int dtsec_set_tx_pause_frames(str
  578.     struct dtsec_regs __iomem *regs = dtsec->regs;
  579.     u32 ptv = 0;
  580.  
  581. +   if (!is_init_done(dtsec->dtsec_drv_param))
  582. +       return -EINVAL;
  583. +
  584. +   graceful_stop(dtsec);
  585. +
  586.     if (pause_time) {
  587.         /* FM_BAD_TX_TS_IN_B_2_B_ERRATA_DTSEC_A003 Errata workaround */
  588.         if (dtsec->fm_rev_info.major == 2 && pause_time <= 320) {
  589. @@ -862,6 +919,8 @@ static int dtsec_set_tx_pause_frames(str
  590.         iowrite32be(ioread32be(&regs->maccfg1) & ~MACCFG1_TX_FLOW,
  591.                 &regs->maccfg1);
  592.  
  593. +   graceful_start(dtsec);
  594. +
  595.     return 0;
  596.  }
  597.  
  598. @@ -870,6 +929,11 @@ static int dtsec_accept_rx_pause_frames(
  599.     struct dtsec_regs __iomem *regs = dtsec->regs;
  600.     u32 tmp;
  601.  
  602. +   if (!is_init_done(dtsec->dtsec_drv_param))
  603. +       return -EINVAL;
  604. +
  605. +   graceful_stop(dtsec);
  606. +
  607.     tmp = ioread32be(&regs->maccfg1);
  608.     if (en)
  609.         tmp |= MACCFG1_RX_FLOW;
  610. @@ -877,125 +941,17 @@ static int dtsec_accept_rx_pause_frames(
  611.         tmp &= ~MACCFG1_RX_FLOW;
  612.     iowrite32be(tmp, &regs->maccfg1);
  613.  
  614. -   return 0;
  615. -}
  616. -
  617. -static struct phylink_pcs *dtsec_select_pcs(struct phylink_config *config,
  618. -                       phy_interface_t iface)
  619. -{
  620. -   struct fman_mac *dtsec = fman_config_to_mac(config)->fman_mac;
  621. -
  622. -   switch (iface) {
  623. -   case PHY_INTERFACE_MODE_SGMII:
  624. -   case PHY_INTERFACE_MODE_1000BASEX:
  625. -   case PHY_INTERFACE_MODE_2500BASEX:
  626. -       return &dtsec->pcs;
  627. -   default:
  628. -       return NULL;
  629. -   }
  630. -}
  631. -
  632. -static void dtsec_mac_config(struct phylink_config *config, unsigned int mode,
  633. -                const struct phylink_link_state *state)
  634. -{
  635. -   struct mac_device *mac_dev = fman_config_to_mac(config);
  636. -   struct dtsec_regs __iomem *regs = mac_dev->fman_mac->regs;
  637. -   u32 tmp;
  638. -
  639. -   switch (state->interface) {
  640. -   case PHY_INTERFACE_MODE_RMII:
  641. -       tmp = DTSEC_ECNTRL_RMM;
  642. -       break;
  643. -   case PHY_INTERFACE_MODE_RGMII:
  644. -   case PHY_INTERFACE_MODE_RGMII_ID:
  645. -   case PHY_INTERFACE_MODE_RGMII_RXID:
  646. -   case PHY_INTERFACE_MODE_RGMII_TXID:
  647. -       tmp = DTSEC_ECNTRL_GMIIM | DTSEC_ECNTRL_RPM;
  648. -       break;
  649. -   case PHY_INTERFACE_MODE_SGMII:
  650. -   case PHY_INTERFACE_MODE_1000BASEX:
  651. -   case PHY_INTERFACE_MODE_2500BASEX:
  652. -       tmp = DTSEC_ECNTRL_TBIM | DTSEC_ECNTRL_SGMIIM;
  653. -       break;
  654. -   default:
  655. -       dev_warn(mac_dev->dev, "cannot configure dTSEC for %s\n",
  656. -            phy_modes(state->interface));
  657. -       return;
  658. -   }
  659. -
  660. -   iowrite32be(tmp, &regs->ecntrl);
  661. -}
  662. -
  663. -static void dtsec_link_up(struct phylink_config *config, struct phy_device *phy,
  664. -             unsigned int mode, phy_interface_t interface,
  665. -             int speed, int duplex, bool tx_pause, bool rx_pause)
  666. -{
  667. -   struct mac_device *mac_dev = fman_config_to_mac(config);
  668. -   struct fman_mac *dtsec = mac_dev->fman_mac;
  669. -   struct dtsec_regs __iomem *regs = dtsec->regs;
  670. -   u16 pause_time = tx_pause ? FSL_FM_PAUSE_TIME_ENABLE :
  671. -            FSL_FM_PAUSE_TIME_DISABLE;
  672. -   u32 tmp;
  673. -
  674. -   dtsec_set_tx_pause_frames(dtsec, 0, pause_time, 0);
  675. -   dtsec_accept_rx_pause_frames(dtsec, rx_pause);
  676. -
  677. -   tmp = ioread32be(&regs->ecntrl);
  678. -   if (speed == SPEED_100)
  679. -       tmp |= DTSEC_ECNTRL_R100M;
  680. -   else
  681. -       tmp &= ~DTSEC_ECNTRL_R100M;
  682. -   iowrite32be(tmp, &regs->ecntrl);
  683. -
  684. -   tmp = ioread32be(&regs->maccfg2);
  685. -   tmp &= ~(MACCFG2_NIBBLE_MODE | MACCFG2_BYTE_MODE | MACCFG2_FULL_DUPLEX);
  686. -   if (speed >= SPEED_1000)
  687. -       tmp |= MACCFG2_BYTE_MODE;
  688. -   else
  689. -       tmp |= MACCFG2_NIBBLE_MODE;
  690. -
  691. -   if (duplex == DUPLEX_FULL)
  692. -       tmp |= MACCFG2_FULL_DUPLEX;
  693. -
  694. -   iowrite32be(tmp, &regs->maccfg2);
  695. -
  696. -   mac_dev->update_speed(mac_dev, speed);
  697. -
  698. -   /* Enable */
  699. -   tmp = ioread32be(&regs->maccfg1);
  700. -   tmp |= MACCFG1_RX_EN | MACCFG1_TX_EN;
  701. -   iowrite32be(tmp, &regs->maccfg1);
  702. -
  703. -   /* Graceful start - clear the graceful Rx/Tx stop bit */
  704.     graceful_start(dtsec);
  705. -}
  706. -
  707. -static void dtsec_link_down(struct phylink_config *config, unsigned int mode,
  708. -               phy_interface_t interface)
  709. -{
  710. -   struct fman_mac *dtsec = fman_config_to_mac(config)->fman_mac;
  711. -   struct dtsec_regs __iomem *regs = dtsec->regs;
  712. -   u32 tmp;
  713. -
  714. -   /* Graceful stop - Assert the graceful Rx/Tx stop bit */
  715. -   graceful_stop(dtsec);
  716.  
  717. -   tmp = ioread32be(&regs->maccfg1);
  718. -   tmp &= ~(MACCFG1_RX_EN | MACCFG1_TX_EN);
  719. -   iowrite32be(tmp, &regs->maccfg1);
  720. +   return 0;
  721.  }
  722.  
  723. -static const struct phylink_mac_ops dtsec_mac_ops = {
  724. -   .validate = phylink_generic_validate,
  725. -   .mac_select_pcs = dtsec_select_pcs,
  726. -   .mac_config = dtsec_mac_config,
  727. -   .mac_link_up = dtsec_link_up,
  728. -   .mac_link_down = dtsec_link_down,
  729. -};
  730. -
  731.  static int dtsec_modify_mac_address(struct fman_mac *dtsec,
  732.                     const enet_addr_t *enet_addr)
  733.  {
  734. +   if (!is_init_done(dtsec->dtsec_drv_param))
  735. +       return -EINVAL;
  736. +
  737.     graceful_stop(dtsec);
  738.  
  739.     /* Initialize MAC Station Address registers (1 & 2)
  740. @@ -1019,6 +975,9 @@ static int dtsec_add_hash_mac_address(st
  741.     u32 crc = 0xFFFFFFFF;
  742.     bool mcast, ghtx;
  743.  
  744. +   if (!is_init_done(dtsec->dtsec_drv_param))
  745. +       return -EINVAL;
  746. +
  747.     addr = ENET_ADDR_TO_UINT64(*eth_addr);
  748.  
  749.     ghtx = (bool)((ioread32be(&regs->rctrl) & RCTRL_GHTX) ? true : false);
  750. @@ -1078,6 +1037,9 @@ static int dtsec_set_allmulti(struct fma
  751.     u32 tmp;
  752.     struct dtsec_regs __iomem *regs = dtsec->regs;
  753.  
  754. +   if (!is_init_done(dtsec->dtsec_drv_param))
  755. +       return -EINVAL;
  756. +
  757.     tmp = ioread32be(&regs->rctrl);
  758.     if (enable)
  759.         tmp |= RCTRL_MPROM;
  760. @@ -1094,6 +1056,9 @@ static int dtsec_set_tstamp(struct fman_
  761.     struct dtsec_regs __iomem *regs = dtsec->regs;
  762.     u32 rctrl, tctrl;
  763.  
  764. +   if (!is_init_done(dtsec->dtsec_drv_param))
  765. +       return -EINVAL;
  766. +
  767.     rctrl = ioread32be(&regs->rctrl);
  768.     tctrl = ioread32be(&regs->tctrl);
  769.  
  770. @@ -1122,6 +1087,9 @@ static int dtsec_del_hash_mac_address(st
  771.     u32 crc = 0xFFFFFFFF;
  772.     bool mcast, ghtx;
  773.  
  774. +   if (!is_init_done(dtsec->dtsec_drv_param))
  775. +       return -EINVAL;
  776. +
  777.     addr = ENET_ADDR_TO_UINT64(*eth_addr);
  778.  
  779.     ghtx = (bool)((ioread32be(&regs->rctrl) & RCTRL_GHTX) ? true : false);
  780. @@ -1185,6 +1153,9 @@ static int dtsec_set_promiscuous(struct
  781.     struct dtsec_regs __iomem *regs = dtsec->regs;
  782.     u32 tmp;
  783.  
  784. +   if (!is_init_done(dtsec->dtsec_drv_param))
  785. +       return -EINVAL;
  786. +
  787.     /* Set unicast promiscuous */
  788.     tmp = ioread32be(&regs->rctrl);
  789.     if (new_val)
  790. @@ -1206,12 +1177,90 @@ static int dtsec_set_promiscuous(struct
  791.     return 0;
  792.  }
  793.  
  794. +static int dtsec_adjust_link(struct fman_mac *dtsec, u16 speed)
  795. +{
  796. +   struct dtsec_regs __iomem *regs = dtsec->regs;
  797. +   u32 tmp;
  798. +
  799. +   if (!is_init_done(dtsec->dtsec_drv_param))
  800. +       return -EINVAL;
  801. +
  802. +   graceful_stop(dtsec);
  803. +
  804. +   tmp = ioread32be(&regs->maccfg2);
  805. +
  806. +   /* Full Duplex */
  807. +   tmp |= MACCFG2_FULL_DUPLEX;
  808. +
  809. +   tmp &= ~(MACCFG2_NIBBLE_MODE | MACCFG2_BYTE_MODE);
  810. +   if (speed < SPEED_1000)
  811. +       tmp |= MACCFG2_NIBBLE_MODE;
  812. +   else if (speed == SPEED_1000)
  813. +       tmp |= MACCFG2_BYTE_MODE;
  814. +   iowrite32be(tmp, &regs->maccfg2);
  815. +
  816. +   tmp = ioread32be(&regs->ecntrl);
  817. +   if (speed == SPEED_100)
  818. +       tmp |= DTSEC_ECNTRL_R100M;
  819. +   else
  820. +       tmp &= ~DTSEC_ECNTRL_R100M;
  821. +   iowrite32be(tmp, &regs->ecntrl);
  822. +
  823. +   graceful_start(dtsec);
  824. +
  825. +   return 0;
  826. +}
  827. +
  828. +static int dtsec_restart_autoneg(struct fman_mac *dtsec)
  829. +{
  830. +   u16 tmp_reg16;
  831. +
  832. +   if (!is_init_done(dtsec->dtsec_drv_param))
  833. +       return -EINVAL;
  834. +
  835. +   tmp_reg16 = phy_read(dtsec->tbiphy, MII_BMCR);
  836. +
  837. +   tmp_reg16 &= ~(BMCR_SPEED100 | BMCR_SPEED1000);
  838. +   tmp_reg16 |= (BMCR_ANENABLE | BMCR_ANRESTART |
  839. +             BMCR_FULLDPLX | BMCR_SPEED1000);
  840. +
  841. +   phy_write(dtsec->tbiphy, MII_BMCR, tmp_reg16);
  842. +
  843. +   return 0;
  844. +}
  845. +
  846. +static void adjust_link_dtsec(struct mac_device *mac_dev)
  847. +{
  848. +   struct phy_device *phy_dev = mac_dev->phy_dev;
  849. +   struct fman_mac *fman_mac;
  850. +   bool rx_pause, tx_pause;
  851. +   int err;
  852. +
  853. +   fman_mac = mac_dev->fman_mac;
  854. +   if (!phy_dev->link) {
  855. +       dtsec_restart_autoneg(fman_mac);
  856. +
  857. +       return;
  858. +   }
  859. +
  860. +   dtsec_adjust_link(fman_mac, phy_dev->speed);
  861. +   mac_dev->update_speed(mac_dev, phy_dev->speed);
  862. +   fman_get_pause_cfg(mac_dev, &rx_pause, &tx_pause);
  863. +   err = fman_set_mac_active_pause(mac_dev, rx_pause, tx_pause);
  864. +   if (err < 0)
  865. +       dev_err(mac_dev->dev, "fman_set_mac_active_pause() = %d\n",
  866. +           err);
  867. +}
  868. +
  869.  static int dtsec_set_exception(struct fman_mac *dtsec,
  870.                    enum fman_mac_exceptions exception, bool enable)
  871.  {
  872.     struct dtsec_regs __iomem *regs = dtsec->regs;
  873.     u32 bit_mask = 0;
  874.  
  875. +   if (!is_init_done(dtsec->dtsec_drv_param))
  876. +       return -EINVAL;
  877. +
  878.     if (exception != FM_MAC_EX_1G_1588_TS_RX_ERR) {
  879.         bit_mask = get_exception_flag(exception);
  880.         if (bit_mask) {
  881. @@ -1261,9 +1310,12 @@ static int dtsec_init(struct fman_mac *d
  882.  {
  883.     struct dtsec_regs __iomem *regs = dtsec->regs;
  884.     struct dtsec_cfg *dtsec_drv_param;
  885. -   u16 max_frm_ln, tbicon;
  886. +   u16 max_frm_ln;
  887.     int err;
  888.  
  889. +   if (is_init_done(dtsec->dtsec_drv_param))
  890. +       return -EINVAL;
  891. +
  892.     if (DEFAULT_RESET_ON_INIT &&
  893.         (fman_reset_mac(dtsec->fm, dtsec->mac_id) != 0)) {
  894.         pr_err("Can't reset MAC!\n");
  895. @@ -1278,19 +1330,38 @@ static int dtsec_init(struct fman_mac *d
  896.  
  897.     err = init(dtsec->regs, dtsec_drv_param, dtsec->phy_if,
  898.            dtsec->max_speed, dtsec->addr, dtsec->exceptions,
  899. -          dtsec->tbidev->addr);
  900. +          dtsec->tbiphy->mdio.addr);
  901.     if (err) {
  902.         free_init_resources(dtsec);
  903.         pr_err("DTSEC version doesn't support this i/f mode\n");
  904.         return err;
  905.     }
  906.  
  907. -   /* Configure the TBI PHY Control Register */
  908. -   tbicon = TBICON_CLK_SELECT | TBICON_SOFT_RESET;
  909. -   mdiodev_write(dtsec->tbidev, MII_TBICON, tbicon);
  910. +   if (dtsec->phy_if == PHY_INTERFACE_MODE_SGMII) {
  911. +       u16 tmp_reg16;
  912. +
  913. +       /* Configure the TBI PHY Control Register */
  914. +       tmp_reg16 = TBICON_CLK_SELECT | TBICON_SOFT_RESET;
  915. +       phy_write(dtsec->tbiphy, MII_TBICON, tmp_reg16);
  916. +
  917. +       tmp_reg16 = TBICON_CLK_SELECT;
  918. +       phy_write(dtsec->tbiphy, MII_TBICON, tmp_reg16);
  919. +
  920. +       tmp_reg16 = (BMCR_RESET | BMCR_ANENABLE |
  921. +                BMCR_FULLDPLX | BMCR_SPEED1000);
  922. +       phy_write(dtsec->tbiphy, MII_BMCR, tmp_reg16);
  923. +
  924. +       if (dtsec->basex_if)
  925. +           tmp_reg16 = TBIANA_1000X;
  926. +       else
  927. +           tmp_reg16 = TBIANA_SGMII;
  928. +       phy_write(dtsec->tbiphy, MII_ADVERTISE, tmp_reg16);
  929.  
  930. -   tbicon = TBICON_CLK_SELECT;
  931. -   mdiodev_write(dtsec->tbidev, MII_TBICON, tbicon);
  932. +       tmp_reg16 = (BMCR_ANENABLE | BMCR_ANRESTART |
  933. +                BMCR_FULLDPLX | BMCR_SPEED1000);
  934. +
  935. +       phy_write(dtsec->tbiphy, MII_BMCR, tmp_reg16);
  936. +   }
  937.  
  938.     /* Max Frame Length */
  939.     max_frm_ln = (u16)ioread32be(&regs->maxfrm);
  940. @@ -1335,8 +1406,6 @@ static int dtsec_free(struct fman_mac *d
  941.  
  942.     kfree(dtsec->dtsec_drv_param);
  943.     dtsec->dtsec_drv_param = NULL;
  944. -   if (!IS_ERR_OR_NULL(dtsec->tbidev))
  945. -       put_device(&dtsec->tbidev->dev);
  946.     kfree(dtsec);
  947.  
  948.     return 0;
  949. @@ -1365,6 +1434,7 @@ static struct fman_mac *dtsec_config(str
  950.  
  951.     dtsec->regs = mac_dev->vaddr;
  952.     dtsec->addr = ENET_ADDR_TO_UINT64(mac_dev->addr);
  953. +   dtsec->max_speed = params->max_speed;
  954.     dtsec->phy_if = mac_dev->phy_if;
  955.     dtsec->mac_id = params->mac_id;
  956.     dtsec->exceptions = (DTSEC_IMASK_BREN   |
  957. @@ -1387,6 +1457,7 @@ static struct fman_mac *dtsec_config(str
  958.     dtsec->en_tsu_err_exception = dtsec->dtsec_drv_param->ptp_exception_en;
  959.  
  960.     dtsec->fm = params->fm;
  961. +   dtsec->basex_if = params->basex_if;
  962.  
  963.     /* Save FMan revision */
  964.     fman_get_revision(dtsec->fm, &dtsec->fm_rev_info);
  965. @@ -1405,18 +1476,18 @@ int dtsec_initialization(struct mac_devi
  966.     int         err;
  967.     struct fman_mac     *dtsec;
  968.     struct device_node  *phy_node;
  969. -   unsigned long        capabilities;
  970. -   unsigned long       *supported;
  971.  
  972. -   mac_dev->phylink_ops        = &dtsec_mac_ops;
  973.     mac_dev->set_promisc        = dtsec_set_promiscuous;
  974.     mac_dev->change_addr        = dtsec_modify_mac_address;
  975.     mac_dev->add_hash_mac_addr  = dtsec_add_hash_mac_address;
  976.     mac_dev->remove_hash_mac_addr   = dtsec_del_hash_mac_address;
  977. +   mac_dev->set_tx_pause       = dtsec_set_tx_pause_frames;
  978. +   mac_dev->set_rx_pause       = dtsec_accept_rx_pause_frames;
  979.     mac_dev->set_exception      = dtsec_set_exception;
  980.     mac_dev->set_allmulti       = dtsec_set_allmulti;
  981.     mac_dev->set_tstamp     = dtsec_set_tstamp;
  982.     mac_dev->set_multi      = fman_set_multi;
  983. +   mac_dev->adjust_link            = adjust_link_dtsec;
  984.     mac_dev->enable         = dtsec_enable;
  985.     mac_dev->disable        = dtsec_disable;
  986.  
  987. @@ -1431,56 +1502,19 @@ int dtsec_initialization(struct mac_devi
  988.     dtsec->dtsec_drv_param->tx_pad_crc = true;
  989.  
  990.     phy_node = of_parse_phandle(mac_node, "tbi-handle", 0);
  991. -   if (!phy_node || of_device_is_available(phy_node)) {
  992. -       of_node_put(phy_node);
  993. +   if (!phy_node) {
  994. +       pr_err("TBI PHY node is not available\n");
  995.         err = -EINVAL;
  996. -       dev_err_probe(mac_dev->dev, err,
  997. -                 "TBI PCS node is not available\n");
  998.         goto _return_fm_mac_free;
  999.     }
  1000.  
  1001. -   dtsec->tbidev = of_mdio_find_device(phy_node);
  1002. -   of_node_put(phy_node);
  1003. -   if (!dtsec->tbidev) {
  1004. -       err = -EPROBE_DEFER;
  1005. -       dev_err_probe(mac_dev->dev, err,
  1006. -                 "could not find mdiodev for PCS\n");
  1007. +   dtsec->tbiphy = of_phy_find_device(phy_node);
  1008. +   if (!dtsec->tbiphy) {
  1009. +       pr_err("of_phy_find_device (TBI PHY) failed\n");
  1010. +       err = -EINVAL;
  1011.         goto _return_fm_mac_free;
  1012.     }
  1013. -   dtsec->pcs.ops = &dtsec_pcs_ops;
  1014. -   dtsec->pcs.poll = true;
  1015. -
  1016. -   supported = mac_dev->phylink_config.supported_interfaces;
  1017. -
  1018. -   /* FIXME: Can we use DTSEC_ID2_INT_FULL_OFF to determine if these are
  1019. -    * supported? If not, we can determine support via the phy if SerDes
  1020. -    * support is added.
  1021. -    */
  1022. -   if (mac_dev->phy_if == PHY_INTERFACE_MODE_SGMII ||
  1023. -       mac_dev->phy_if == PHY_INTERFACE_MODE_1000BASEX) {
  1024. -       __set_bit(PHY_INTERFACE_MODE_SGMII, supported);
  1025. -       __set_bit(PHY_INTERFACE_MODE_1000BASEX, supported);
  1026. -   } else if (mac_dev->phy_if == PHY_INTERFACE_MODE_2500BASEX) {
  1027. -       __set_bit(PHY_INTERFACE_MODE_2500BASEX, supported);
  1028. -   }
  1029. -
  1030. -   if (!(ioread32be(&dtsec->regs->tsec_id2) & DTSEC_ID2_INT_REDUCED_OFF)) {
  1031. -       phy_interface_set_rgmii(supported);
  1032. -
  1033. -       /* DTSEC_ID2_INT_REDUCED_OFF indicates that the dTSEC supports
  1034. -        * RMII and RGMII. However, the only SoCs which support RMII
  1035. -        * are the P1017 and P1023. Avoid advertising this mode on
  1036. -        * other SoCs. This is a bit of a moot point, since there's no
  1037. -        * in-tree support for ethernet on these platforms...
  1038. -        */
  1039. -       if (of_machine_is_compatible("fsl,P1023") ||
  1040. -           of_machine_is_compatible("fsl,P1023RDB"))
  1041. -           __set_bit(PHY_INTERFACE_MODE_RMII, supported);
  1042. -   }
  1043. -
  1044. -   capabilities = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
  1045. -   capabilities |= MAC_10 | MAC_100 | MAC_1000FD | MAC_2500FD;
  1046. -   mac_dev->phylink_config.mac_capabilities = capabilities;
  1047. +   put_device(&dtsec->tbiphy->mdio.dev);
  1048.  
  1049.     err = dtsec_init(dtsec);
  1050.     if (err < 0)
  1051. diff -rupN a/drivers/net/ethernet/freescale/fman/fman_mac.h b/drivers/net/ethernet/freescale/fman/fman_mac.h
  1052. --- a/drivers/net/ethernet/freescale/fman/fman_mac.h    2022-12-31 14:16:26.427268905 +0100
  1053. +++ b/drivers/net/ethernet/freescale/fman/fman_mac.h    2022-12-31 14:14:10.481182963 +0100
  1054. @@ -170,10 +170,20 @@ struct fman_mac_params {
  1055.      * 0 - FM_MAX_NUM_OF_10G_MACS
  1056.      */
  1057.     u8 mac_id;
  1058. +   /* Note that the speed should indicate the maximum rate that
  1059. +    * this MAC should support rather than the actual speed;
  1060. +    */
  1061. +   u16 max_speed;
  1062.     /* A handle to the FM object this port related to */
  1063.     void *fm;
  1064.     fman_mac_exception_cb *event_cb;    /* MDIO Events Callback Routine */
  1065.     fman_mac_exception_cb *exception_cb;/* Exception Callback Routine */
  1066. +   /* SGMII/QSGII interface with 1000BaseX auto-negotiation between MAC
  1067. +    * and phy or backplane; Note: 1000BaseX auto-negotiation relates only
  1068. +    * to interface between MAC and phy/backplane, SGMII phy can still
  1069. +    * synchronize with far-end phy at 10Mbps, 100Mbps or 1000Mbps
  1070. +   */
  1071. +   bool basex_if;
  1072.  };
  1073.  
  1074.  struct eth_hash_t {
  1075. diff -rupN a/drivers/net/ethernet/freescale/fman/fman_memac.c b/drivers/net/ethernet/freescale/fman/fman_memac.c
  1076. --- a/drivers/net/ethernet/freescale/fman/fman_memac.c  2022-12-31 14:16:26.427268905 +0100
  1077. +++ b/drivers/net/ethernet/freescale/fman/fman_memac.c  2022-12-31 14:14:10.481182963 +0100
  1078. @@ -278,6 +278,9 @@ struct fman_mac {
  1079.     struct memac_regs __iomem *regs;
  1080.     /* MAC address of device */
  1081.     u64 addr;
  1082. +   /* Ethernet physical interface */
  1083. +   phy_interface_t phy_if;
  1084. +   u16 max_speed;
  1085.     struct mac_device *dev_id; /* device cookie used by the exception cbs */
  1086.     fman_mac_exception_cb *exception_cb;
  1087.     fman_mac_exception_cb *event_cb;
  1088. @@ -290,12 +293,12 @@ struct fman_mac {
  1089.     struct memac_cfg *memac_drv_param;
  1090.     void *fm;
  1091.     struct fman_rev_info fm_rev_info;
  1092. +   bool basex_if;
  1093.     struct phy *serdes;
  1094.     struct phylink_pcs *sgmii_pcs;
  1095.     struct phylink_pcs *qsgmii_pcs;
  1096.     struct phylink_pcs *xfi_pcs;
  1097.     bool allmulti_enabled;
  1098. -   bool rgmii_no_half_duplex;
  1099.  };
  1100.  
  1101.  static void add_addr_in_paddr(struct memac_regs __iomem *regs, const u8 *adr,
  1102. @@ -353,6 +356,7 @@ static void set_exception(struct memac_r
  1103.  }
  1104.  
  1105.  static int init(struct memac_regs __iomem *regs, struct memac_cfg *cfg,
  1106. +       phy_interface_t phy_if, u16 speed, bool slow_10g_if,
  1107.         u32 exceptions)
  1108.  {
  1109.     u32 tmp;
  1110. @@ -380,6 +384,41 @@ static int init(struct memac_regs __iome
  1111.     iowrite32be((u32)cfg->pause_quanta, &regs->pause_quanta[0]);
  1112.     iowrite32be((u32)0, &regs->pause_thresh[0]);
  1113.  
  1114. +   /* IF_MODE */
  1115. +   tmp = 0;
  1116. +   switch (phy_if) {
  1117. +   case PHY_INTERFACE_MODE_XGMII:
  1118. +       tmp |= IF_MODE_10G;
  1119. +       break;
  1120. +   case PHY_INTERFACE_MODE_MII:
  1121. +       tmp |= IF_MODE_MII;
  1122. +       break;
  1123. +   default:
  1124. +       tmp |= IF_MODE_GMII;
  1125. +       if (phy_if == PHY_INTERFACE_MODE_RGMII ||
  1126. +           phy_if == PHY_INTERFACE_MODE_RGMII_ID ||
  1127. +           phy_if == PHY_INTERFACE_MODE_RGMII_RXID ||
  1128. +           phy_if == PHY_INTERFACE_MODE_RGMII_TXID)
  1129. +           tmp |= IF_MODE_RGMII | IF_MODE_RGMII_AUTO;
  1130. +   }
  1131. +   iowrite32be(tmp, &regs->if_mode);
  1132. +
  1133. +   /* TX_FIFO_SECTIONS */
  1134. +   tmp = 0;
  1135. +   if (phy_if == PHY_INTERFACE_MODE_XGMII) {
  1136. +       if (slow_10g_if) {
  1137. +           tmp |= (TX_FIFO_SECTIONS_TX_AVAIL_SLOW_10G |
  1138. +               TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_10G);
  1139. +       } else {
  1140. +           tmp |= (TX_FIFO_SECTIONS_TX_AVAIL_10G |
  1141. +               TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_10G);
  1142. +       }
  1143. +   } else {
  1144. +       tmp |= (TX_FIFO_SECTIONS_TX_AVAIL_1G |
  1145. +           TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_1G);
  1146. +   }
  1147. +   iowrite32be(tmp, &regs->tx_fifo_sections);
  1148. +
  1149.     /* clear all pending events and set-up interrupts */
  1150.     iowrite32be(0xffffffff, &regs->ievent);
  1151.     set_exception(regs, exceptions, true);
  1152. @@ -419,6 +458,24 @@ static u32 get_mac_addr_hash_code(u64 et
  1153.     return xor_val;
  1154.  }
  1155.  
  1156. +static void setup_sgmii_internal(struct fman_mac *memac,
  1157. +                struct phylink_pcs *pcs,
  1158. +                struct fixed_phy_status *fixed_link)
  1159. +{
  1160. +   __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
  1161. +   phy_interface_t iface = memac->basex_if ? PHY_INTERFACE_MODE_1000BASEX :
  1162. +               PHY_INTERFACE_MODE_SGMII;
  1163. +   unsigned int mode = fixed_link ? MLO_AN_FIXED : MLO_AN_INBAND;
  1164. +
  1165. +   linkmode_set_pause(advertising, true, true);
  1166. +   pcs->ops->pcs_config(pcs, mode, iface, advertising, true);
  1167. +   if (fixed_link)
  1168. +       pcs->ops->pcs_link_up(pcs, mode, iface, fixed_link->speed,
  1169. +                     fixed_link->duplex);
  1170. +   else
  1171. +       pcs->ops->pcs_an_restart(pcs);
  1172. +}
  1173. +
  1174.  static int check_init_parameters(struct fman_mac *memac)
  1175.  {
  1176.     if (!memac->exception_cb) {
  1177. @@ -524,31 +581,41 @@ static void free_init_resources(struct f
  1178.     memac->unicast_addr_hash = NULL;
  1179.  }
  1180.  
  1181. +static bool is_init_done(struct memac_cfg *memac_drv_params)
  1182. +{
  1183. +   /* Checks if mEMAC driver parameters were initialized */
  1184. +   if (!memac_drv_params)
  1185. +       return true;
  1186. +
  1187. +   return false;
  1188. +}
  1189. +
  1190.  static int memac_enable(struct fman_mac *memac)
  1191.  {
  1192. -   int ret;
  1193. +   struct memac_regs __iomem *regs = memac->regs;
  1194. +   u32 tmp;
  1195.  
  1196. -   ret = phy_init(memac->serdes);
  1197. -   if (ret) {
  1198. -       dev_err(memac->dev_id->dev,
  1199. -           "could not initialize serdes: %pe\n", ERR_PTR(ret));
  1200. -       return ret;
  1201. -   }
  1202. +   if (!is_init_done(memac->memac_drv_param))
  1203. +       return -EINVAL;
  1204.  
  1205. -   ret = phy_power_on(memac->serdes);
  1206. -   if (ret) {
  1207. -       dev_err(memac->dev_id->dev,
  1208. -           "could not power on serdes: %pe\n", ERR_PTR(ret));
  1209. -       phy_exit(memac->serdes);
  1210. -   }
  1211. +   tmp = ioread32be(&regs->command_config);
  1212. +   tmp |= CMD_CFG_RX_EN | CMD_CFG_TX_EN;
  1213. +   iowrite32be(tmp, &regs->command_config);
  1214.  
  1215. -   return ret;
  1216. +   return 0;
  1217.  }
  1218.  
  1219.  static void memac_disable(struct fman_mac *memac)
  1220. +
  1221.  {
  1222. -   phy_power_off(memac->serdes);
  1223. -   phy_exit(memac->serdes);
  1224. +   struct memac_regs __iomem *regs = memac->regs;
  1225. +   u32 tmp;
  1226. +
  1227. +   WARN_ON_ONCE(!is_init_done(memac->memac_drv_param));
  1228. +
  1229. +   tmp = ioread32be(&regs->command_config);
  1230. +   tmp &= ~(CMD_CFG_RX_EN | CMD_CFG_TX_EN);
  1231. +   iowrite32be(tmp, &regs->command_config);
  1232.  }
  1233.  
  1234.  static int memac_set_promiscuous(struct fman_mac *memac, bool new_val)
  1235. @@ -556,6 +623,9 @@ static int memac_set_promiscuous(struct
  1236.     struct memac_regs __iomem *regs = memac->regs;
  1237.     u32 tmp;
  1238.  
  1239. +   if (!is_init_done(memac->memac_drv_param))
  1240. +       return -EINVAL;
  1241. +
  1242.     tmp = ioread32be(&regs->command_config);
  1243.     if (new_val)
  1244.         tmp |= CMD_CFG_PROMIS_EN;
  1245. @@ -567,12 +637,73 @@ static int memac_set_promiscuous(struct
  1246.     return 0;
  1247.  }
  1248.  
  1249. +static int memac_adjust_link(struct fman_mac *memac, u16 speed)
  1250. +{
  1251. +   struct memac_regs __iomem *regs = memac->regs;
  1252. +   u32 tmp;
  1253. +
  1254. +   if (!is_init_done(memac->memac_drv_param))
  1255. +       return -EINVAL;
  1256. +
  1257. +   tmp = ioread32be(&regs->if_mode);
  1258. +
  1259. +   /* Set full duplex */
  1260. +   tmp &= ~IF_MODE_HD;
  1261. +
  1262. +   if (phy_interface_mode_is_rgmii(memac->phy_if)) {
  1263. +       /* Configure RGMII in manual mode */
  1264. +       tmp &= ~IF_MODE_RGMII_AUTO;
  1265. +       tmp &= ~IF_MODE_RGMII_SP_MASK;
  1266. +       /* Full duplex */
  1267. +       tmp |= IF_MODE_RGMII_FD;
  1268. +
  1269. +       switch (speed) {
  1270. +       case SPEED_1000:
  1271. +           tmp |= IF_MODE_RGMII_1000;
  1272. +           break;
  1273. +       case SPEED_100:
  1274. +           tmp |= IF_MODE_RGMII_100;
  1275. +           break;
  1276. +       case SPEED_10:
  1277. +           tmp |= IF_MODE_RGMII_10;
  1278. +           break;
  1279. +       default:
  1280. +           break;
  1281. +       }
  1282. +   }
  1283. +
  1284. +   iowrite32be(tmp, &regs->if_mode);
  1285. +
  1286. +   return 0;
  1287. +}
  1288. +
  1289. +static void adjust_link_memac(struct mac_device *mac_dev)
  1290. +{
  1291. +   struct phy_device *phy_dev = mac_dev->phy_dev;
  1292. +   struct fman_mac *fman_mac;
  1293. +   bool rx_pause, tx_pause;
  1294. +   int err;
  1295. +
  1296. +   fman_mac = mac_dev->fman_mac;
  1297. +   memac_adjust_link(fman_mac, phy_dev->speed);
  1298. +   mac_dev->update_speed(mac_dev, phy_dev->speed);
  1299. +
  1300. +   fman_get_pause_cfg(mac_dev, &rx_pause, &tx_pause);
  1301. +   err = fman_set_mac_active_pause(mac_dev, rx_pause, tx_pause);
  1302. +   if (err < 0)
  1303. +       dev_err(mac_dev->dev, "fman_set_mac_active_pause() = %d\n",
  1304. +           err);
  1305. +}
  1306. +
  1307.  static int memac_set_tx_pause_frames(struct fman_mac *memac, u8 priority,
  1308.                      u16 pause_time, u16 thresh_time)
  1309.  {
  1310.     struct memac_regs __iomem *regs = memac->regs;
  1311.     u32 tmp;
  1312.  
  1313. +   if (!is_init_done(memac->memac_drv_param))
  1314. +       return -EINVAL;
  1315. +
  1316.     tmp = ioread32be(&regs->tx_fifo_sections);
  1317.  
  1318.     GET_TX_EMPTY_DEFAULT_VALUE(tmp);
  1319. @@ -607,6 +738,9 @@ static int memac_accept_rx_pause_frames(
  1320.     struct memac_regs __iomem *regs = memac->regs;
  1321.     u32 tmp;
  1322.  
  1323. +   if (!is_init_done(memac->memac_drv_param))
  1324. +       return -EINVAL;
  1325. +
  1326.     tmp = ioread32be(&regs->command_config);
  1327.     if (en)
  1328.         tmp &= ~CMD_CFG_PAUSE_IGNORE;
  1329. @@ -618,175 +752,12 @@ static int memac_accept_rx_pause_frames(
  1330.     return 0;
  1331.  }
  1332.  
  1333. -static void memac_validate(struct phylink_config *config,
  1334. -              unsigned long *supported,
  1335. -              struct phylink_link_state *state)
  1336. -{
  1337. -   struct fman_mac *memac = fman_config_to_mac(config)->fman_mac;
  1338. -   unsigned long caps = config->mac_capabilities;
  1339. -
  1340. -   if (phy_interface_mode_is_rgmii(state->interface) &&
  1341. -       memac->rgmii_no_half_duplex)
  1342. -       caps &= ~(MAC_10HD | MAC_100HD);
  1343. -
  1344. -   phylink_validate_mask_caps(supported, state, caps);
  1345. -}
  1346. -
  1347. -/**
  1348. - * memac_if_mode() - Convert an interface mode into an IF_MODE config
  1349. - * @interface: A phy interface mode
  1350. - *
  1351. - * Return: A configuration word, suitable for programming into the lower bits
  1352. - *         of %IF_MODE.
  1353. - */
  1354. -static u32 memac_if_mode(phy_interface_t interface)
  1355. -{
  1356. -   switch (interface) {
  1357. -   case PHY_INTERFACE_MODE_MII:
  1358. -       return IF_MODE_MII;
  1359. -   case PHY_INTERFACE_MODE_RGMII:
  1360. -   case PHY_INTERFACE_MODE_RGMII_ID:
  1361. -   case PHY_INTERFACE_MODE_RGMII_RXID:
  1362. -   case PHY_INTERFACE_MODE_RGMII_TXID:
  1363. -       return IF_MODE_GMII | IF_MODE_RGMII;
  1364. -   case PHY_INTERFACE_MODE_SGMII:
  1365. -   case PHY_INTERFACE_MODE_1000BASEX:
  1366. -   case PHY_INTERFACE_MODE_QSGMII:
  1367. -       return IF_MODE_GMII;
  1368. -   case PHY_INTERFACE_MODE_10GBASER:
  1369. -       return IF_MODE_10G;
  1370. -   default:
  1371. -       WARN_ON_ONCE(1);
  1372. -       return 0;
  1373. -   }
  1374. -}
  1375. -
  1376. -static struct phylink_pcs *memac_select_pcs(struct phylink_config *config,
  1377. -                       phy_interface_t iface)
  1378. -{
  1379. -   struct fman_mac *memac = fman_config_to_mac(config)->fman_mac;
  1380. -
  1381. -   switch (iface) {
  1382. -   case PHY_INTERFACE_MODE_SGMII:
  1383. -   case PHY_INTERFACE_MODE_1000BASEX:
  1384. -       return memac->sgmii_pcs;
  1385. -   case PHY_INTERFACE_MODE_QSGMII:
  1386. -       return memac->qsgmii_pcs;
  1387. -   case PHY_INTERFACE_MODE_10GBASER:
  1388. -       return memac->xfi_pcs;
  1389. -   default:
  1390. -       return NULL;
  1391. -   }
  1392. -}
  1393. -
  1394. -static int memac_prepare(struct phylink_config *config, unsigned int mode,
  1395. -            phy_interface_t iface)
  1396. -{
  1397. -   struct fman_mac *memac = fman_config_to_mac(config)->fman_mac;
  1398. -
  1399. -   switch (iface) {
  1400. -   case PHY_INTERFACE_MODE_SGMII:
  1401. -   case PHY_INTERFACE_MODE_1000BASEX:
  1402. -   case PHY_INTERFACE_MODE_QSGMII:
  1403. -   case PHY_INTERFACE_MODE_10GBASER:
  1404. -       return phy_set_mode_ext(memac->serdes, PHY_MODE_ETHERNET,
  1405. -                   iface);
  1406. -   default:
  1407. -       return 0;
  1408. -   }
  1409. -}
  1410. -
  1411. -static void memac_mac_config(struct phylink_config *config, unsigned int mode,
  1412. -                const struct phylink_link_state *state)
  1413. -{
  1414. -   struct mac_device *mac_dev = fman_config_to_mac(config);
  1415. -   struct memac_regs __iomem *regs = mac_dev->fman_mac->regs;
  1416. -   u32 tmp = ioread32be(&regs->if_mode);
  1417. -
  1418. -   tmp &= ~(IF_MODE_MASK | IF_MODE_RGMII);
  1419. -   tmp |= memac_if_mode(state->interface);
  1420. -   if (phylink_autoneg_inband(mode))
  1421. -       tmp |= IF_MODE_RGMII_AUTO;
  1422. -   iowrite32be(tmp, &regs->if_mode);
  1423. -}
  1424. -
  1425. -static void memac_link_up(struct phylink_config *config, struct phy_device *phy,
  1426. -             unsigned int mode, phy_interface_t interface,
  1427. -             int speed, int duplex, bool tx_pause, bool rx_pause)
  1428. -{
  1429. -   struct mac_device *mac_dev = fman_config_to_mac(config);
  1430. -   struct fman_mac *memac = mac_dev->fman_mac;
  1431. -   struct memac_regs __iomem *regs = memac->regs;
  1432. -   u32 tmp = memac_if_mode(interface);
  1433. -   u16 pause_time = tx_pause ? FSL_FM_PAUSE_TIME_ENABLE :
  1434. -            FSL_FM_PAUSE_TIME_DISABLE;
  1435. -
  1436. -   memac_set_tx_pause_frames(memac, 0, pause_time, 0);
  1437. -   memac_accept_rx_pause_frames(memac, rx_pause);
  1438. -
  1439. -   if (duplex == DUPLEX_HALF)
  1440. -       tmp |= IF_MODE_HD;
  1441. -
  1442. -   switch (speed) {
  1443. -   case SPEED_1000:
  1444. -       tmp |= IF_MODE_RGMII_1000;
  1445. -       break;
  1446. -   case SPEED_100:
  1447. -       tmp |= IF_MODE_RGMII_100;
  1448. -       break;
  1449. -   case SPEED_10:
  1450. -       tmp |= IF_MODE_RGMII_10;
  1451. -       break;
  1452. -   }
  1453. -   iowrite32be(tmp, &regs->if_mode);
  1454. -
  1455. -   /* TODO: EEE? */
  1456. -
  1457. -   if (speed == SPEED_10000) {
  1458. -       if (memac->fm_rev_info.major == 6 &&
  1459. -           memac->fm_rev_info.minor == 4)
  1460. -           tmp = TX_FIFO_SECTIONS_TX_AVAIL_SLOW_10G;
  1461. -       else
  1462. -           tmp = TX_FIFO_SECTIONS_TX_AVAIL_10G;
  1463. -       tmp |= TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_10G;
  1464. -   } else {
  1465. -       tmp = TX_FIFO_SECTIONS_TX_AVAIL_1G |
  1466. -             TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_1G;
  1467. -   }
  1468. -   iowrite32be(tmp, &regs->tx_fifo_sections);
  1469. -
  1470. -   mac_dev->update_speed(mac_dev, speed);
  1471. -
  1472. -   tmp = ioread32be(&regs->command_config);
  1473. -   tmp |= CMD_CFG_RX_EN | CMD_CFG_TX_EN;
  1474. -   iowrite32be(tmp, &regs->command_config);
  1475. -}
  1476. -
  1477. -static void memac_link_down(struct phylink_config *config, unsigned int mode,
  1478. -               phy_interface_t interface)
  1479. -{
  1480. -   struct fman_mac *memac = fman_config_to_mac(config)->fman_mac;
  1481. -   struct memac_regs __iomem *regs = memac->regs;
  1482. -   u32 tmp;
  1483. -
  1484. -   /* TODO: graceful */
  1485. -   tmp = ioread32be(&regs->command_config);
  1486. -   tmp &= ~(CMD_CFG_RX_EN | CMD_CFG_TX_EN);
  1487. -   iowrite32be(tmp, &regs->command_config);
  1488. -}
  1489. -
  1490. -static const struct phylink_mac_ops memac_mac_ops = {
  1491. -   .validate = memac_validate,
  1492. -   .mac_select_pcs = memac_select_pcs,
  1493. -   .mac_prepare = memac_prepare,
  1494. -   .mac_config = memac_mac_config,
  1495. -   .mac_link_up = memac_link_up,
  1496. -   .mac_link_down = memac_link_down,
  1497. -};
  1498. -
  1499.  static int memac_modify_mac_address(struct fman_mac *memac,
  1500.                     const enet_addr_t *enet_addr)
  1501.  {
  1502. +   if (!is_init_done(memac->memac_drv_param))
  1503. +       return -EINVAL;
  1504. +
  1505.     add_addr_in_paddr(memac->regs, (const u8 *)(*enet_addr), 0);
  1506.  
  1507.     return 0;
  1508. @@ -800,6 +771,9 @@ static int memac_add_hash_mac_address(st
  1509.     u32 hash;
  1510.     u64 addr;
  1511.  
  1512. +   if (!is_init_done(memac->memac_drv_param))
  1513. +       return -EINVAL;
  1514. +
  1515.     addr = ENET_ADDR_TO_UINT64(*eth_addr);
  1516.  
  1517.     if (!(addr & GROUP_ADDRESS)) {
  1518. @@ -828,6 +802,9 @@ static int memac_set_allmulti(struct fma
  1519.     u32 entry;
  1520.     struct memac_regs __iomem *regs = memac->regs;
  1521.  
  1522. +   if (!is_init_done(memac->memac_drv_param))
  1523. +       return -EINVAL;
  1524. +
  1525.     if (enable) {
  1526.         for (entry = 0; entry < HASH_TABLE_SIZE; entry++)
  1527.             iowrite32be(entry | HASH_CTRL_MCAST_EN,
  1528. @@ -857,6 +834,9 @@ static int memac_del_hash_mac_address(st
  1529.     u32 hash;
  1530.     u64 addr;
  1531.  
  1532. +   if (!is_init_done(memac->memac_drv_param))
  1533. +       return -EINVAL;
  1534. +
  1535.     addr = ENET_ADDR_TO_UINT64(*eth_addr);
  1536.  
  1537.     hash = get_mac_addr_hash_code(addr) & HASH_CTRL_ADDR_MASK;
  1538. @@ -884,6 +864,9 @@ static int memac_set_exception(struct fm
  1539.  {
  1540.     u32 bit_mask = 0;
  1541.  
  1542. +   if (!is_init_done(memac->memac_drv_param))
  1543. +       return -EINVAL;
  1544. +
  1545.     bit_mask = get_exception_flag(exception);
  1546.     if (bit_mask) {
  1547.         if (enable)
  1548. @@ -903,15 +886,23 @@ static int memac_init(struct fman_mac *m
  1549.  {
  1550.     struct memac_cfg *memac_drv_param;
  1551.     enet_addr_t eth_addr;
  1552. +   bool slow_10g_if = false;
  1553. +   struct fixed_phy_status *fixed_link = NULL;
  1554.     int err;
  1555.     u32 reg32 = 0;
  1556.  
  1557. +   if (is_init_done(memac->memac_drv_param))
  1558. +       return -EINVAL;
  1559. +
  1560.     err = check_init_parameters(memac);
  1561.     if (err)
  1562.         return err;
  1563.  
  1564.     memac_drv_param = memac->memac_drv_param;
  1565.  
  1566. +   if (memac->fm_rev_info.major == 6 && memac->fm_rev_info.minor == 4)
  1567. +       slow_10g_if = true;
  1568. +
  1569.     /* First, reset the MAC if desired. */
  1570.     if (memac_drv_param->reset_on_init) {
  1571.         err = reset(memac->regs);
  1572. @@ -927,7 +918,10 @@ static int memac_init(struct fman_mac *m
  1573.         add_addr_in_paddr(memac->regs, (const u8 *)eth_addr, 0);
  1574.     }
  1575.  
  1576. -   init(memac->regs, memac->memac_drv_param, memac->exceptions);
  1577. +   fixed_link = memac_drv_param->fixed_link;
  1578. +
  1579. +   init(memac->regs, memac->memac_drv_param, memac->phy_if,
  1580. +        memac->max_speed, slow_10g_if, memac->exceptions);
  1581.  
  1582.     /* FM_RX_FIFO_CORRUPT_ERRATA_10GMAC_A006320 errata workaround
  1583.      * Exists only in FMan 6.0 and 6.3.
  1584. @@ -943,6 +937,11 @@ static int memac_init(struct fman_mac *m
  1585.         iowrite32be(reg32, &memac->regs->command_config);
  1586.     }
  1587.  
  1588. +   if (memac->phy_if == PHY_INTERFACE_MODE_SGMII)
  1589. +       setup_sgmii_internal(memac, memac->sgmii_pcs, fixed_link);
  1590. +   else if (memac->phy_if == PHY_INTERFACE_MODE_QSGMII)
  1591. +       setup_sgmii_internal(memac, memac->qsgmii_pcs, fixed_link);
  1592. +
  1593.     /* Max Frame Length */
  1594.     err = fman_set_mac_max_frame(memac->fm, memac->mac_id,
  1595.                      memac_drv_param->max_frame_length);
  1596. @@ -971,6 +970,9 @@ static int memac_init(struct fman_mac *m
  1597.     fman_register_intr(memac->fm, FMAN_MOD_MAC, memac->mac_id,
  1598.                FMAN_INTR_TYPE_NORMAL, memac_exception, memac);
  1599.  
  1600. +   kfree(memac_drv_param);
  1601. +   memac->memac_drv_param = NULL;
  1602. +
  1603.     return 0;
  1604.  }
  1605.  
  1606. @@ -993,6 +995,7 @@ static int memac_free(struct fman_mac *m
  1607.     pcs_put(memac->sgmii_pcs);
  1608.     pcs_put(memac->qsgmii_pcs);
  1609.     pcs_put(memac->xfi_pcs);
  1610. +
  1611.     kfree(memac->memac_drv_param);
  1612.     kfree(memac);
  1613.  
  1614. @@ -1025,6 +1028,8 @@ static struct fman_mac *memac_config(str
  1615.     memac->addr = ENET_ADDR_TO_UINT64(mac_dev->addr);
  1616.  
  1617.     memac->regs = mac_dev->vaddr;
  1618. +   memac->max_speed = params->max_speed;
  1619. +   memac->phy_if = mac_dev->phy_if;
  1620.     memac->mac_id = params->mac_id;
  1621.     memac->exceptions = (MEMAC_IMASK_TSECC_ER | MEMAC_IMASK_TECC_ER |
  1622.                  MEMAC_IMASK_RECC_ER | MEMAC_IMASK_MGI);
  1623. @@ -1032,6 +1037,7 @@ static struct fman_mac *memac_config(str
  1624.     memac->event_cb = params->event_cb;
  1625.     memac->dev_id = mac_dev;
  1626.     memac->fm = params->fm;
  1627. +   memac->basex_if = params->basex_if;
  1628.  
  1629.     /* Save FMan revision */
  1630.     fman_get_revision(memac->fm, &memac->fm_rev_info);
  1631. @@ -1058,44 +1064,37 @@ static struct phylink_pcs *memac_pcs_cre
  1632.     return pcs;
  1633.  }
  1634.  
  1635. -static bool memac_supports(struct mac_device *mac_dev, phy_interface_t iface)
  1636. -{
  1637. -   /* If there's no serdes device, assume that it's been configured for
  1638. -    * whatever the default interface mode is.
  1639. -    */
  1640. -   if (!mac_dev->fman_mac->serdes)
  1641. -       return mac_dev->phy_if == iface;
  1642. -   /* Otherwise, ask the serdes */
  1643. -   return !phy_validate(mac_dev->fman_mac->serdes, PHY_MODE_ETHERNET,
  1644. -                iface, NULL);
  1645. -}
  1646. -
  1647.  int memac_initialization(struct mac_device *mac_dev,
  1648.              struct device_node *mac_node,
  1649.              struct fman_mac_params *params)
  1650.  {
  1651.     int          err;
  1652. -   struct device_node      *fixed;
  1653.     struct phylink_pcs  *pcs;
  1654. +   struct fixed_phy_status *fixed_link;
  1655.     struct fman_mac     *memac;
  1656. -   unsigned long        capabilities;
  1657. -   unsigned long       *supported;
  1658.  
  1659. -   mac_dev->phylink_ops        = &memac_mac_ops;
  1660.     mac_dev->set_promisc        = memac_set_promiscuous;
  1661.     mac_dev->change_addr        = memac_modify_mac_address;
  1662.     mac_dev->add_hash_mac_addr  = memac_add_hash_mac_address;
  1663.     mac_dev->remove_hash_mac_addr   = memac_del_hash_mac_address;
  1664. +   mac_dev->set_tx_pause       = memac_set_tx_pause_frames;
  1665. +   mac_dev->set_rx_pause       = memac_accept_rx_pause_frames;
  1666.     mac_dev->set_exception      = memac_set_exception;
  1667.     mac_dev->set_allmulti       = memac_set_allmulti;
  1668.     mac_dev->set_tstamp     = memac_set_tstamp;
  1669.     mac_dev->set_multi      = fman_set_multi;
  1670. +   mac_dev->adjust_link            = adjust_link_memac;
  1671.     mac_dev->enable         = memac_enable;
  1672.     mac_dev->disable        = memac_disable;
  1673.  
  1674. +   if (params->max_speed == SPEED_10000)
  1675. +       mac_dev->phy_if = PHY_INTERFACE_MODE_XGMII;
  1676. +
  1677.     mac_dev->fman_mac = memac_config(mac_dev, params);
  1678. -   if (!mac_dev->fman_mac)
  1679. -       return -EINVAL;
  1680. +   if (!mac_dev->fman_mac) {
  1681. +       err = -EINVAL;
  1682. +       goto _return;
  1683. +   }
  1684.  
  1685.     memac = mac_dev->fman_mac;
  1686.     memac->memac_drv_param->max_frame_length = fman_get_max_frm();
  1687. @@ -1137,9 +1136,9 @@ int memac_initialization(struct mac_devi
  1688.     else
  1689.         pcs = memac_pcs_create(mac_node, err);
  1690.  
  1691. -   if (IS_ERR(pcs)) {
  1692. -       err = PTR_ERR(pcs);
  1693. -       dev_err_probe(mac_dev->dev, err, "missing pcs\n");
  1694. +   if (!pcs) {
  1695. +       dev_err(mac_dev->dev, "missing pcs\n");
  1696. +       err = -ENOENT;
  1697.         goto _return_fm_mac_free;
  1698.     }
  1699.  
  1700. @@ -1160,100 +1159,84 @@ int memac_initialization(struct mac_devi
  1701.     } else if (IS_ERR(memac->serdes)) {
  1702.         dev_err_probe(mac_dev->dev, err, "could not get serdes\n");
  1703.         goto _return_fm_mac_free;
  1704. -   }
  1705. +   } else {
  1706. +       err = phy_init(memac->serdes);
  1707. +       if (err) {
  1708. +           dev_err_probe(mac_dev->dev, err,
  1709. +                     "could not initialize serdes\n");
  1710. +           goto _return_fm_mac_free;
  1711. +       }
  1712.  
  1713. -   /* The internal connection to the serdes is XGMII, but this isn't
  1714. -    * really correct for the phy mode (which is the external connection).
  1715. -    * However, this is how all older device trees say that they want
  1716. -    * 10GBASE-R (aka XFI), so just convert it for them.
  1717. -    */
  1718. -   if (mac_dev->phy_if == PHY_INTERFACE_MODE_XGMII)
  1719. -       mac_dev->phy_if = PHY_INTERFACE_MODE_10GBASER;
  1720. +       err = phy_power_on(memac->serdes);
  1721. +       if (err) {
  1722. +           dev_err_probe(mac_dev->dev, err,
  1723. +                     "could not power on serdes\n");
  1724. +           goto _return_phy_exit;
  1725. +       }
  1726.  
  1727. -   /* TODO: The following interface modes are supported by (some) hardware
  1728. -    * but not by this driver:
  1729. -    * - 1000BASE-KX
  1730. -    * - 10GBASE-KR
  1731. -    * - XAUI/HiGig
  1732. -    */
  1733. -   supported = mac_dev->phylink_config.supported_interfaces;
  1734. +       if (memac->phy_if == PHY_INTERFACE_MODE_SGMII ||
  1735. +           memac->phy_if == PHY_INTERFACE_MODE_1000BASEX ||
  1736. +           memac->phy_if == PHY_INTERFACE_MODE_2500BASEX ||
  1737. +           memac->phy_if == PHY_INTERFACE_MODE_QSGMII ||
  1738. +           memac->phy_if == PHY_INTERFACE_MODE_XGMII) {
  1739. +           err = phy_set_mode_ext(memac->serdes, PHY_MODE_ETHERNET,
  1740. +                          memac->phy_if);
  1741. +           if (err) {
  1742. +               dev_err_probe(mac_dev->dev, err,
  1743. +                         "could not set serdes mode to %s\n",
  1744. +                         phy_modes(memac->phy_if));
  1745. +               goto _return_phy_power_off;
  1746. +           }
  1747. +       }
  1748. +   }
  1749.  
  1750. -   /* Note that half duplex is only supported on 10/100M interfaces. */
  1751. +   if (!mac_dev->phy_node && of_phy_is_fixed_link(mac_node)) {
  1752. +       struct phy_device *phy;
  1753.  
  1754. -   if (memac->sgmii_pcs &&
  1755. -       (memac_supports(mac_dev, PHY_INTERFACE_MODE_SGMII) ||
  1756. -        memac_supports(mac_dev, PHY_INTERFACE_MODE_1000BASEX))) {
  1757. -       __set_bit(PHY_INTERFACE_MODE_SGMII, supported);
  1758. -       __set_bit(PHY_INTERFACE_MODE_1000BASEX, supported);
  1759. -   }
  1760. -
  1761. -   if (memac->sgmii_pcs &&
  1762. -       memac_supports(mac_dev, PHY_INTERFACE_MODE_2500BASEX))
  1763. -       __set_bit(PHY_INTERFACE_MODE_2500BASEX, supported);
  1764. -
  1765. -   if (memac->qsgmii_pcs &&
  1766. -       memac_supports(mac_dev, PHY_INTERFACE_MODE_QSGMII))
  1767. -       __set_bit(PHY_INTERFACE_MODE_QSGMII, supported);
  1768. -   else if (mac_dev->phy_if == PHY_INTERFACE_MODE_QSGMII)
  1769. -       dev_warn(mac_dev->dev, "no QSGMII pcs specified\n");
  1770. -
  1771. -   if (memac->xfi_pcs &&
  1772. -       memac_supports(mac_dev, PHY_INTERFACE_MODE_10GBASER)) {
  1773. -       __set_bit(PHY_INTERFACE_MODE_10GBASER, supported);
  1774. -   } else {
  1775. -       /* From what I can tell, no 10g macs support RGMII. */
  1776. -       phy_interface_set_rgmii(supported);
  1777. -       __set_bit(PHY_INTERFACE_MODE_MII, supported);
  1778. -   }
  1779. +       err = of_phy_register_fixed_link(mac_node);
  1780. +       if (err)
  1781. +           goto _return_phy_power_off;
  1782. +
  1783. +       fixed_link = kzalloc(sizeof(*fixed_link), GFP_KERNEL);
  1784. +       if (!fixed_link) {
  1785. +           err = -ENOMEM;
  1786. +           goto _return_phy_power_off;
  1787. +       }
  1788.  
  1789. -   capabilities = MAC_SYM_PAUSE | MAC_ASYM_PAUSE | MAC_10 | MAC_100;
  1790. -   capabilities |= MAC_1000FD | MAC_2500FD | MAC_10000FD;
  1791. +       mac_dev->phy_node = of_node_get(mac_node);
  1792. +       phy = of_phy_find_device(mac_dev->phy_node);
  1793. +       if (!phy) {
  1794. +           err = -EINVAL;
  1795. +           of_node_put(mac_dev->phy_node);
  1796. +           goto _return_fixed_link_free;
  1797. +       }
  1798.  
  1799. -   /* These SoCs don't support half duplex at all; there's no different
  1800. -    * FMan version or compatible, so we just have to check the machine
  1801. -    * compatible instead
  1802. -    */
  1803. -   if (of_machine_is_compatible("fsl,ls1043a") ||
  1804. -       of_machine_is_compatible("fsl,ls1046a") ||
  1805. -       of_machine_is_compatible("fsl,B4QDS"))
  1806. -       capabilities &= ~(MAC_10HD | MAC_100HD);
  1807. -
  1808. -   mac_dev->phylink_config.mac_capabilities = capabilities;
  1809. -
  1810. -   /* The T2080 and T4240 don't support half duplex RGMII. There is no
  1811. -    * other way to identify these SoCs, so just use the machine
  1812. -    * compatible.
  1813. -    */
  1814. -   if (of_machine_is_compatible("fsl,T2080QDS") ||
  1815. -       of_machine_is_compatible("fsl,T2080RDB") ||
  1816. -       of_machine_is_compatible("fsl,T2081QDS") ||
  1817. -       of_machine_is_compatible("fsl,T4240QDS") ||
  1818. -       of_machine_is_compatible("fsl,T4240RDB"))
  1819. -       memac->rgmii_no_half_duplex = true;
  1820. -
  1821. -   /* Most boards should use MLO_AN_INBAND, but existing boards don't have
  1822. -    * a managed property. Default to MLO_AN_INBAND if nothing else is
  1823. -    * specified. We need to be careful and not enable this if we have a
  1824. -    * fixed link or if we are using MII or RGMII, since those
  1825. -    * configurations modes don't use in-band autonegotiation.
  1826. -    */
  1827. -   fixed = of_get_child_by_name(mac_node, "fixed-link");
  1828. -   if (!fixed && !of_property_read_bool(mac_node, "fixed-link") &&
  1829. -       !of_property_read_bool(mac_node, "managed") &&
  1830. -       mac_dev->phy_if != PHY_INTERFACE_MODE_MII &&
  1831. -       !phy_interface_mode_is_rgmii(mac_dev->phy_if))
  1832. -       mac_dev->phylink_config.ovr_an_inband = true;
  1833. -   of_node_put(fixed);
  1834. +       fixed_link->link = phy->link;
  1835. +       fixed_link->speed = phy->speed;
  1836. +       fixed_link->duplex = phy->duplex;
  1837. +       fixed_link->pause = phy->pause;
  1838. +       fixed_link->asym_pause = phy->asym_pause;
  1839. +
  1840. +       put_device(&phy->mdio.dev);
  1841. +       memac->memac_drv_param->fixed_link = fixed_link;
  1842. +   }
  1843.  
  1844.     err = memac_init(mac_dev->fman_mac);
  1845.     if (err < 0)
  1846. -       goto _return_fm_mac_free;
  1847. +       goto _return_fixed_link_free;
  1848.  
  1849.     dev_info(mac_dev->dev, "FMan MEMAC\n");
  1850.  
  1851. -   return 0;
  1852. +   goto _return;
  1853.  
  1854. +_return_phy_power_off:
  1855. +   phy_power_off(memac->serdes);
  1856. +_return_phy_exit:
  1857. +   phy_exit(memac->serdes);
  1858. +_return_fixed_link_free:
  1859. +   kfree(fixed_link);
  1860.  _return_fm_mac_free:
  1861.     memac_free(mac_dev->fman_mac);
  1862. +_return:
  1863.     return err;
  1864.  }
  1865. diff -rupN a/drivers/net/ethernet/freescale/fman/fman_tgec.c b/drivers/net/ethernet/freescale/fman/fman_tgec.c
  1866. --- a/drivers/net/ethernet/freescale/fman/fman_tgec.c   2022-12-31 14:16:26.427268905 +0100
  1867. +++ b/drivers/net/ethernet/freescale/fman/fman_tgec.c   2022-12-31 14:14:10.481182963 +0100
  1868. @@ -13,7 +13,6 @@
  1869.  #include <linux/bitrev.h>
  1870.  #include <linux/io.h>
  1871.  #include <linux/crc32.h>
  1872. -#include <linux/netdevice.h>
  1873.  
  1874.  /* Transmit Inter-Packet Gap Length Register (TX_IPG_LENGTH) */
  1875.  #define TGEC_TX_IPG_LENGTH_MASK    0x000003ff
  1876. @@ -244,6 +243,10 @@ static int init(struct tgec_regs __iomem
  1877.  
  1878.  static int check_init_parameters(struct fman_mac *tgec)
  1879.  {
  1880. +   if (tgec->max_speed < SPEED_10000) {
  1881. +       pr_err("10G MAC driver only support 10G speed\n");
  1882. +       return -EINVAL;
  1883. +   }
  1884.     if (!tgec->exception_cb) {
  1885.         pr_err("uninitialized exception_cb\n");
  1886.         return -EINVAL;
  1887. @@ -381,13 +384,40 @@ static void free_init_resources(struct f
  1888.     tgec->unicast_addr_hash = NULL;
  1889.  }
  1890.  
  1891. +static bool is_init_done(struct tgec_cfg *cfg)
  1892. +{
  1893. +   /* Checks if tGEC driver parameters were initialized */
  1894. +   if (!cfg)
  1895. +       return true;
  1896. +
  1897. +   return false;
  1898. +}
  1899. +
  1900.  static int tgec_enable(struct fman_mac *tgec)
  1901.  {
  1902. +   struct tgec_regs __iomem *regs = tgec->regs;
  1903. +   u32 tmp;
  1904. +
  1905. +   if (!is_init_done(tgec->cfg))
  1906. +       return -EINVAL;
  1907. +
  1908. +   tmp = ioread32be(&regs->command_config);
  1909. +   tmp |= CMD_CFG_RX_EN | CMD_CFG_TX_EN;
  1910. +   iowrite32be(tmp, &regs->command_config);
  1911. +
  1912.     return 0;
  1913.  }
  1914.  
  1915.  static void tgec_disable(struct fman_mac *tgec)
  1916.  {
  1917. +   struct tgec_regs __iomem *regs = tgec->regs;
  1918. +   u32 tmp;
  1919. +
  1920. +   WARN_ON_ONCE(!is_init_done(tgec->cfg));
  1921. +
  1922. +   tmp = ioread32be(&regs->command_config);
  1923. +   tmp &= ~(CMD_CFG_RX_EN | CMD_CFG_TX_EN);
  1924. +   iowrite32be(tmp, &regs->command_config);
  1925.  }
  1926.  
  1927.  static int tgec_set_promiscuous(struct fman_mac *tgec, bool new_val)
  1928. @@ -395,6 +425,9 @@ static int tgec_set_promiscuous(struct f
  1929.     struct tgec_regs __iomem *regs = tgec->regs;
  1930.     u32 tmp;
  1931.  
  1932. +   if (!is_init_done(tgec->cfg))
  1933. +       return -EINVAL;
  1934. +
  1935.     tmp = ioread32be(&regs->command_config);
  1936.     if (new_val)
  1937.         tmp |= CMD_CFG_PROMIS_EN;
  1938. @@ -411,6 +444,9 @@ static int tgec_set_tx_pause_frames(stru
  1939.  {
  1940.     struct tgec_regs __iomem *regs = tgec->regs;
  1941.  
  1942. +   if (!is_init_done(tgec->cfg))
  1943. +       return -EINVAL;
  1944. +
  1945.     iowrite32be((u32)pause_time, &regs->pause_quant);
  1946.  
  1947.     return 0;
  1948. @@ -421,6 +457,9 @@ static int tgec_accept_rx_pause_frames(s
  1949.     struct tgec_regs __iomem *regs = tgec->regs;
  1950.     u32 tmp;
  1951.  
  1952. +   if (!is_init_done(tgec->cfg))
  1953. +       return -EINVAL;
  1954. +
  1955.     tmp = ioread32be(&regs->command_config);
  1956.     if (!en)
  1957.         tmp |= CMD_CFG_PAUSE_IGNORE;
  1958. @@ -431,53 +470,12 @@ static int tgec_accept_rx_pause_frames(s
  1959.     return 0;
  1960.  }
  1961.  
  1962. -static void tgec_mac_config(struct phylink_config *config, unsigned int mode,
  1963. -               const struct phylink_link_state *state)
  1964. -{
  1965. -}
  1966. -
  1967. -static void tgec_link_up(struct phylink_config *config, struct phy_device *phy,
  1968. -            unsigned int mode, phy_interface_t interface,
  1969. -            int speed, int duplex, bool tx_pause, bool rx_pause)
  1970. -{
  1971. -   struct mac_device *mac_dev = fman_config_to_mac(config);
  1972. -   struct fman_mac *tgec = mac_dev->fman_mac;
  1973. -   struct tgec_regs __iomem *regs = tgec->regs;
  1974. -   u16 pause_time = tx_pause ? FSL_FM_PAUSE_TIME_ENABLE :
  1975. -            FSL_FM_PAUSE_TIME_DISABLE;
  1976. -   u32 tmp;
  1977. -
  1978. -   tgec_set_tx_pause_frames(tgec, 0, pause_time, 0);
  1979. -   tgec_accept_rx_pause_frames(tgec, rx_pause);
  1980. -   mac_dev->update_speed(mac_dev, speed);
  1981. -
  1982. -   tmp = ioread32be(&regs->command_config);
  1983. -   tmp |= CMD_CFG_RX_EN | CMD_CFG_TX_EN;
  1984. -   iowrite32be(tmp, &regs->command_config);
  1985. -}
  1986. -
  1987. -static void tgec_link_down(struct phylink_config *config, unsigned int mode,
  1988. -              phy_interface_t interface)
  1989. -{
  1990. -   struct fman_mac *tgec = fman_config_to_mac(config)->fman_mac;
  1991. -   struct tgec_regs __iomem *regs = tgec->regs;
  1992. -   u32 tmp;
  1993. -
  1994. -   tmp = ioread32be(&regs->command_config);
  1995. -   tmp &= ~(CMD_CFG_RX_EN | CMD_CFG_TX_EN);
  1996. -   iowrite32be(tmp, &regs->command_config);
  1997. -}
  1998. -
  1999. -static const struct phylink_mac_ops tgec_mac_ops = {
  2000. -   .validate = phylink_generic_validate,
  2001. -   .mac_config = tgec_mac_config,
  2002. -   .mac_link_up = tgec_link_up,
  2003. -   .mac_link_down = tgec_link_down,
  2004. -};
  2005. -
  2006.  static int tgec_modify_mac_address(struct fman_mac *tgec,
  2007.                    const enet_addr_t *p_enet_addr)
  2008.  {
  2009. +   if (!is_init_done(tgec->cfg))
  2010. +       return -EINVAL;
  2011. +
  2012.     tgec->addr = ENET_ADDR_TO_UINT64(*p_enet_addr);
  2013.     set_mac_address(tgec->regs, (const u8 *)(*p_enet_addr));
  2014.  
  2015. @@ -492,6 +490,9 @@ static int tgec_add_hash_mac_address(str
  2016.     u32 crc = 0xFFFFFFFF, hash;
  2017.     u64 addr;
  2018.  
  2019. +   if (!is_init_done(tgec->cfg))
  2020. +       return -EINVAL;
  2021. +
  2022.     addr = ENET_ADDR_TO_UINT64(*eth_addr);
  2023.  
  2024.     if (!(addr & GROUP_ADDRESS)) {
  2025. @@ -524,6 +525,9 @@ static int tgec_set_allmulti(struct fman
  2026.     u32 entry;
  2027.     struct tgec_regs __iomem *regs = tgec->regs;
  2028.  
  2029. +   if (!is_init_done(tgec->cfg))
  2030. +       return -EINVAL;
  2031. +
  2032.     if (enable) {
  2033.         for (entry = 0; entry < TGEC_HASH_TABLE_SIZE; entry++)
  2034.             iowrite32be(entry | TGEC_HASH_MCAST_EN,
  2035. @@ -544,6 +548,9 @@ static int tgec_set_tstamp(struct fman_m
  2036.     struct tgec_regs __iomem *regs = tgec->regs;
  2037.     u32 tmp;
  2038.  
  2039. +   if (!is_init_done(tgec->cfg))
  2040. +       return -EINVAL;
  2041. +
  2042.     tmp = ioread32be(&regs->command_config);
  2043.  
  2044.     if (enable)
  2045. @@ -565,6 +572,9 @@ static int tgec_del_hash_mac_address(str
  2046.     u32 crc = 0xFFFFFFFF, hash;
  2047.     u64 addr;
  2048.  
  2049. +   if (!is_init_done(tgec->cfg))
  2050. +       return -EINVAL;
  2051. +
  2052.     addr = ((*(u64 *)eth_addr) >> 16);
  2053.  
  2054.     /* CRC calculation */
  2055. @@ -591,12 +601,22 @@ static int tgec_del_hash_mac_address(str
  2056.     return 0;
  2057.  }
  2058.  
  2059. +static void tgec_adjust_link(struct mac_device *mac_dev)
  2060. +{
  2061. +   struct phy_device *phy_dev = mac_dev->phy_dev;
  2062. +
  2063. +   mac_dev->update_speed(mac_dev, phy_dev->speed);
  2064. +}
  2065. +
  2066.  static int tgec_set_exception(struct fman_mac *tgec,
  2067.                   enum fman_mac_exceptions exception, bool enable)
  2068.  {
  2069.     struct tgec_regs __iomem *regs = tgec->regs;
  2070.     u32 bit_mask = 0;
  2071.  
  2072. +   if (!is_init_done(tgec->cfg))
  2073. +       return -EINVAL;
  2074. +
  2075.     bit_mask = get_exception_flag(exception);
  2076.     if (bit_mask) {
  2077.         if (enable)
  2078. @@ -621,6 +641,9 @@ static int tgec_init(struct fman_mac *tg
  2079.     enet_addr_t eth_addr;
  2080.     int err;
  2081.  
  2082. +   if (is_init_done(tgec->cfg))
  2083. +       return -EINVAL;
  2084. +
  2085.     if (DEFAULT_RESET_ON_INIT &&
  2086.         (fman_reset_mac(tgec->fm, tgec->mac_id) != 0)) {
  2087.         pr_err("Can't reset MAC!\n");
  2088. @@ -730,6 +753,7 @@ static struct fman_mac *tgec_config(stru
  2089.  
  2090.     tgec->regs = mac_dev->vaddr;
  2091.     tgec->addr = ENET_ADDR_TO_UINT64(mac_dev->addr);
  2092. +   tgec->max_speed = params->max_speed;
  2093.     tgec->mac_id = params->mac_id;
  2094.     tgec->exceptions = (TGEC_IMASK_MDIO_SCAN_EVENT  |
  2095.                 TGEC_IMASK_REM_FAULT    |
  2096. @@ -764,15 +788,17 @@ int tgec_initialization(struct mac_devic
  2097.     int err;
  2098.     struct fman_mac     *tgec;
  2099.  
  2100. -   mac_dev->phylink_ops        = &tgec_mac_ops;
  2101.     mac_dev->set_promisc        = tgec_set_promiscuous;
  2102.     mac_dev->change_addr        = tgec_modify_mac_address;
  2103.     mac_dev->add_hash_mac_addr  = tgec_add_hash_mac_address;
  2104.     mac_dev->remove_hash_mac_addr   = tgec_del_hash_mac_address;
  2105. +   mac_dev->set_tx_pause       = tgec_set_tx_pause_frames;
  2106. +   mac_dev->set_rx_pause       = tgec_accept_rx_pause_frames;
  2107.     mac_dev->set_exception      = tgec_set_exception;
  2108.     mac_dev->set_allmulti       = tgec_set_allmulti;
  2109.     mac_dev->set_tstamp     = tgec_set_tstamp;
  2110.     mac_dev->set_multi      = fman_set_multi;
  2111. +   mac_dev->adjust_link            = tgec_adjust_link;
  2112.     mac_dev->enable         = tgec_enable;
  2113.     mac_dev->disable        = tgec_disable;
  2114.  
  2115. @@ -782,19 +808,6 @@ int tgec_initialization(struct mac_devic
  2116.         goto _return;
  2117.     }
  2118.  
  2119. -   /* The internal connection to the serdes is XGMII, but this isn't
  2120. -    * really correct for the phy mode (which is the external connection).
  2121. -    * However, this is how all older device trees say that they want
  2122. -    * XAUI, so just convert it for them.
  2123. -    */
  2124. -   if (mac_dev->phy_if == PHY_INTERFACE_MODE_XGMII)
  2125. -       mac_dev->phy_if = PHY_INTERFACE_MODE_XAUI;
  2126. -
  2127. -   __set_bit(PHY_INTERFACE_MODE_XAUI,
  2128. -         mac_dev->phylink_config.supported_interfaces);
  2129. -   mac_dev->phylink_config.mac_capabilities =
  2130. -       MAC_SYM_PAUSE | MAC_ASYM_PAUSE | MAC_10000FD;
  2131. -
  2132.     tgec = mac_dev->fman_mac;
  2133.     tgec->cfg->max_frame_length = fman_get_max_frm();
  2134.     err = tgec_init(tgec);
  2135. diff -rupN a/drivers/net/ethernet/freescale/fman/mac.c b/drivers/net/ethernet/freescale/fman/mac.c
  2136. --- a/drivers/net/ethernet/freescale/fman/mac.c 2022-12-31 14:16:26.427268905 +0100
  2137. +++ b/drivers/net/ethernet/freescale/fman/mac.c 2022-12-31 14:14:10.482182948 +0100
  2138. @@ -15,7 +15,6 @@
  2139.  #include <linux/phy.h>
  2140.  #include <linux/netdevice.h>
  2141.  #include <linux/phy_fixed.h>
  2142. -#include <linux/phylink.h>
  2143.  #include <linux/etherdevice.h>
  2144.  #include <linux/libfdt_env.h>
  2145.  
  2146. @@ -94,8 +93,130 @@ int fman_set_multi(struct net_device *ne
  2147.     return 0;
  2148.  }
  2149.  
  2150. +/**
  2151. + * fman_set_mac_active_pause
  2152. + * @mac_dev:   A pointer to the MAC device
  2153. + * @rx:        Pause frame setting for RX
  2154. + * @tx:        Pause frame setting for TX
  2155. + *
  2156. + * Set the MAC RX/TX PAUSE frames settings
  2157. + *
  2158. + * Avoid redundant calls to FMD, if the MAC driver already contains the desired
  2159. + * active PAUSE settings. Otherwise, the new active settings should be reflected
  2160. + * in FMan.
  2161. + *
  2162. + * Return: 0 on success; Error code otherwise.
  2163. + */
  2164. +int fman_set_mac_active_pause(struct mac_device *mac_dev, bool rx, bool tx)
  2165. +{
  2166. +   struct fman_mac *fman_mac = mac_dev->fman_mac;
  2167. +   int err = 0;
  2168. +
  2169. +   if (rx != mac_dev->rx_pause_active) {
  2170. +       err = mac_dev->set_rx_pause(fman_mac, rx);
  2171. +       if (likely(err == 0))
  2172. +           mac_dev->rx_pause_active = rx;
  2173. +   }
  2174. +
  2175. +   if (tx != mac_dev->tx_pause_active) {
  2176. +       u16 pause_time = (tx ? FSL_FM_PAUSE_TIME_ENABLE :
  2177. +                    FSL_FM_PAUSE_TIME_DISABLE);
  2178. +
  2179. +       err = mac_dev->set_tx_pause(fman_mac, 0, pause_time, 0);
  2180. +
  2181. +       if (likely(err == 0))
  2182. +           mac_dev->tx_pause_active = tx;
  2183. +   }
  2184. +
  2185. +   return err;
  2186. +}
  2187. +EXPORT_SYMBOL(fman_set_mac_active_pause);
  2188. +
  2189. +/**
  2190. + * fman_get_pause_cfg
  2191. + * @mac_dev:   A pointer to the MAC device
  2192. + * @rx_pause:  Return value for RX setting
  2193. + * @tx_pause:  Return value for TX setting
  2194. + *
  2195. + * Determine the MAC RX/TX PAUSE frames settings based on PHY
  2196. + * autonegotiation or values set by eththool.
  2197. + *
  2198. + * Return: Pointer to FMan device.
  2199. + */
  2200. +void fman_get_pause_cfg(struct mac_device *mac_dev, bool *rx_pause,
  2201. +           bool *tx_pause)
  2202. +{
  2203. +   struct phy_device *phy_dev = mac_dev->phy_dev;
  2204. +   u16 lcl_adv, rmt_adv;
  2205. +   u8 flowctrl;
  2206. +
  2207. +   *rx_pause = *tx_pause = false;
  2208. +
  2209. +   if (!phy_dev->duplex)
  2210. +       return;
  2211. +
  2212. +   /* If PAUSE autonegotiation is disabled, the TX/RX PAUSE settings
  2213. +    * are those set by ethtool.
  2214. +    */
  2215. +   if (!mac_dev->autoneg_pause) {
  2216. +       *rx_pause = mac_dev->rx_pause_req;
  2217. +       *tx_pause = mac_dev->tx_pause_req;
  2218. +       return;
  2219. +   }
  2220. +
  2221. +   /* Else if PAUSE autonegotiation is enabled, the TX/RX PAUSE
  2222. +    * settings depend on the result of the link negotiation.
  2223. +    */
  2224. +
  2225. +   /* get local capabilities */
  2226. +   lcl_adv = linkmode_adv_to_lcl_adv_t(phy_dev->advertising);
  2227. +
  2228. +   /* get link partner capabilities */
  2229. +   rmt_adv = 0;
  2230. +   if (phy_dev->pause)
  2231. +       rmt_adv |= LPA_PAUSE_CAP;
  2232. +   if (phy_dev->asym_pause)
  2233. +       rmt_adv |= LPA_PAUSE_ASYM;
  2234. +
  2235. +   /* Calculate TX/RX settings based on local and peer advertised
  2236. +    * symmetric/asymmetric PAUSE capabilities.
  2237. +    */
  2238. +   flowctrl = mii_resolve_flowctrl_fdx(lcl_adv, rmt_adv);
  2239. +   if (flowctrl & FLOW_CTRL_RX)
  2240. +       *rx_pause = true;
  2241. +   if (flowctrl & FLOW_CTRL_TX)
  2242. +       *tx_pause = true;
  2243. +}
  2244. +EXPORT_SYMBOL(fman_get_pause_cfg);
  2245. +
  2246. +#define DTSEC_SUPPORTED \
  2247. +   (SUPPORTED_10baseT_Half \
  2248. +   | SUPPORTED_10baseT_Full \
  2249. +   | SUPPORTED_100baseT_Half \
  2250. +   | SUPPORTED_100baseT_Full \
  2251. +   | SUPPORTED_Autoneg \
  2252. +   | SUPPORTED_Pause \
  2253. +   | SUPPORTED_Asym_Pause \
  2254. +   | SUPPORTED_FIBRE \
  2255. +   | SUPPORTED_MII)
  2256. +
  2257.  static DEFINE_MUTEX(eth_lock);
  2258.  
  2259. +static const u16 phy2speed[] = {
  2260. +   [PHY_INTERFACE_MODE_MII]        = SPEED_100,
  2261. +   [PHY_INTERFACE_MODE_GMII]       = SPEED_1000,
  2262. +   [PHY_INTERFACE_MODE_SGMII]      = SPEED_1000,
  2263. +   [PHY_INTERFACE_MODE_TBI]        = SPEED_1000,
  2264. +   [PHY_INTERFACE_MODE_RMII]       = SPEED_100,
  2265. +   [PHY_INTERFACE_MODE_RGMII]      = SPEED_1000,
  2266. +   [PHY_INTERFACE_MODE_RGMII_ID]       = SPEED_1000,
  2267. +   [PHY_INTERFACE_MODE_RGMII_RXID] = SPEED_1000,
  2268. +   [PHY_INTERFACE_MODE_RGMII_TXID] = SPEED_1000,
  2269. +   [PHY_INTERFACE_MODE_RTBI]       = SPEED_1000,
  2270. +   [PHY_INTERFACE_MODE_QSGMII]     = SPEED_1000,
  2271. +   [PHY_INTERFACE_MODE_XGMII]      = SPEED_10000
  2272. +};
  2273. +
  2274.  static struct platform_device *dpaa_eth_add_device(int fman_id,
  2275.                            struct mac_device *mac_dev)
  2276.  {
  2277. @@ -142,8 +263,8 @@ no_mem:
  2278.  }
  2279.  
  2280.  static const struct of_device_id mac_match[] = {
  2281. -   { .compatible   = "fsl,fman-dtsec", .data = dtsec_initialization },
  2282. -   { .compatible   = "fsl,fman-xgec", .data = tgec_initialization },
  2283. +   { .compatible   = "fsl,fman-dtsec", .data = dtsec_initialization },
  2284. +   { .compatible   = "fsl,fman-xgec", .data = tgec_initialization },
  2285.     { .compatible   = "fsl,fman-memac", .data = memac_initialization },
  2286.     {}
  2287.  };
  2288. @@ -175,7 +296,6 @@ static int mac_probe(struct platform_dev
  2289.     priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  2290.     if (!priv)
  2291.         return -ENOMEM;
  2292. -   platform_set_drvdata(_of_dev, mac_dev);
  2293.  
  2294.     /* Save private information */
  2295.     mac_dev->priv = priv;
  2296. @@ -304,21 +424,57 @@ static int mac_probe(struct platform_dev
  2297.     }
  2298.     mac_dev->phy_if = phy_if;
  2299.  
  2300. +   priv->speed     = phy2speed[mac_dev->phy_if];
  2301. +   params.max_speed    = priv->speed;
  2302. +   mac_dev->if_support = DTSEC_SUPPORTED;
  2303. +   /* We don't support half-duplex in SGMII mode */
  2304. +   if (mac_dev->phy_if == PHY_INTERFACE_MODE_SGMII)
  2305. +       mac_dev->if_support &= ~(SUPPORTED_10baseT_Half |
  2306. +                   SUPPORTED_100baseT_Half);
  2307. +
  2308. +   /* Gigabit support (no half-duplex) */
  2309. +   if (params.max_speed == 1000)
  2310. +       mac_dev->if_support |= SUPPORTED_1000baseT_Full;
  2311. +
  2312. +   /* The 10G interface only supports one mode */
  2313. +   if (mac_dev->phy_if == PHY_INTERFACE_MODE_XGMII)
  2314. +       mac_dev->if_support = SUPPORTED_10000baseT_Full;
  2315. +
  2316. +   /* Get the rest of the PHY information */
  2317. +   mac_dev->phy_node = of_parse_phandle(mac_node, "phy-handle", 0);
  2318. +
  2319. +   params.basex_if     = false;
  2320.     params.mac_id       = priv->cell_index;
  2321.     params.fm       = (void *)priv->fman;
  2322.     params.exception_cb = mac_exception;
  2323.     params.event_cb     = mac_exception;
  2324.  
  2325.     err = init(mac_dev, mac_node, &params);
  2326. -   if (err < 0)
  2327. +   if (err < 0) {
  2328. +       dev_err(dev, "mac_dev->init() = %d\n", err);
  2329. +       of_node_put(mac_dev->phy_node);
  2330.         return err;
  2331. +   }
  2332. +
  2333. +   /* pause frame autonegotiation enabled */
  2334. +   mac_dev->autoneg_pause = true;
  2335. +
  2336. +   /* By intializing the values to false, force FMD to enable PAUSE frames
  2337. +    * on RX and TX
  2338. +    */
  2339. +   mac_dev->rx_pause_req = true;
  2340. +   mac_dev->tx_pause_req = true;
  2341. +   mac_dev->rx_pause_active = false;
  2342. +   mac_dev->tx_pause_active = false;
  2343. +   err = fman_set_mac_active_pause(mac_dev, true, true);
  2344. +   if (err < 0)
  2345. +       dev_err(dev, "fman_set_mac_active_pause() = %d\n", err);
  2346.  
  2347.     if (!is_zero_ether_addr(mac_dev->addr))
  2348.         dev_info(dev, "FMan MAC address: %pM\n", mac_dev->addr);
  2349.  
  2350.     priv->eth_dev = dpaa_eth_add_device(fman_id, mac_dev);
  2351.     if (IS_ERR(priv->eth_dev)) {
  2352. -       err = PTR_ERR(priv->eth_dev);
  2353.         dev_err(dev, "failed to add Ethernet platform device for MAC %d\n",
  2354.             priv->cell_index);
  2355.         priv->eth_dev = NULL;
  2356. diff -rupN a/drivers/net/ethernet/freescale/fman/mac.h b/drivers/net/ethernet/freescale/fman/mac.h
  2357. --- a/drivers/net/ethernet/freescale/fman/mac.h 2022-12-31 14:16:26.427268905 +0100
  2358. +++ b/drivers/net/ethernet/freescale/fman/mac.h 2022-12-31 14:14:10.482182948 +0100
  2359. @@ -9,7 +9,6 @@
  2360.  #include <linux/device.h>
  2361.  #include <linux/if_ether.h>
  2362.  #include <linux/phy.h>
  2363. -#include <linux/phylink.h>
  2364.  #include <linux/list.h>
  2365.  
  2366.  #include "fman_port.h"
  2367. @@ -25,22 +24,32 @@ struct mac_device {
  2368.     struct device       *dev;
  2369.     u8           addr[ETH_ALEN];
  2370.     struct fman_port    *port[2];
  2371. -   struct phylink      *phylink;
  2372. -   struct phylink_config   phylink_config;
  2373. +   u32          if_support;
  2374. +   struct phy_device   *phy_dev;
  2375.     phy_interface_t     phy_if;
  2376. +   struct device_node  *phy_node;
  2377. +   struct net_device   *net_dev;
  2378.  
  2379. +   bool autoneg_pause;
  2380. +   bool rx_pause_req;
  2381. +   bool tx_pause_req;
  2382. +   bool rx_pause_active;
  2383. +   bool tx_pause_active;
  2384.     bool promisc;
  2385.     bool allmulti;
  2386.  
  2387. -   const struct phylink_mac_ops *phylink_ops;
  2388.     int (*enable)(struct fman_mac *mac_dev);
  2389.     void (*disable)(struct fman_mac *mac_dev);
  2390. +   void (*adjust_link)(struct mac_device *mac_dev);
  2391.     int (*set_promisc)(struct fman_mac *mac_dev, bool enable);
  2392.     int (*change_addr)(struct fman_mac *mac_dev, const enet_addr_t *enet_addr);
  2393.     int (*set_allmulti)(struct fman_mac *mac_dev, bool enable);
  2394.     int (*set_tstamp)(struct fman_mac *mac_dev, bool enable);
  2395.     int (*set_multi)(struct net_device *net_dev,
  2396.              struct mac_device *mac_dev);
  2397. +   int (*set_rx_pause)(struct fman_mac *mac_dev, bool en);
  2398. +   int (*set_tx_pause)(struct fman_mac *mac_dev, u8 priority,
  2399. +               u16 pause_time, u16 thresh_time);
  2400.     int (*set_exception)(struct fman_mac *mac_dev,
  2401.                  enum fman_mac_exceptions exception, bool enable);
  2402.     int (*add_hash_mac_addr)(struct fman_mac *mac_dev,
  2403. @@ -54,12 +63,6 @@ struct mac_device {
  2404.     struct mac_priv_s   *priv;
  2405.  };
  2406.  
  2407. -static inline struct mac_device
  2408. -*fman_config_to_mac(struct phylink_config *config)
  2409. -{
  2410. -   return container_of(config, struct mac_device, phylink_config);
  2411. -}
  2412. -
  2413.  struct dpaa_eth_data {
  2414.     struct mac_device *mac_dev;
  2415.     int mac_hw_id;
  2416.  
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