Compuertas

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;

entity compuertas is
 Port (a, b : in STD_LOGIC;

    not_a : out STD_LOGIC;
    a_and_b : out STD_LOGIC;
    a_or_b : out STD_LOGIC;
    a_xor_b : out STD_LOGIC;
    a_nor_b : out STD_LOGIC;
    a_nand_b : out STD_LOGIC);

ATTRIBUTE LOC : string;
ATTRIBUTE LOC OF not_a : SIGNAL IS "23";
ATTRIBUTE LOC OF a_and_b : SIGNAL IS "22";
ATTRIBUTE LOC OF a_or_b : SIGNAL IS "21";
ATTRIBUTE LOC OF a_xor_b : SIGNAL IS "20";
ATTRIBUTE LOC OF a_nor_b : SIGNAL IS "19";
ATTRIBUTE LOC OF a_nand_b : SIGNAL IS "18";

end compuertas;


architecture behavioral of compuertas is
begin

a_and_b <= a and b;
not_a <= not a;
a_or_b <= a or b;

a_xor_b <= a xor b;
a_nor_b <=a nor b;
a_nand_b<= a nand b;

end behavioral;