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uc3_a3_xplained.h

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Aug 5th, 2015
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  1. #ifndef UC3_A3_XPLAINED_H_
  2. #define UC3_A3_XPLAINED_H_
  3.  
  4. #include "compiler.h"
  5.  
  6. #ifdef __AVR32_ABI_COMPILER__
  7. #  include "led.h"
  8. #endif
  9.  
  10.  
  11. #ifdef __cplusplus
  12. extern "C" {
  13. #endif
  14.  
  15.  
  16.  
  17. /* RCOsc frequency: Hz. */
  18. #define FRCOSC                      (AVR32_PM_RCOSC_FREQUENCY)
  19.  
  20. /** Osc32 frequency (Hz.) and startup time (RCOsc periods). */
  21. #define FOSC32                      (32768)
  22. #define OSC32_STARTUP               (AVR32_PM_OSCCTRL32_STARTUP_8192_RCOSC)
  23.  
  24. #define BOARD_OSC32_IS_XTAL         true
  25. #define BOARD_OSC32_HZ              FOSC32
  26. #define BOARD_OSC32_STARTUP_US      (570000)
  27.  
  28. /** Osc frequency (Hz.) and startup time (RCOsc periods). */
  29. #define FOSC0                       (12000000)
  30. #define OSC0_STARTUP                (AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC)
  31.  
  32. #define BOARD_OSC0_IS_XTAL          true
  33. #define BOARD_OSC0_HZ               FOSC0
  34. #define BOARD_OSC0_STARTUP_US       (18000)
  35. /** @} */
  36.  
  37. /* \def Number of LEDs. */
  38. #define LED_COUNT                   4
  39.  
  40. /* \name UC3-A3-Xplained LED to GPIO pin mappings.
  41.  * @{
  42.  */
  43. #define LED0_GPIO                   (AVR32_PIN_PB03)
  44. #define LED1_GPIO                   (AVR32_PIN_PX22)
  45. #define LED2_GPIO                   (AVR32_PIN_PB02)
  46. #define LED3_GPIO                   (AVR32_PIN_PB06)
  47. /** @} */
  48.  
  49. /** \name GPIO Connections of Push Buttons
  50.  * @{
  51.  */
  52. #define GPIO_PUSH_BUTTON_0          (AVR32_PIN_PB01)
  53. #define GPIO_PUSH_BUTTON_0_PRESSED  (0)
  54. /** @} */
  55.  
  56. /** \name SDRAM Definitions
  57.  * @{
  58.  */
  59. /** Part header file of used SDRAM(s). */
  60. #define SDRAM_PART_HDR              "mt48lc16m16a2tg7e/mt48lc16m16a2tg7e.h"
  61.  
  62. /** SDRAM(s) data bus width (always 16 bits on UC3) */
  63. #define SDRAM_DBW                    16
  64. /** @} */
  65.  
  66. /** \name USART connections to the UC3B board controller
  67.  * @{
  68.  */
  69. #define USART                       (&AVR32_USART1)
  70. #define USART_RXD_PIN               AVR32_USART1_RXD_0_0_PIN
  71. #define USART_RXD_FUNCTION          AVR32_USART1_RXD_0_0_FUNCTION
  72. #define USART_TXD_PIN               AVR32_USART1_TXD_0_0_PIN
  73. #define USART_TXD_FUNCTION          AVR32_USART1_TXD_0_0_FUNCTION
  74. #define USART_IRQ                   AVR32_USART1_IRQ
  75. #define USART_IRQ_GROUP             AVR32_USART1_IRQ_GROUP
  76. #define USART_SYSCLK                SYSCLK_USART1
  77. /** @} */
  78.  
  79. /** \name TWI Master connections to GPIO
  80.  *
  81.  * \todo
  82.  * The TWIM pins that are mapped here should correspond with the TWIM
  83.  * interfaces selected in the conf_board.h file.  In addition, the
  84.  * default values below map TWIM the pins on the Xplaned J1 block.
  85.  * Modify the mappings or add appropriate conditional compilation as
  86.  * needed.
  87.  *
  88.  * @{
  89.  */
  90. #define TWIMS0_TWD_PIN              AVR32_TWIMS0_TWD_0_0_PIN
  91. #define TWIMS0_TWD_FUNCTION         AVR32_TWIMS0_TWD_0_0_FUNCTION
  92. #define TWIMS0_TWCK_PIN             AVR32_TWIMS0_TWCK_0_0_PIN
  93. #define TWIMS0_TWCK_FUNCTION        AVR32_TWIMS0_TWCK_0_0_FUNCTION
  94. /** @} */
  95.  
  96.  
  97.  
  98. /** \name Header J1 SPI1
  99.  * @{
  100.  */
  101. #define HeaderJ1_SPI                 (&AVR32_SPI1)
  102. #define HeaderJ1_SPI_NPCS            0
  103. #define HeaderJ1_SPI_SCK_PIN         AVR32_SPI1_SCK_0_0_PIN
  104. #define HeaderJ1_SPI_SCK_FUNCTION    AVR32_SPI1_SCK_0_0_FUNCTION
  105. #define HeaderJ1_SPI_MISO_PIN        AVR32_SPI1_MISO_0_0_PIN
  106. #define HeaderJ1_SPI_MISO_FUNCTION   AVR32_SPI1_MISO_0_0_FUNCTION
  107. #define HeaderJ1_SPI_MOSI_PIN        AVR32_SPI1_MOSI_0_0_PIN
  108. #define HeaderJ1_SPI_MOSI_FUNCTION   AVR32_SPI1_MOSI_0_0_FUNCTION
  109. #define HeaderJ1_SPI_NPCS0_PIN       AVR32_SPI1_NPCS_0_0_PIN        // Verwendeter NPCS auf SS-Pin
  110. #define HeaderJ1_SPI_NPCS0_FUNCTION  AVR32_SPI1_NPCS_0_0_FUNCTION
  111. #define HeaderJ1_SPI_NPCS1_PIN       AVR32_SPI1_NPCS_1_0_PIN
  112. #define HeaderJ1_SPI_NPCS1_FUNCTION  AVR32_SPI1_NPCS_1_0_FUNCTION
  113. #define HeaderJ1_SPI_NPCS2_PIN       AVR32_SPI1_NPCS_2_0_PIN
  114. #define HeaderJ1_SPI_NPCS2_FUNCTION  AVR32_SPI1_NPCS_2_0_FUNCTION
  115. #define HeaderJ1_SPI_NPCS3_PIN       AVR32_SPI1_NPCS_3_PIN
  116. #define HeaderJ1_SPI_NPCS3_FUNCTION  AVR32_SPI1_NPCS_3_FUNCTION
  117. /** @} */
  118.  
  119.  
  120. /** Validate board support for the common sensor service. */
  121. #define                             COMMON_SENSOR_PLATFORM
  122.  
  123. /** \name SPI Connections of the AT45DBX Data Flash Memory
  124.  * @{
  125.  */
  126. // SPI 0 liegt auf Header J4
  127. #define AT45DBX_SPI                 (&AVR32_SPI0)
  128. #define AT45DBX_SPI_NPCS            1
  129. #define AT45DBX_SPI_SCK_PIN         AVR32_SPI0_SCK_0_0_PIN
  130. #define AT45DBX_SPI_SCK_FUNCTION    AVR32_SPI0_SCK_0_0_FUNCTION
  131. #define AT45DBX_SPI_MISO_PIN        AVR32_SPI0_MISO_0_0_PIN
  132. #define AT45DBX_SPI_MISO_FUNCTION   AVR32_SPI0_MISO_0_0_FUNCTION
  133. #define AT45DBX_SPI_MOSI_PIN        AVR32_SPI0_MOSI_0_0_PIN
  134. #define AT45DBX_SPI_MOSI_FUNCTION   AVR32_SPI0_MOSI_0_0_FUNCTION
  135. #define AT45DBX_SPI_NPCS0_PIN       AVR32_SPI0_NPCS_1_0_PIN
  136. #define AT45DBX_SPI_NPCS0_FUNCTION  AVR32_SPI0_NPCS_1_0_FUNCTION
  137. /** @} */
  138.  
  139. /** @} */ // at32uc3a3_xpld_config group
  140.  
  141. #ifdef __cplusplus
  142. }
  143. #endif
  144.  
  145. #endif /* UC3_A3_XPLAINED_H_ */
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