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  1. diff -Narup a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
  2. --- a/drivers/net/ethernet/realtek/r8169.c  2018-11-21 09:22:14.000000000 +0100
  3. +++ b/drivers/net/ethernet/realtek/r8169.c  2018-12-17 09:24:42.000000000 +0100
  4. @@ -13,29 +13,25 @@
  5.  #include <linux/pci.h>
  6.  #include <linux/netdevice.h>
  7.  #include <linux/etherdevice.h>
  8. +#include <linux/clk.h>
  9.  #include <linux/delay.h>
  10.  #include <linux/ethtool.h>
  11. -#include <linux/mii.h>
  12. +#include <linux/phy.h>
  13.  #include <linux/if_vlan.h>
  14.  #include <linux/crc32.h>
  15.  #include <linux/in.h>
  16. +#include <linux/io.h>
  17.  #include <linux/ip.h>
  18.  #include <linux/tcp.h>
  19.  #include <linux/interrupt.h>
  20.  #include <linux/dma-mapping.h>
  21.  #include <linux/pm_runtime.h>
  22.  #include <linux/firmware.h>
  23. -#include <linux/pci-aspm.h>
  24.  #include <linux/prefetch.h>
  25.  #include <linux/ipv6.h>
  26.  #include <net/ip6_checksum.h>
  27.  
  28. -#include <asm/io.h>
  29. -#include <asm/irq.h>
  30. -
  31. -#define RTL8169_VERSION "2.3LK-NAPI"
  32.  #define MODULENAME "r8169"
  33. -#define PFX MODULENAME ": "
  34.  
  35.  #define FIRMWARE_8168D_1   "rtl_nic/rtl8168d-1.fw"
  36.  #define FIRMWARE_8168D_2   "rtl_nic/rtl8168d-2.fw"
  37. @@ -57,19 +53,6 @@
  38.  #define FIRMWARE_8107E_1   "rtl_nic/rtl8107e-1.fw"
  39.  #define FIRMWARE_8107E_2   "rtl_nic/rtl8107e-2.fw"
  40.  
  41. -#ifdef RTL8169_DEBUG
  42. -#define assert(expr) \
  43. -   if (!(expr)) {                  \
  44. -       printk( "Assertion failed! %s,%s,%s,line=%d\n", \
  45. -       #expr,__FILE__,__func__,__LINE__);      \
  46. -   }
  47. -#define dprintk(fmt, args...) \
  48. -   do { printk(KERN_DEBUG PFX fmt, ## args); } while (0)
  49. -#else
  50. -#define assert(expr) do {} while (0)
  51. -#define dprintk(fmt, args...)  do {} while (0)
  52. -#endif /* RTL8169_DEBUG */
  53. -
  54.  #define R8169_MSG_DEFAULT \
  55.     (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
  56.  
  57. @@ -95,7 +78,6 @@ static const int multicast_filter_limit
  58.  #define R8169_RX_RING_BYTES    (NUM_RX_DESC * sizeof(struct RxDesc))
  59.  
  60.  #define RTL8169_TX_TIMEOUT (6*HZ)
  61. -#define RTL8169_PHY_TIMEOUT    (10*HZ)
  62.  
  63.  /* write/read MMIO register */
  64.  #define RTL_W8(tp, reg, val8)  writeb((val8), tp->mmio_addr + (reg))
  65. @@ -160,136 +142,70 @@ enum mac_version {
  66.     RTL_GIGA_MAC_NONE   = 0xff,
  67.  };
  68.  
  69. -enum rtl_tx_desc_version {
  70. -   RTL_TD_0    = 0,
  71. -   RTL_TD_1    = 1,
  72. -};
  73. -
  74.  #define JUMBO_1K   ETH_DATA_LEN
  75.  #define JUMBO_4K   (4*1024 - ETH_HLEN - 2)
  76.  #define JUMBO_6K   (6*1024 - ETH_HLEN - 2)
  77.  #define JUMBO_7K   (7*1024 - ETH_HLEN - 2)
  78.  #define JUMBO_9K   (9*1024 - ETH_HLEN - 2)
  79.  
  80. -#define _R(NAME,TD,FW,SZ) {    \
  81. -   .name = NAME,       \
  82. -   .txd_version = TD,  \
  83. -   .fw_name = FW,      \
  84. -   .jumbo_max = SZ,    \
  85. -}
  86. -
  87.  static const struct {
  88.     const char *name;
  89. -   enum rtl_tx_desc_version txd_version;
  90.     const char *fw_name;
  91. -   u16 jumbo_max;
  92.  } rtl_chip_infos[] = {
  93.     /* PCI devices. */
  94. -   [RTL_GIGA_MAC_VER_01] =
  95. -       _R("RTL8169",       RTL_TD_0, NULL, JUMBO_7K),
  96. -   [RTL_GIGA_MAC_VER_02] =
  97. -       _R("RTL8169s",      RTL_TD_0, NULL, JUMBO_7K),
  98. -   [RTL_GIGA_MAC_VER_03] =
  99. -       _R("RTL8110s",      RTL_TD_0, NULL, JUMBO_7K),
  100. -   [RTL_GIGA_MAC_VER_04] =
  101. -       _R("RTL8169sb/8110sb",  RTL_TD_0, NULL, JUMBO_7K),
  102. -   [RTL_GIGA_MAC_VER_05] =
  103. -       _R("RTL8169sc/8110sc",  RTL_TD_0, NULL, JUMBO_7K),
  104. -   [RTL_GIGA_MAC_VER_06] =
  105. -       _R("RTL8169sc/8110sc",  RTL_TD_0, NULL, JUMBO_7K),
  106. +   [RTL_GIGA_MAC_VER_01] = {"RTL8169"              },
  107. +   [RTL_GIGA_MAC_VER_02] = {"RTL8169s"             },
  108. +   [RTL_GIGA_MAC_VER_03] = {"RTL8110s"             },
  109. +   [RTL_GIGA_MAC_VER_04] = {"RTL8169sb/8110sb"         },
  110. +   [RTL_GIGA_MAC_VER_05] = {"RTL8169sc/8110sc"         },
  111. +   [RTL_GIGA_MAC_VER_06] = {"RTL8169sc/8110sc"         },
  112.     /* PCI-E devices. */
  113. -   [RTL_GIGA_MAC_VER_07] =
  114. -       _R("RTL8102e",      RTL_TD_1, NULL, JUMBO_1K),
  115. -   [RTL_GIGA_MAC_VER_08] =
  116. -       _R("RTL8102e",      RTL_TD_1, NULL, JUMBO_1K),
  117. -   [RTL_GIGA_MAC_VER_09] =
  118. -       _R("RTL8102e",      RTL_TD_1, NULL, JUMBO_1K),
  119. -   [RTL_GIGA_MAC_VER_10] =
  120. -       _R("RTL8101e",      RTL_TD_0, NULL, JUMBO_1K),
  121. -   [RTL_GIGA_MAC_VER_11] =
  122. -       _R("RTL8168b/8111b",    RTL_TD_0, NULL, JUMBO_4K),
  123. -   [RTL_GIGA_MAC_VER_12] =
  124. -       _R("RTL8168b/8111b",    RTL_TD_0, NULL, JUMBO_4K),
  125. -   [RTL_GIGA_MAC_VER_13] =
  126. -       _R("RTL8101e",      RTL_TD_0, NULL, JUMBO_1K),
  127. -   [RTL_GIGA_MAC_VER_14] =
  128. -       _R("RTL8100e",      RTL_TD_0, NULL, JUMBO_1K),
  129. -   [RTL_GIGA_MAC_VER_15] =
  130. -       _R("RTL8100e",      RTL_TD_0, NULL, JUMBO_1K),
  131. -   [RTL_GIGA_MAC_VER_16] =
  132. -       _R("RTL8101e",      RTL_TD_0, NULL, JUMBO_1K),
  133. -   [RTL_GIGA_MAC_VER_17] =
  134. -       _R("RTL8168b/8111b",    RTL_TD_0, NULL, JUMBO_4K),
  135. -   [RTL_GIGA_MAC_VER_18] =
  136. -       _R("RTL8168cp/8111cp",  RTL_TD_1, NULL, JUMBO_6K),
  137. -   [RTL_GIGA_MAC_VER_19] =
  138. -       _R("RTL8168c/8111c",    RTL_TD_1, NULL, JUMBO_6K),
  139. -   [RTL_GIGA_MAC_VER_20] =
  140. -       _R("RTL8168c/8111c",    RTL_TD_1, NULL, JUMBO_6K),
  141. -   [RTL_GIGA_MAC_VER_21] =
  142. -       _R("RTL8168c/8111c",    RTL_TD_1, NULL, JUMBO_6K),
  143. -   [RTL_GIGA_MAC_VER_22] =
  144. -       _R("RTL8168c/8111c",    RTL_TD_1, NULL, JUMBO_6K),
  145. -   [RTL_GIGA_MAC_VER_23] =
  146. -       _R("RTL8168cp/8111cp",  RTL_TD_1, NULL, JUMBO_6K),
  147. -   [RTL_GIGA_MAC_VER_24] =
  148. -       _R("RTL8168cp/8111cp",  RTL_TD_1, NULL, JUMBO_6K),
  149. -   [RTL_GIGA_MAC_VER_25] =
  150. -       _R("RTL8168d/8111d",    RTL_TD_1, FIRMWARE_8168D_1, JUMBO_9K),
  151. -   [RTL_GIGA_MAC_VER_26] =
  152. -       _R("RTL8168d/8111d",    RTL_TD_1, FIRMWARE_8168D_2, JUMBO_9K),
  153. -   [RTL_GIGA_MAC_VER_27] =
  154. -       _R("RTL8168dp/8111dp",  RTL_TD_1, NULL, JUMBO_9K),
  155. -   [RTL_GIGA_MAC_VER_28] =
  156. -       _R("RTL8168dp/8111dp",  RTL_TD_1, NULL, JUMBO_9K),
  157. -   [RTL_GIGA_MAC_VER_29] =
  158. -       _R("RTL8105e",      RTL_TD_1, FIRMWARE_8105E_1, JUMBO_1K),
  159. -   [RTL_GIGA_MAC_VER_30] =
  160. -       _R("RTL8105e",      RTL_TD_1, FIRMWARE_8105E_1, JUMBO_1K),
  161. -   [RTL_GIGA_MAC_VER_31] =
  162. -       _R("RTL8168dp/8111dp",  RTL_TD_1, NULL, JUMBO_9K),
  163. -   [RTL_GIGA_MAC_VER_32] =
  164. -       _R("RTL8168e/8111e",    RTL_TD_1, FIRMWARE_8168E_1, JUMBO_9K),
  165. -   [RTL_GIGA_MAC_VER_33] =
  166. -       _R("RTL8168e/8111e",    RTL_TD_1, FIRMWARE_8168E_2, JUMBO_9K),
  167. -   [RTL_GIGA_MAC_VER_34] =
  168. -       _R("RTL8168evl/8111evl",RTL_TD_1, FIRMWARE_8168E_3, JUMBO_9K),
  169. -   [RTL_GIGA_MAC_VER_35] =
  170. -       _R("RTL8168f/8111f",    RTL_TD_1, FIRMWARE_8168F_1, JUMBO_9K),
  171. -   [RTL_GIGA_MAC_VER_36] =
  172. -       _R("RTL8168f/8111f",    RTL_TD_1, FIRMWARE_8168F_2, JUMBO_9K),
  173. -   [RTL_GIGA_MAC_VER_37] =
  174. -       _R("RTL8402",       RTL_TD_1, FIRMWARE_8402_1,  JUMBO_1K),
  175. -   [RTL_GIGA_MAC_VER_38] =
  176. -       _R("RTL8411",       RTL_TD_1, FIRMWARE_8411_1,  JUMBO_9K),
  177. -   [RTL_GIGA_MAC_VER_39] =
  178. -       _R("RTL8106e",      RTL_TD_1, FIRMWARE_8106E_1, JUMBO_1K),
  179. -   [RTL_GIGA_MAC_VER_40] =
  180. -       _R("RTL8168g/8111g",    RTL_TD_1, FIRMWARE_8168G_2, JUMBO_9K),
  181. -   [RTL_GIGA_MAC_VER_41] =
  182. -       _R("RTL8168g/8111g",    RTL_TD_1, NULL, JUMBO_9K),
  183. -   [RTL_GIGA_MAC_VER_42] =
  184. -       _R("RTL8168g/8111g",    RTL_TD_1, FIRMWARE_8168G_3, JUMBO_9K),
  185. -   [RTL_GIGA_MAC_VER_43] =
  186. -       _R("RTL8106e",      RTL_TD_1, FIRMWARE_8106E_2, JUMBO_1K),
  187. -   [RTL_GIGA_MAC_VER_44] =
  188. -       _R("RTL8411",       RTL_TD_1, FIRMWARE_8411_2,  JUMBO_9K),
  189. -   [RTL_GIGA_MAC_VER_45] =
  190. -       _R("RTL8168h/8111h",    RTL_TD_1, FIRMWARE_8168H_1, JUMBO_9K),
  191. -   [RTL_GIGA_MAC_VER_46] =
  192. -       _R("RTL8168h/8111h",    RTL_TD_1, FIRMWARE_8168H_2, JUMBO_9K),
  193. -   [RTL_GIGA_MAC_VER_47] =
  194. -       _R("RTL8107e",      RTL_TD_1, FIRMWARE_8107E_1, JUMBO_1K),
  195. -   [RTL_GIGA_MAC_VER_48] =
  196. -       _R("RTL8107e",      RTL_TD_1, FIRMWARE_8107E_2, JUMBO_1K),
  197. -   [RTL_GIGA_MAC_VER_49] =
  198. -       _R("RTL8168ep/8111ep",  RTL_TD_1, NULL, JUMBO_9K),
  199. -   [RTL_GIGA_MAC_VER_50] =
  200. -       _R("RTL8168ep/8111ep",  RTL_TD_1, NULL, JUMBO_9K),
  201. -   [RTL_GIGA_MAC_VER_51] =
  202. -       _R("RTL8168ep/8111ep",  RTL_TD_1, NULL, JUMBO_9K),
  203. +   [RTL_GIGA_MAC_VER_07] = {"RTL8102e"             },
  204. +   [RTL_GIGA_MAC_VER_08] = {"RTL8102e"             },
  205. +   [RTL_GIGA_MAC_VER_09] = {"RTL8102e"             },
  206. +   [RTL_GIGA_MAC_VER_10] = {"RTL8101e"             },
  207. +   [RTL_GIGA_MAC_VER_11] = {"RTL8168b/8111b"           },
  208. +   [RTL_GIGA_MAC_VER_12] = {"RTL8168b/8111b"           },
  209. +   [RTL_GIGA_MAC_VER_13] = {"RTL8101e"             },
  210. +   [RTL_GIGA_MAC_VER_14] = {"RTL8100e"             },
  211. +   [RTL_GIGA_MAC_VER_15] = {"RTL8100e"             },
  212. +   [RTL_GIGA_MAC_VER_16] = {"RTL8101e"             },
  213. +   [RTL_GIGA_MAC_VER_17] = {"RTL8168b/8111b"           },
  214. +   [RTL_GIGA_MAC_VER_18] = {"RTL8168cp/8111cp"         },
  215. +   [RTL_GIGA_MAC_VER_19] = {"RTL8168c/8111c"           },
  216. +   [RTL_GIGA_MAC_VER_20] = {"RTL8168c/8111c"           },
  217. +   [RTL_GIGA_MAC_VER_21] = {"RTL8168c/8111c"           },
  218. +   [RTL_GIGA_MAC_VER_22] = {"RTL8168c/8111c"           },
  219. +   [RTL_GIGA_MAC_VER_23] = {"RTL8168cp/8111cp"         },
  220. +   [RTL_GIGA_MAC_VER_24] = {"RTL8168cp/8111cp"         },
  221. +   [RTL_GIGA_MAC_VER_25] = {"RTL8168d/8111d",  FIRMWARE_8168D_1},
  222. +   [RTL_GIGA_MAC_VER_26] = {"RTL8168d/8111d",  FIRMWARE_8168D_2},
  223. +   [RTL_GIGA_MAC_VER_27] = {"RTL8168dp/8111dp"         },
  224. +   [RTL_GIGA_MAC_VER_28] = {"RTL8168dp/8111dp"         },
  225. +   [RTL_GIGA_MAC_VER_29] = {"RTL8105e",        FIRMWARE_8105E_1},
  226. +   [RTL_GIGA_MAC_VER_30] = {"RTL8105e",        FIRMWARE_8105E_1},
  227. +   [RTL_GIGA_MAC_VER_31] = {"RTL8168dp/8111dp"         },
  228. +   [RTL_GIGA_MAC_VER_32] = {"RTL8168e/8111e",  FIRMWARE_8168E_1},
  229. +   [RTL_GIGA_MAC_VER_33] = {"RTL8168e/8111e",  FIRMWARE_8168E_2},
  230. +   [RTL_GIGA_MAC_VER_34] = {"RTL8168evl/8111evl",  FIRMWARE_8168E_3},
  231. +   [RTL_GIGA_MAC_VER_35] = {"RTL8168f/8111f",  FIRMWARE_8168F_1},
  232. +   [RTL_GIGA_MAC_VER_36] = {"RTL8168f/8111f",  FIRMWARE_8168F_2},
  233. +   [RTL_GIGA_MAC_VER_37] = {"RTL8402",     FIRMWARE_8402_1 },
  234. +   [RTL_GIGA_MAC_VER_38] = {"RTL8411",     FIRMWARE_8411_1 },
  235. +   [RTL_GIGA_MAC_VER_39] = {"RTL8106e",        FIRMWARE_8106E_1},
  236. +   [RTL_GIGA_MAC_VER_40] = {"RTL8168g/8111g",  FIRMWARE_8168G_2},
  237. +   [RTL_GIGA_MAC_VER_41] = {"RTL8168g/8111g"           },
  238. +   [RTL_GIGA_MAC_VER_42] = {"RTL8168g/8111g",  FIRMWARE_8168G_3},
  239. +   [RTL_GIGA_MAC_VER_43] = {"RTL8106e",        FIRMWARE_8106E_2},
  240. +   [RTL_GIGA_MAC_VER_44] = {"RTL8411",     FIRMWARE_8411_2 },
  241. +   [RTL_GIGA_MAC_VER_45] = {"RTL8168h/8111h",  FIRMWARE_8168H_1},
  242. +   [RTL_GIGA_MAC_VER_46] = {"RTL8168h/8111h",  FIRMWARE_8168H_2},
  243. +   [RTL_GIGA_MAC_VER_47] = {"RTL8107e",        FIRMWARE_8107E_1},
  244. +   [RTL_GIGA_MAC_VER_48] = {"RTL8107e",        FIRMWARE_8107E_2},
  245. +   [RTL_GIGA_MAC_VER_49] = {"RTL8168ep/8111ep"         },
  246. +   [RTL_GIGA_MAC_VER_50] = {"RTL8168ep/8111ep"         },
  247. +   [RTL_GIGA_MAC_VER_51] = {"RTL8168ep/8111ep"         },
  248.  };
  249. -#undef _R
  250.  
  251.  enum cfg_version {
  252.     RTL_CFG_0 = 0x00,
  253. @@ -400,12 +316,6 @@ enum rtl_registers {
  254.     FuncForceEvent  = 0xfc,
  255.  };
  256.  
  257. -enum rtl8110_registers {
  258. -   TBICSR          = 0x64,
  259. -   TBI_ANAR        = 0x68,
  260. -   TBI_LPAR        = 0x6a,
  261. -};
  262. -
  263.  enum rtl8168_8101_registers {
  264.     CSIDR           = 0x64,
  265.     CSIAR           = 0x68,
  266. @@ -572,14 +482,6 @@ enum rtl_register_content {
  267.     PMEStatus   = (1 << 0), /* PME status can be reset by PCI RST# */
  268.     ASPM_en     = (1 << 0), /* ASPM enable */
  269.  
  270. -   /* TBICSR p.28 */
  271. -   TBIReset    = 0x80000000,
  272. -   TBILoopback = 0x40000000,
  273. -   TBINwEnable = 0x20000000,
  274. -   TBINwRestart    = 0x10000000,
  275. -   TBILinkOk   = 0x02000000,
  276. -   TBINwComplete   = 0x01000000,
  277. -
  278.     /* CPlusCmd p.31 */
  279.     EnableBist  = (1 << 15),    // 8168 8101
  280.     Mac_dbgo_oe = (1 << 14),    // 8168 8101
  281. @@ -733,7 +635,6 @@ enum rtl_flag {
  282.     RTL_FLAG_TASK_ENABLED = 0,
  283.     RTL_FLAG_TASK_SLOW_PENDING,
  284.     RTL_FLAG_TASK_RESET_PENDING,
  285. -   RTL_FLAG_TASK_PHY_PENDING,
  286.     RTL_FLAG_MAX
  287.  };
  288.  
  289. @@ -761,11 +662,11 @@ struct rtl8169_private {
  290.     dma_addr_t RxPhyAddr;
  291.     void *Rx_databuff[NUM_RX_DESC]; /* Rx data buffers */
  292.     struct ring_info tx_skb[NUM_TX_DESC];   /* Tx data buffers */
  293. -   struct timer_list timer;
  294.     u16 cp_cmd;
  295.  
  296.     u16 event_slow;
  297.     const struct rtl_coalesce_info *coalesce_info;
  298. +   struct clk *clk;
  299.  
  300.     struct mdio_ops {
  301.         void (*write)(struct rtl8169_private *, int, int);
  302. @@ -777,14 +678,7 @@ struct rtl8169_private {
  303.         void (*disable)(struct rtl8169_private *);
  304.     } jumbo_ops;
  305.  
  306. -   int (*set_speed)(struct net_device *, u8 aneg, u16 sp, u8 dpx, u32 adv);
  307. -   int (*get_link_ksettings)(struct net_device *,
  308. -                 struct ethtool_link_ksettings *);
  309. -   void (*phy_reset_enable)(struct rtl8169_private *tp);
  310.     void (*hw_start)(struct rtl8169_private *tp);
  311. -   unsigned int (*phy_reset_pending)(struct rtl8169_private *tp);
  312. -   unsigned int (*link_ok)(struct rtl8169_private *tp);
  313. -   int (*do_ioctl)(struct rtl8169_private *tp, struct mii_ioctl_data *data, int cmd);
  314.     bool (*tso_csum)(struct rtl8169_private *, struct sk_buff *, u32 *);
  315.  
  316.     struct {
  317. @@ -793,7 +687,8 @@ struct rtl8169_private {
  318.         struct work_struct work;
  319.     } wk;
  320.  
  321. -   struct mii_if_info mii;
  322. +   unsigned supports_gmii:1;
  323. +   struct mii_bus *mii_bus;
  324.     dma_addr_t counters_phys_addr;
  325.     struct rtl8169_counters *counters;
  326.     struct rtl8169_tc_offsets tc_offset;
  327. @@ -823,7 +718,6 @@ MODULE_PARM_DESC(use_dac, "Enable PCI DA
  328. module_param_named(debug, debug.msg_enable, int, 0);
  329. MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)");
  330. MODULE_LICENSE("GPL");
  331. -MODULE_VERSION(RTL8169_VERSION);
  332. MODULE_FIRMWARE(FIRMWARE_8168D_1);
  333. MODULE_FIRMWARE(FIRMWARE_8168D_2);
  334. MODULE_FIRMWARE(FIRMWARE_8168E_1);
  335. @@ -1144,21 +1038,6 @@ static void rtl_w0w1_phy(struct rtl8169_
  336.     rtl_writephy(tp, reg_addr, (val & ~m) | p);
  337. }
  338.  
  339. -static void rtl_mdio_write(struct net_device *dev, int phy_id, int location,
  340. -              int val)
  341. -{
  342. -   struct rtl8169_private *tp = netdev_priv(dev);
  343. -
  344. -   rtl_writephy(tp, location, val);
  345. -}
  346. -
  347. -static int rtl_mdio_read(struct net_device *dev, int phy_id, int location)
  348. -{
  349. -   struct rtl8169_private *tp = netdev_priv(dev);
  350. -
  351. -   return rtl_readphy(tp, location);
  352. -}
  353. -
  354. DECLARE_RTL_COND(rtl_ephyar_cond)
  355. {
  356.     return RTL_R32(tp, EPHYAR) & EPHYAR_FLAG;
  357. @@ -1479,54 +1358,22 @@ static void rtl8169_irq_mask_and_ack(str
  358.     RTL_R8(tp, ChipCmd);
  359. }
  360.  
  361. -static unsigned int rtl8169_tbi_reset_pending(struct rtl8169_private *tp)
  362. -{
  363. -   return RTL_R32(tp, TBICSR) & TBIReset;
  364. -}
  365. -
  366. -static unsigned int rtl8169_xmii_reset_pending(struct rtl8169_private *tp)
  367. -{
  368. -   return rtl_readphy(tp, MII_BMCR) & BMCR_RESET;
  369. -}
  370. -
  371. -static unsigned int rtl8169_tbi_link_ok(struct rtl8169_private *tp)
  372. -{
  373. -   return RTL_R32(tp, TBICSR) & TBILinkOk;
  374. -}
  375. -
  376. -static unsigned int rtl8169_xmii_link_ok(struct rtl8169_private *tp)
  377. -{
  378. -   return RTL_R8(tp, PHYstatus) & LinkStatus;
  379. -}
  380. -
  381. -static void rtl8169_tbi_reset_enable(struct rtl8169_private *tp)
  382. -{
  383. -   RTL_W32(tp, TBICSR, RTL_R32(tp, TBICSR) | TBIReset);
  384. -}
  385. -
  386. -static void rtl8169_xmii_reset_enable(struct rtl8169_private *tp)
  387. -{
  388. -   unsigned int val;
  389. -
  390. -   val = rtl_readphy(tp, MII_BMCR) | BMCR_RESET;
  391. -   rtl_writephy(tp, MII_BMCR, val & 0xffff);
  392. -}
  393. -
  394. static void rtl_link_chg_patch(struct rtl8169_private *tp)
  395. {
  396.     struct net_device *dev = tp->dev;
  397. +   struct phy_device *phydev = dev->phydev;
  398.  
  399.     if (!netif_running(dev))
  400.         return;
  401.  
  402.     if (tp->mac_version == RTL_GIGA_MAC_VER_34 ||
  403.         tp->mac_version == RTL_GIGA_MAC_VER_38) {
  404. -       if (RTL_R8(tp, PHYstatus) & _1000bpsF) {
  405. +       if (phydev->speed == SPEED_1000) {
  406.             rtl_eri_write(tp, 0x1bc, ERIAR_MASK_1111, 0x00000011,
  407.                       ERIAR_EXGMAC);
  408.             rtl_eri_write(tp, 0x1dc, ERIAR_MASK_1111, 0x00000005,
  409.                       ERIAR_EXGMAC);
  410. -       } else if (RTL_R8(tp, PHYstatus) & _100bps) {
  411. +       } else if (phydev->speed == SPEED_100) {
  412.             rtl_eri_write(tp, 0x1bc, ERIAR_MASK_1111, 0x0000001f,
  413.                       ERIAR_EXGMAC);
  414.             rtl_eri_write(tp, 0x1dc, ERIAR_MASK_1111, 0x00000005,
  415. @@ -1544,7 +1391,7 @@ static void rtl_link_chg_patch(struct rt
  416.                  ERIAR_EXGMAC);
  417.     } else if (tp->mac_version == RTL_GIGA_MAC_VER_35 ||
  418.            tp->mac_version == RTL_GIGA_MAC_VER_36) {
  419. -       if (RTL_R8(tp, PHYstatus) & _1000bpsF) {
  420. +       if (phydev->speed == SPEED_1000) {
  421.             rtl_eri_write(tp, 0x1bc, ERIAR_MASK_1111, 0x00000011,
  422.                       ERIAR_EXGMAC);
  423.             rtl_eri_write(tp, 0x1dc, ERIAR_MASK_1111, 0x00000005,
  424. @@ -1556,7 +1403,7 @@ static void rtl_link_chg_patch(struct rt
  425.                       ERIAR_EXGMAC);
  426.         }
  427.     } else if (tp->mac_version == RTL_GIGA_MAC_VER_37) {
  428. -       if (RTL_R8(tp, PHYstatus) & _10bps) {
  429. +       if (phydev->speed == SPEED_10) {
  430.             rtl_eri_write(tp, 0x1d0, ERIAR_MASK_0011, 0x4d02,
  431.                       ERIAR_EXGMAC);
  432.             rtl_eri_write(tp, 0x1dc, ERIAR_MASK_0011, 0x0060,
  433. @@ -1568,25 +1415,6 @@ static void rtl_link_chg_patch(struct rt
  434.     }
  435. }
  436.  
  437. -static void rtl8169_check_link_status(struct net_device *dev,
  438. -                     struct rtl8169_private *tp)
  439. -{
  440. -   struct device *d = tp_to_dev(tp);
  441. -
  442. -   if (tp->link_ok(tp)) {
  443. -       rtl_link_chg_patch(tp);
  444. -       /* This is to cancel a scheduled suspend if there's one. */
  445. -       pm_request_resume(d);
  446. -       netif_carrier_on(dev);
  447. -       if (net_ratelimit())
  448. -           netif_info(tp, ifup, dev, "link up\n");
  449. -   } else {
  450. -       netif_carrier_off(dev);
  451. -       netif_info(tp, ifdown, dev, "link down\n");
  452. -       pm_runtime_idle(d);
  453. -   }
  454. -}
  455. -
  456. #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
  457.  
  458. static u32 __rtl8169_get_wol(struct rtl8169_private *tp)
  459. @@ -1627,21 +1455,11 @@ static u32 __rtl8169_get_wol(struct rtl8
  460. static void rtl8169_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  461. {
  462.     struct rtl8169_private *tp = netdev_priv(dev);
  463. -   struct device *d = tp_to_dev(tp);
  464. -
  465. -   pm_runtime_get_noresume(d);
  466.  
  467.     rtl_lock_work(tp);
  468. -
  469.     wol->supported = WAKE_ANY;
  470. -   if (pm_runtime_active(d))
  471. -       wol->wolopts = __rtl8169_get_wol(tp);
  472. -   else
  473. -       wol->wolopts = tp->saved_wolopts;
  474. -
  475. +   wol->wolopts = tp->saved_wolopts;
  476.     rtl_unlock_work(tp);
  477. -
  478. -   pm_runtime_put_noidle(d);
  479. }
  480.  
  481. static void __rtl8169_set_wol(struct rtl8169_private *tp, u32 wolopts)
  482. @@ -1717,18 +1535,21 @@ static int rtl8169_set_wol(struct net_de
  483.     struct rtl8169_private *tp = netdev_priv(dev);
  484.     struct device *d = tp_to_dev(tp);
  485.  
  486. +   if (wol->wolopts & ~WAKE_ANY)
  487. +       return -EINVAL;
  488. +
  489.     pm_runtime_get_noresume(d);
  490.  
  491.     rtl_lock_work(tp);
  492.  
  493. +   tp->saved_wolopts = wol->wolopts;
  494. +
  495.     if (pm_runtime_active(d))
  496. -       __rtl8169_set_wol(tp, wol->wolopts);
  497. -   else
  498. -       tp->saved_wolopts = wol->wolopts;
  499. +       __rtl8169_set_wol(tp, tp->saved_wolopts);
  500.  
  501.     rtl_unlock_work(tp);
  502.  
  503. -   device_set_wakeup_enable(d, wol->wolopts);
  504. +   device_set_wakeup_enable(d, tp->saved_wolopts);
  505.  
  506.     pm_runtime_put_noidle(d);
  507.  
  508. @@ -1747,7 +1568,6 @@ static void rtl8169_get_drvinfo(struct n
  509.     struct rtl_fw *rtl_fw = tp->rtl_fw;
  510.  
  511.     strlcpy(info->driver, MODULENAME, sizeof(info->driver));
  512. -   strlcpy(info->version, RTL8169_VERSION, sizeof(info->version));
  513.     strlcpy(info->bus_info, pci_name(tp->pci_dev), sizeof(info->bus_info));
  514.     BUILD_BUG_ON(sizeof(info->fw_version) < sizeof(rtl_fw->version));
  515.     if (!IS_ERR_OR_NULL(rtl_fw))
  516. @@ -1760,124 +1580,6 @@ static int rtl8169_get_regs_len(struct n
  517.     return R8169_REGS_SIZE;
  518. }
  519.  
  520. -static int rtl8169_set_speed_tbi(struct net_device *dev,
  521. -                u8 autoneg, u16 speed, u8 duplex, u32 ignored)
  522. -{
  523. -   struct rtl8169_private *tp = netdev_priv(dev);
  524. -   int ret = 0;
  525. -   u32 reg;
  526. -
  527. -   reg = RTL_R32(tp, TBICSR);
  528. -   if ((autoneg == AUTONEG_DISABLE) && (speed == SPEED_1000) &&
  529. -       (duplex == DUPLEX_FULL)) {
  530. -       RTL_W32(tp, TBICSR, reg & ~(TBINwEnable | TBINwRestart));
  531. -   } else if (autoneg == AUTONEG_ENABLE)
  532. -       RTL_W32(tp, TBICSR, reg | TBINwEnable | TBINwRestart);
  533. -   else {
  534. -       netif_warn(tp, link, dev,
  535. -              "incorrect speed setting refused in TBI mode\n");
  536. -       ret = -EOPNOTSUPP;
  537. -   }
  538. -
  539. -   return ret;
  540. -}
  541. -
  542. -static int rtl8169_set_speed_xmii(struct net_device *dev,
  543. -                 u8 autoneg, u16 speed, u8 duplex, u32 adv)
  544. -{
  545. -   struct rtl8169_private *tp = netdev_priv(dev);
  546. -   int giga_ctrl, bmcr;
  547. -   int rc = -EINVAL;
  548. -
  549. -   rtl_writephy(tp, 0x1f, 0x0000);
  550. -
  551. -   if (autoneg == AUTONEG_ENABLE) {
  552. -       int auto_nego;
  553. -
  554. -       auto_nego = rtl_readphy(tp, MII_ADVERTISE);
  555. -       auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
  556. -               ADVERTISE_100HALF | ADVERTISE_100FULL);
  557. -
  558. -       if (adv & ADVERTISED_10baseT_Half)
  559. -           auto_nego |= ADVERTISE_10HALF;
  560. -       if (adv & ADVERTISED_10baseT_Full)
  561. -           auto_nego |= ADVERTISE_10FULL;
  562. -       if (adv & ADVERTISED_100baseT_Half)
  563. -           auto_nego |= ADVERTISE_100HALF;
  564. -       if (adv & ADVERTISED_100baseT_Full)
  565. -           auto_nego |= ADVERTISE_100FULL;
  566. -
  567. -       auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
  568. -
  569. -       giga_ctrl = rtl_readphy(tp, MII_CTRL1000);
  570. -       giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
  571. -
  572. -       /* The 8100e/8101e/8102e do Fast Ethernet only. */
  573. -       if (tp->mii.supports_gmii) {
  574. -           if (adv & ADVERTISED_1000baseT_Half)
  575. -               giga_ctrl |= ADVERTISE_1000HALF;
  576. -           if (adv & ADVERTISED_1000baseT_Full)
  577. -               giga_ctrl |= ADVERTISE_1000FULL;
  578. -       } else if (adv & (ADVERTISED_1000baseT_Half |
  579. -                 ADVERTISED_1000baseT_Full)) {
  580. -           netif_info(tp, link, dev,
  581. -                  "PHY does not support 1000Mbps\n");
  582. -           goto out;
  583. -       }
  584. -
  585. -       bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
  586. -
  587. -       rtl_writephy(tp, MII_ADVERTISE, auto_nego);
  588. -       rtl_writephy(tp, MII_CTRL1000, giga_ctrl);
  589. -   } else {
  590. -       if (speed == SPEED_10)
  591. -           bmcr = 0;
  592. -       else if (speed == SPEED_100)
  593. -           bmcr = BMCR_SPEED100;
  594. -       else
  595. -           goto out;
  596. -
  597. -       if (duplex == DUPLEX_FULL)
  598. -           bmcr |= BMCR_FULLDPLX;
  599. -   }
  600. -
  601. -   rtl_writephy(tp, MII_BMCR, bmcr);
  602. -
  603. -   if (tp->mac_version == RTL_GIGA_MAC_VER_02 ||
  604. -       tp->mac_version == RTL_GIGA_MAC_VER_03) {
  605. -       if ((speed == SPEED_100) && (autoneg != AUTONEG_ENABLE)) {
  606. -           rtl_writephy(tp, 0x17, 0x2138);
  607. -           rtl_writephy(tp, 0x0e, 0x0260);
  608. -       } else {
  609. -           rtl_writephy(tp, 0x17, 0x2108);
  610. -           rtl_writephy(tp, 0x0e, 0x0000);
  611. -       }
  612. -   }
  613. -
  614. -   rc = 0;
  615. -out:
  616. -   return rc;
  617. -}
  618. -
  619. -static int rtl8169_set_speed(struct net_device *dev,
  620. -                u8 autoneg, u16 speed, u8 duplex, u32 advertising)
  621. -{
  622. -   struct rtl8169_private *tp = netdev_priv(dev);
  623. -   int ret;
  624. -
  625. -   ret = tp->set_speed(dev, autoneg, speed, duplex, advertising);
  626. -   if (ret < 0)
  627. -       goto out;
  628. -
  629. -   if (netif_running(dev) && (autoneg == AUTONEG_ENABLE) &&
  630. -       (advertising & ADVERTISED_1000baseT_Full) &&
  631. -       !pci_is_pcie(tp->pci_dev)) {
  632. -       mod_timer(&tp->timer, jiffies + RTL8169_PHY_TIMEOUT);
  633. -   }
  634. -out:
  635. -   return ret;
  636. -}
  637. -
  638. static netdev_features_t rtl8169_fix_features(struct net_device *dev,
  639.     netdev_features_t features)
  640. {
  641. @@ -1941,76 +1643,6 @@ static void rtl8169_rx_vlan_tag(struct R
  642.         __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), swab16(opts2 & 0xffff));
  643. }
  644.  
  645. -static int rtl8169_get_link_ksettings_tbi(struct net_device *dev,
  646. -                     struct ethtool_link_ksettings *cmd)
  647. -{
  648. -   struct rtl8169_private *tp = netdev_priv(dev);
  649. -   u32 status;
  650. -   u32 supported, advertising;
  651. -
  652. -   supported =
  653. -       SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_FIBRE;
  654. -   cmd->base.port = PORT_FIBRE;
  655. -
  656. -   status = RTL_R32(tp, TBICSR);
  657. -   advertising = (status & TBINwEnable) ?  ADVERTISED_Autoneg : 0;
  658. -   cmd->base.autoneg = !!(status & TBINwEnable);
  659. -
  660. -   cmd->base.speed = SPEED_1000;
  661. -   cmd->base.duplex = DUPLEX_FULL; /* Always set */
  662. -
  663. -   ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
  664. -                       supported);
  665. -   ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
  666. -                       advertising);
  667. -
  668. -   return 0;
  669. -}
  670. -
  671. -static int rtl8169_get_link_ksettings_xmii(struct net_device *dev,
  672. -                      struct ethtool_link_ksettings *cmd)
  673. -{
  674. -   struct rtl8169_private *tp = netdev_priv(dev);
  675. -
  676. -   mii_ethtool_get_link_ksettings(&tp->mii, cmd);
  677. -
  678. -   return 0;
  679. -}
  680. -
  681. -static int rtl8169_get_link_ksettings(struct net_device *dev,
  682. -                     struct ethtool_link_ksettings *cmd)
  683. -{
  684. -   struct rtl8169_private *tp = netdev_priv(dev);
  685. -   int rc;
  686. -
  687. -   rtl_lock_work(tp);
  688. -   rc = tp->get_link_ksettings(dev, cmd);
  689. -   rtl_unlock_work(tp);
  690. -
  691. -   return rc;
  692. -}
  693. -
  694. -static int rtl8169_set_link_ksettings(struct net_device *dev,
  695. -                     const struct ethtool_link_ksettings *cmd)
  696. -{
  697. -   struct rtl8169_private *tp = netdev_priv(dev);
  698. -   int rc;
  699. -   u32 advertising;
  700. -
  701. -   if (!ethtool_convert_link_mode_to_legacy_u32(&advertising,
  702. -       cmd->link_modes.advertising))
  703. -       return -EINVAL;
  704. -
  705. -   del_timer_sync(&tp->timer);
  706. -
  707. -   rtl_lock_work(tp);
  708. -   rc = rtl8169_set_speed(dev, cmd->base.autoneg, cmd->base.speed,
  709. -                  cmd->base.duplex, advertising);
  710. -   rtl_unlock_work(tp);
  711. -
  712. -   return rc;
  713. -}
  714. -
  715. static void rtl8169_get_regs(struct net_device *dev, struct ethtool_regs *regs,
  716.                  void *p)
  717. {
  718. @@ -2186,13 +1818,6 @@ static void rtl8169_get_strings(struct n
  719.     }
  720. }
  721.  
  722. -static int rtl8169_nway_reset(struct net_device *dev)
  723. -{
  724. -   struct rtl8169_private *tp = netdev_priv(dev);
  725. -
  726. -   return mii_nway_restart(&tp->mii);
  727. -}
  728. -
  729. /*
  730.  * Interrupt coalescing
  731.  *
  732. @@ -2265,7 +1890,7 @@ static const struct rtl_coalesce_info *r
  733.     const struct rtl_coalesce_info *ci;
  734.     int rc;
  735.  
  736. -   rc = rtl8169_get_link_ksettings(dev, &ecmd);
  737. +   rc = phy_ethtool_get_link_ksettings(dev, &ecmd);
  738.     if (rc < 0)
  739.         return ERR_PTR(rc);
  740.  
  741. @@ -2423,9 +2048,9 @@ static const struct ethtool_ops rtl8169_
  742.     .get_sset_count     = rtl8169_get_sset_count,
  743.     .get_ethtool_stats  = rtl8169_get_ethtool_stats,
  744.     .get_ts_info        = ethtool_op_get_ts_info,
  745. -   .nway_reset     = rtl8169_nway_reset,
  746. -   .get_link_ksettings = rtl8169_get_link_ksettings,
  747. -   .set_link_ksettings = rtl8169_set_link_ksettings,
  748. +   .nway_reset     = phy_ethtool_nway_reset,
  749. +   .get_link_ksettings = phy_ethtool_get_link_ksettings,
  750. +   .set_link_ksettings = phy_ethtool_set_link_ksettings,
  751. };
  752.  
  753. static void rtl8169_get_mac_version(struct rtl8169_private *tp,
  754. @@ -2538,15 +2163,15 @@ static void rtl8169_get_mac_version(stru
  755.                "unknown MAC, using family default\n");
  756.         tp->mac_version = default_version;
  757.     } else if (tp->mac_version == RTL_GIGA_MAC_VER_42) {
  758. -       tp->mac_version = tp->mii.supports_gmii ?
  759. +       tp->mac_version = tp->supports_gmii ?
  760.                   RTL_GIGA_MAC_VER_42 :
  761.                   RTL_GIGA_MAC_VER_43;
  762.     } else if (tp->mac_version == RTL_GIGA_MAC_VER_45) {
  763. -       tp->mac_version = tp->mii.supports_gmii ?
  764. +       tp->mac_version = tp->supports_gmii ?
  765.                   RTL_GIGA_MAC_VER_45 :
  766.                   RTL_GIGA_MAC_VER_47;
  767.     } else if (tp->mac_version == RTL_GIGA_MAC_VER_46) {
  768. -       tp->mac_version = tp->mii.supports_gmii ?
  769. +       tp->mac_version = tp->supports_gmii ?
  770.                   RTL_GIGA_MAC_VER_46 :
  771.                   RTL_GIGA_MAC_VER_48;
  772.     }
  773. @@ -2554,7 +2179,7 @@ static void rtl8169_get_mac_version(stru
  774.  
  775. static void rtl8169_print_mac_version(struct rtl8169_private *tp)
  776. {
  777. -   dprintk("mac_version = 0x%02x\n", tp->mac_version);
  778. +   netif_dbg(tp, drv, tp->dev, "mac_version = 0x%02x\n", tp->mac_version);
  779. }
  780.  
  781. struct phy_reg {
  782. @@ -4406,62 +4031,16 @@ static void rtl_hw_phy_config(struct net
  783.     }
  784. }
  785.  
  786. -static void rtl_phy_work(struct rtl8169_private *tp)
  787. -{
  788. -   struct timer_list *timer = &tp->timer;
  789. -   unsigned long timeout = RTL8169_PHY_TIMEOUT;
  790. -
  791. -   assert(tp->mac_version > RTL_GIGA_MAC_VER_01);
  792. -
  793. -   if (tp->phy_reset_pending(tp)) {
  794. -       /*
  795. -        * A busy loop could burn quite a few cycles on nowadays CPU.
  796. -        * Let's delay the execution of the timer for a few ticks.
  797. -        */
  798. -       timeout = HZ/10;
  799. -       goto out_mod_timer;
  800. -   }
  801. -
  802. -   if (tp->link_ok(tp))
  803. -       return;
  804. -
  805. -   netif_dbg(tp, link, tp->dev, "PHY reset until link up\n");
  806. -
  807. -   tp->phy_reset_enable(tp);
  808. -
  809. -out_mod_timer:
  810. -   mod_timer(timer, jiffies + timeout);
  811. -}
  812. -
  813. static void rtl_schedule_task(struct rtl8169_private *tp, enum rtl_flag flag)
  814. {
  815.     if (!test_and_set_bit(flag, tp->wk.flags))
  816.         schedule_work(&tp->wk.work);
  817. }
  818.  
  819. -static void rtl8169_phy_timer(struct timer_list *t)
  820. -{
  821. -   struct rtl8169_private *tp = from_timer(tp, t, timer);
  822. -
  823. -   rtl_schedule_task(tp, RTL_FLAG_TASK_PHY_PENDING);
  824. -}
  825. -
  826. -DECLARE_RTL_COND(rtl_phy_reset_cond)
  827. -{
  828. -   return tp->phy_reset_pending(tp);
  829. -}
  830. -
  831. -static void rtl8169_phy_reset(struct net_device *dev,
  832. -                 struct rtl8169_private *tp)
  833. -{
  834. -   tp->phy_reset_enable(tp);
  835. -   rtl_msleep_loop_wait_low(tp, &rtl_phy_reset_cond, 1, 100);
  836. -}
  837. -
  838. static bool rtl_tbi_enabled(struct rtl8169_private *tp)
  839. {
  840.     return (tp->mac_version == RTL_GIGA_MAC_VER_01) &&
  841. -       (RTL_R8(tp, PHYstatus) & TBI_Enable);
  842. +          (RTL_R8(tp, PHYstatus) & TBI_Enable);
  843. }
  844.  
  845. static void rtl8169_init_phy(struct net_device *dev, struct rtl8169_private *tp)
  846. @@ -4469,7 +4048,8 @@ static void rtl8169_init_phy(struct net_
  847.     rtl_hw_phy_config(dev);
  848.  
  849.     if (tp->mac_version <= RTL_GIGA_MAC_VER_06) {
  850. -       dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
  851. +       netif_dbg(tp, drv, dev,
  852. +             "Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
  853.         RTL_W8(tp, 0x82, 0x01);
  854.     }
  855.  
  856. @@ -4479,23 +4059,26 @@ static void rtl8169_init_phy(struct net_
  857.         pci_write_config_byte(tp->pci_dev, PCI_CACHE_LINE_SIZE, 0x08);
  858.  
  859.     if (tp->mac_version == RTL_GIGA_MAC_VER_02) {
  860. -       dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
  861. +       netif_dbg(tp, drv, dev,
  862. +             "Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
  863.         RTL_W8(tp, 0x82, 0x01);
  864. -       dprintk("Set PHY Reg 0x0bh = 0x00h\n");
  865. +       netif_dbg(tp, drv, dev,
  866. +             "Set PHY Reg 0x0bh = 0x00h\n");
  867.         rtl_writephy(tp, 0x0b, 0x0000); //w 0x0b 15 0 0
  868.     }
  869.  
  870. -   rtl8169_phy_reset(dev, tp);
  871. +   /* We may have called phy_speed_down before */
  872. +   phy_speed_up(dev->phydev);
  873.  
  874. -   rtl8169_set_speed(dev, AUTONEG_ENABLE, SPEED_1000, DUPLEX_FULL,
  875. -             ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |
  876. -             ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full |
  877. -             (tp->mii.supports_gmii ?
  878. -              ADVERTISED_1000baseT_Half |
  879. -              ADVERTISED_1000baseT_Full : 0));
  880. +   genphy_soft_reset(dev->phydev);
  881.  
  882. -   if (rtl_tbi_enabled(tp))
  883. -       netif_info(tp, link, dev, "TBI auto-negotiating\n");
  884. +   /* It was reported that several chips end up with 10MBit/Half on a
  885. +    * 1GBit link after resuming from S3. For whatever reason the PHY on
  886. +    * these chips doesn't properly start a renegotiation when soft-reset.
  887. +    * Explicitly requesting a renegotiation fixes this.
  888. +    */
  889. +   if (dev->phydev->autoneg == AUTONEG_ENABLE)
  890. +       phy_restart_aneg(dev->phydev);
  891. }
  892.  
  893. static void rtl_rar_set(struct rtl8169_private *tp, u8 *addr)
  894. @@ -4540,34 +4123,10 @@ static int rtl_set_mac_address(struct ne
  895.  
  896. static int rtl8169_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  897. {
  898. -   struct rtl8169_private *tp = netdev_priv(dev);
  899. -   struct mii_ioctl_data *data = if_mii(ifr);
  900. -
  901. -   return netif_running(dev) ? tp->do_ioctl(tp, data, cmd) : -ENODEV;
  902. -}
  903. -
  904. -static int rtl_xmii_ioctl(struct rtl8169_private *tp,
  905. -             struct mii_ioctl_data *data, int cmd)
  906. -{
  907. -   switch (cmd) {
  908. -   case SIOCGMIIPHY:
  909. -       data->phy_id = 32; /* Internal PHY */
  910. -       return 0;
  911. -
  912. -   case SIOCGMIIREG:
  913. -       data->val_out = rtl_readphy(tp, data->reg_num & 0x1f);
  914. -       return 0;
  915. -
  916. -   case SIOCSMIIREG:
  917. -       rtl_writephy(tp, data->reg_num & 0x1f, data->val_in);
  918. -       return 0;
  919. -   }
  920. -   return -EOPNOTSUPP;
  921. -}
  922. +   if (!netif_running(dev))
  923. +       return -ENODEV;
  924.  
  925. -static int rtl_tbi_ioctl(struct rtl8169_private *tp, struct mii_ioctl_data *data, int cmd)
  926. -{
  927. -   return -EOPNOTSUPP;
  928. +   return phy_mii_ioctl(dev->phydev, ifr, cmd);
  929. }
  930.  
  931. static void rtl_init_mdio_ops(struct rtl8169_private *tp)
  932. @@ -4595,30 +4154,6 @@ static void rtl_init_mdio_ops(struct rtl
  933.     }
  934. }
  935.  
  936. -static void rtl_speed_down(struct rtl8169_private *tp)
  937. -{
  938. -   u32 adv;
  939. -   int lpa;
  940. -
  941. -   rtl_writephy(tp, 0x1f, 0x0000);
  942. -   lpa = rtl_readphy(tp, MII_LPA);
  943. -
  944. -   if (lpa & (LPA_10HALF | LPA_10FULL))
  945. -       adv = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
  946. -   else if (lpa & (LPA_100HALF | LPA_100FULL))
  947. -       adv = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |
  948. -             ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
  949. -   else
  950. -       adv = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |
  951. -             ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full |
  952. -             (tp->mii.supports_gmii ?
  953. -              ADVERTISED_1000baseT_Half |
  954. -              ADVERTISED_1000baseT_Full : 0);
  955. -
  956. -   rtl8169_set_speed(tp->dev, AUTONEG_ENABLE, SPEED_1000, DUPLEX_FULL,
  957. -             adv);
  958. -}
  959. -
  960. static void rtl_wol_suspend_quirk(struct rtl8169_private *tp)
  961. {
  962.     switch (tp->mac_version) {
  963. @@ -4640,56 +4175,20 @@ static void rtl_wol_suspend_quirk(struct
  964.  
  965. static bool rtl_wol_pll_power_down(struct rtl8169_private *tp)
  966. {
  967. -   if (!(__rtl8169_get_wol(tp) & WAKE_ANY))
  968. +   struct phy_device *phydev;
  969. +
  970. +   if (!__rtl8169_get_wol(tp))
  971.         return false;
  972.  
  973. -   rtl_speed_down(tp);
  974. +   /* phydev may not be attached to netdevice */
  975. +   phydev = mdiobus_get_phy(tp->mii_bus, 0);
  976. +
  977. +   phy_speed_down(phydev, false);
  978.     rtl_wol_suspend_quirk(tp);
  979.  
  980.     return true;
  981. }
  982.  
  983. -static void r8168_phy_power_up(struct rtl8169_private *tp)
  984. -{
  985. -   rtl_writephy(tp, 0x1f, 0x0000);
  986. -   switch (tp->mac_version) {
  987. -   case RTL_GIGA_MAC_VER_11:
  988. -   case RTL_GIGA_MAC_VER_12:
  989. -   case RTL_GIGA_MAC_VER_17 ... RTL_GIGA_MAC_VER_28:
  990. -   case RTL_GIGA_MAC_VER_31:
  991. -       rtl_writephy(tp, 0x0e, 0x0000);
  992. -       break;
  993. -   default:
  994. -       break;
  995. -   }
  996. -   rtl_writephy(tp, MII_BMCR, BMCR_ANENABLE);
  997. -
  998. -   /* give MAC/PHY some time to resume */
  999. -   msleep(20);
  1000. -}
  1001. -
  1002. -static void r8168_phy_power_down(struct rtl8169_private *tp)
  1003. -{
  1004. -   rtl_writephy(tp, 0x1f, 0x0000);
  1005. -   switch (tp->mac_version) {
  1006. -   case RTL_GIGA_MAC_VER_32:
  1007. -   case RTL_GIGA_MAC_VER_33:
  1008. -   case RTL_GIGA_MAC_VER_40:
  1009. -   case RTL_GIGA_MAC_VER_41:
  1010. -       rtl_writephy(tp, MII_BMCR, BMCR_ANENABLE | BMCR_PDOWN);
  1011. -       break;
  1012. -
  1013. -   case RTL_GIGA_MAC_VER_11:
  1014. -   case RTL_GIGA_MAC_VER_12:
  1015. -   case RTL_GIGA_MAC_VER_17 ... RTL_GIGA_MAC_VER_28:
  1016. -   case RTL_GIGA_MAC_VER_31:
  1017. -       rtl_writephy(tp, 0x0e, 0x0200);
  1018. -   default:
  1019. -       rtl_writephy(tp, MII_BMCR, BMCR_PDOWN);
  1020. -       break;
  1021. -   }
  1022. -}
  1023. -
  1024. static void r8168_pll_power_down(struct rtl8169_private *tp)
  1025. {
  1026.     if (r8168_check_dash(tp))
  1027. @@ -4702,8 +4201,6 @@ static void r8168_pll_power_down(struct
  1028.     if (rtl_wol_pll_power_down(tp))
  1029.         return;
  1030.  
  1031. -   r8168_phy_power_down(tp);
  1032. -
  1033.     switch (tp->mac_version) {
  1034.     case RTL_GIGA_MAC_VER_25 ... RTL_GIGA_MAC_VER_33:
  1035.     case RTL_GIGA_MAC_VER_37:
  1036. @@ -4755,7 +4252,9 @@ static void r8168_pll_power_up(struct rt
  1037.         break;
  1038.     }
  1039.  
  1040. -   r8168_phy_power_up(tp);
  1041. +   phy_resume(tp->dev->phydev);
  1042. +   /* give MAC/PHY some time to resume */
  1043. +   msleep(20);
  1044. }
  1045.  
  1046. static void rtl_pll_power_down(struct rtl8169_private *tp)
  1047. @@ -5180,8 +4679,8 @@ static void rtl_hw_start_8169(struct rtl
  1048.  
  1049.     if (tp->mac_version == RTL_GIGA_MAC_VER_02 ||
  1050.         tp->mac_version == RTL_GIGA_MAC_VER_03) {
  1051. -       dprintk("Set MAC Reg C+CR Offset 0xe0. "
  1052. -           "Bit-3 and bit-14 MUST be 1\n");
  1053. +       netif_dbg(tp, drv, tp->dev,
  1054. +             "Set MAC Reg C+CR Offset 0xe0. Bit 3 and Bit 14 MUST be 1\n");
  1055.         tp->cp_cmd |= (1 << 14);
  1056.     }
  1057.  
  1058. @@ -5244,12 +4743,7 @@ static void rtl_csi_access_enable(struct
  1059.     rtl_csi_write(tp, 0x070c, csi | val << 24);
  1060. }
  1061.  
  1062. -static void rtl_csi_access_enable_1(struct rtl8169_private *tp)
  1063. -{
  1064. -   rtl_csi_access_enable(tp, 0x17);
  1065. -}
  1066. -
  1067. -static void rtl_csi_access_enable_2(struct rtl8169_private *tp)
  1068. +static void rtl_set_def_aspm_entry_latency(struct rtl8169_private *tp)
  1069. {
  1070.     rtl_csi_access_enable(tp, 0x27);
  1071. }
  1072. @@ -5298,6 +4792,19 @@ static void rtl_pcie_state_l2l3_enable(s
  1073.     RTL_W8(tp, Config3, data);
  1074. }
  1075.  
  1076. +static void rtl_hw_aspm_clkreq_enable(struct rtl8169_private *tp, bool enable)
  1077. +{
  1078. +   if (enable) {
  1079. +       RTL_W8(tp, Config5, RTL_R8(tp, Config5) | ASPM_en);
  1080. +       RTL_W8(tp, Config2, RTL_R8(tp, Config2) | ClkReqEn);
  1081. +   } else {
  1082. +       RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~ClkReqEn);
  1083. +       RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~ASPM_en);
  1084. +   }
  1085. +
  1086. +   udelay(10);
  1087. +}
  1088. +
  1089. static void rtl_hw_start_8168bb(struct rtl8169_private *tp)
  1090. {
  1091.     RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
  1092. @@ -5345,7 +4852,7 @@ static void rtl_hw_start_8168cp_1(struct
  1093.         { 0x07, 0,  0x2000 }
  1094.     };
  1095.  
  1096. -   rtl_csi_access_enable_2(tp);
  1097. +   rtl_set_def_aspm_entry_latency(tp);
  1098.  
  1099.     rtl_ephy_init(tp, e_info_8168cp, ARRAY_SIZE(e_info_8168cp));
  1100.  
  1101. @@ -5354,7 +4861,7 @@ static void rtl_hw_start_8168cp_1(struct
  1102.  
  1103. static void rtl_hw_start_8168cp_2(struct rtl8169_private *tp)
  1104. {
  1105. -   rtl_csi_access_enable_2(tp);
  1106. +   rtl_set_def_aspm_entry_latency(tp);
  1107.  
  1108.     RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
  1109.  
  1110. @@ -5367,7 +4874,7 @@ static void rtl_hw_start_8168cp_2(struct
  1111.  
  1112. static void rtl_hw_start_8168cp_3(struct rtl8169_private *tp)
  1113. {
  1114. -   rtl_csi_access_enable_2(tp);
  1115. +   rtl_set_def_aspm_entry_latency(tp);
  1116.  
  1117.     RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
  1118.  
  1119. @@ -5391,7 +4898,7 @@ static void rtl_hw_start_8168c_1(struct
  1120.         { 0x06, 0x0080, 0x0000 }
  1121.     };
  1122.  
  1123. -   rtl_csi_access_enable_2(tp);
  1124. +   rtl_set_def_aspm_entry_latency(tp);
  1125.  
  1126.     RTL_W8(tp, DBG_REG, 0x06 | FIX_NAK_1 | FIX_NAK_2);
  1127.  
  1128. @@ -5407,7 +4914,7 @@ static void rtl_hw_start_8168c_2(struct
  1129.         { 0x03, 0x0400, 0x0220 }
  1130.     };
  1131.  
  1132. -   rtl_csi_access_enable_2(tp);
  1133. +   rtl_set_def_aspm_entry_latency(tp);
  1134.  
  1135.     rtl_ephy_init(tp, e_info_8168c_2, ARRAY_SIZE(e_info_8168c_2));
  1136.  
  1137. @@ -5421,14 +4928,14 @@ static void rtl_hw_start_8168c_3(struct
  1138.  
  1139. static void rtl_hw_start_8168c_4(struct rtl8169_private *tp)
  1140. {
  1141. -   rtl_csi_access_enable_2(tp);
  1142. +   rtl_set_def_aspm_entry_latency(tp);
  1143.  
  1144.     __rtl_hw_start_8168cp(tp);
  1145. }
  1146.  
  1147. static void rtl_hw_start_8168d(struct rtl8169_private *tp)
  1148. {
  1149. -   rtl_csi_access_enable_2(tp);
  1150. +   rtl_set_def_aspm_entry_latency(tp);
  1151.  
  1152.     rtl_disable_clock_request(tp);
  1153.  
  1154. @@ -5443,7 +4950,7 @@ static void rtl_hw_start_8168d(struct rt
  1155.  
  1156. static void rtl_hw_start_8168dp(struct rtl8169_private *tp)
  1157. {
  1158. -   rtl_csi_access_enable_1(tp);
  1159. +   rtl_set_def_aspm_entry_latency(tp);
  1160.  
  1161.     if (tp->dev->mtu <= ETH_DATA_LEN)
  1162.         rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
  1163. @@ -5461,7 +4968,7 @@ static void rtl_hw_start_8168d_4(struct
  1164.         { 0x0c, 0x0100, 0x0020 }
  1165.     };
  1166.  
  1167. -   rtl_csi_access_enable_1(tp);
  1168. +   rtl_set_def_aspm_entry_latency(tp);
  1169.  
  1170.     rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
  1171.  
  1172. @@ -5490,7 +4997,7 @@ static void rtl_hw_start_8168e_1(struct
  1173.         { 0x0a, 0x0000, 0x0040 }
  1174.     };
  1175.  
  1176. -   rtl_csi_access_enable_2(tp);
  1177. +   rtl_set_def_aspm_entry_latency(tp);
  1178.  
  1179.     rtl_ephy_init(tp, e_info_8168e_1, ARRAY_SIZE(e_info_8168e_1));
  1180.  
  1181. @@ -5515,7 +5022,7 @@ static void rtl_hw_start_8168e_2(struct
  1182.         { 0x19, 0x0000, 0x0224 }
  1183.     };
  1184.  
  1185. -   rtl_csi_access_enable_1(tp);
  1186. +   rtl_set_def_aspm_entry_latency(tp);
  1187.  
  1188.     rtl_ephy_init(tp, e_info_8168e_2, ARRAY_SIZE(e_info_8168e_2));
  1189.  
  1190. @@ -5543,11 +5050,13 @@ static void rtl_hw_start_8168e_2(struct
  1191.     RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) | PFM_EN);
  1192.     RTL_W32(tp, MISC, RTL_R32(tp, MISC) | PWM_EN);
  1193.     RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~Spi_en);
  1194. +
  1195. +   rtl_hw_aspm_clkreq_enable(tp, true);
  1196. }
  1197.  
  1198. static void rtl_hw_start_8168f(struct rtl8169_private *tp)
  1199. {
  1200. -   rtl_csi_access_enable_2(tp);
  1201. +   rtl_set_def_aspm_entry_latency(tp);
  1202.  
  1203.     rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
  1204.  
  1205. @@ -5615,7 +5124,7 @@ static void rtl_hw_start_8168g(struct rt
  1206.     rtl_eri_write(tp, 0xd0, ERIAR_MASK_0001, 0x48, ERIAR_EXGMAC);
  1207.     rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006, ERIAR_EXGMAC);
  1208.  
  1209. -   rtl_csi_access_enable_1(tp);
  1210. +   rtl_set_def_aspm_entry_latency(tp);
  1211.  
  1212.     rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
  1213.  
  1214. @@ -5650,9 +5159,9 @@ static void rtl_hw_start_8168g_1(struct
  1215.     rtl_hw_start_8168g(tp);
  1216.  
  1217.     /* disable aspm and clock request before access ephy */
  1218. -   RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~ClkReqEn);
  1219. -   RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~ASPM_en);
  1220. +   rtl_hw_aspm_clkreq_enable(tp, false);
  1221.     rtl_ephy_init(tp, e_info_8168g_1, ARRAY_SIZE(e_info_8168g_1));
  1222. +   rtl_hw_aspm_clkreq_enable(tp, true);
  1223. }
  1224.  
  1225. static void rtl_hw_start_8168g_2(struct rtl8169_private *tp)
  1226. @@ -5685,9 +5194,9 @@ static void rtl_hw_start_8411_2(struct r
  1227.     rtl_hw_start_8168g(tp);
  1228.  
  1229.     /* disable aspm and clock request before access ephy */
  1230. -   RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~ClkReqEn);
  1231. -   RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~ASPM_en);
  1232. +   rtl_hw_aspm_clkreq_enable(tp, false);
  1233.     rtl_ephy_init(tp, e_info_8411_2, ARRAY_SIZE(e_info_8411_2));
  1234. +   rtl_hw_aspm_clkreq_enable(tp, true);
  1235. }
  1236.  
  1237. static void rtl_hw_start_8168h_1(struct rtl8169_private *tp)
  1238. @@ -5704,8 +5213,7 @@ static void rtl_hw_start_8168h_1(struct
  1239.     };
  1240.  
  1241.     /* disable aspm and clock request before access ephy */
  1242. -   RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~ClkReqEn);
  1243. -   RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~ASPM_en);
  1244. +   rtl_hw_aspm_clkreq_enable(tp, false);
  1245.     rtl_ephy_init(tp, e_info_8168h_1, ARRAY_SIZE(e_info_8168h_1));
  1246.  
  1247.     rtl_eri_write(tp, 0xc8, ERIAR_MASK_0101, 0x00080002, ERIAR_EXGMAC);
  1248. @@ -5713,7 +5221,7 @@ static void rtl_hw_start_8168h_1(struct
  1249.     rtl_eri_write(tp, 0xd0, ERIAR_MASK_0001, 0x48, ERIAR_EXGMAC);
  1250.     rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006, ERIAR_EXGMAC);
  1251.  
  1252. -   rtl_csi_access_enable_1(tp);
  1253. +   rtl_set_def_aspm_entry_latency(tp);
  1254.  
  1255.     rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
  1256.  
  1257. @@ -5782,6 +5290,8 @@ static void rtl_hw_start_8168h_1(struct
  1258.     r8168_mac_ocp_write(tp, 0xe63e, 0x0000);
  1259.     r8168_mac_ocp_write(tp, 0xc094, 0x0000);
  1260.     r8168_mac_ocp_write(tp, 0xc09e, 0x0000);
  1261. +
  1262. +   rtl_hw_aspm_clkreq_enable(tp, true);
  1263. }
  1264.  
  1265. static void rtl_hw_start_8168ep(struct rtl8169_private *tp)
  1266. @@ -5793,7 +5303,7 @@ static void rtl_hw_start_8168ep(struct r
  1267.     rtl_eri_write(tp, 0xd0, ERIAR_MASK_0001, 0x5f, ERIAR_EXGMAC);
  1268.     rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006, ERIAR_EXGMAC);
  1269.  
  1270. -   rtl_csi_access_enable_1(tp);
  1271. +   rtl_set_def_aspm_entry_latency(tp);
  1272.  
  1273.     rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
  1274.  
  1275. @@ -5831,11 +5341,12 @@ static void rtl_hw_start_8168ep_1(struct
  1276.     };
  1277.  
  1278.     /* disable aspm and clock request before access ephy */
  1279. -   RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~ClkReqEn);
  1280. -   RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~ASPM_en);
  1281. +   rtl_hw_aspm_clkreq_enable(tp, false);
  1282.     rtl_ephy_init(tp, e_info_8168ep_1, ARRAY_SIZE(e_info_8168ep_1));
  1283.  
  1284.     rtl_hw_start_8168ep(tp);
  1285. +
  1286. +   rtl_hw_aspm_clkreq_enable(tp, true);
  1287. }
  1288.  
  1289. static void rtl_hw_start_8168ep_2(struct rtl8169_private *tp)
  1290. @@ -5847,14 +5358,15 @@ static void rtl_hw_start_8168ep_2(struct
  1291.     };
  1292.  
  1293.     /* disable aspm and clock request before access ephy */
  1294. -   RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~ClkReqEn);
  1295. -   RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~ASPM_en);
  1296. +   rtl_hw_aspm_clkreq_enable(tp, false);
  1297.     rtl_ephy_init(tp, e_info_8168ep_2, ARRAY_SIZE(e_info_8168ep_2));
  1298.  
  1299.     rtl_hw_start_8168ep(tp);
  1300.  
  1301.     RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) & ~PFM_EN);
  1302.     RTL_W8(tp, MISC_1, RTL_R8(tp, MISC_1) & ~PFM_D3COLD_EN);
  1303. +
  1304. +   rtl_hw_aspm_clkreq_enable(tp, true);
  1305. }
  1306.  
  1307. static void rtl_hw_start_8168ep_3(struct rtl8169_private *tp)
  1308. @@ -5868,8 +5380,7 @@ static void rtl_hw_start_8168ep_3(struct
  1309.     };
  1310.  
  1311.     /* disable aspm and clock request before access ephy */
  1312. -   RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~ClkReqEn);
  1313. -   RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~ASPM_en);
  1314. +   rtl_hw_aspm_clkreq_enable(tp, false);
  1315.     rtl_ephy_init(tp, e_info_8168ep_3, ARRAY_SIZE(e_info_8168ep_3));
  1316.  
  1317.     rtl_hw_start_8168ep(tp);
  1318. @@ -5889,6 +5400,8 @@ static void rtl_hw_start_8168ep_3(struct
  1319.     data = r8168_mac_ocp_read(tp, 0xe860);
  1320.     data |= 0x0080;
  1321.     r8168_mac_ocp_write(tp, 0xe860, data);
  1322. +
  1323. +   rtl_hw_aspm_clkreq_enable(tp, true);
  1324. }
  1325.  
  1326. static void rtl_hw_start_8168(struct rtl8169_private *tp)
  1327. @@ -6006,8 +5519,9 @@ static void rtl_hw_start_8168(struct rtl
  1328.         break;
  1329.  
  1330.     default:
  1331. -       printk(KERN_ERR PFX "%s: unknown chipset (mac_version = %d).\n",
  1332. -              tp->dev->name, tp->mac_version);
  1333. +       netif_err(tp, drv, tp->dev,
  1334. +             "unknown chipset (mac_version = %d)\n",
  1335. +             tp->mac_version);
  1336.         break;
  1337.     }
  1338. }
  1339. @@ -6026,7 +5540,7 @@ static void rtl_hw_start_8102e_1(struct
  1340.     };
  1341.     u8 cfg1;
  1342.  
  1343. -   rtl_csi_access_enable_2(tp);
  1344. +   rtl_set_def_aspm_entry_latency(tp);
  1345.  
  1346.     RTL_W8(tp, DBG_REG, FIX_NAK_1);
  1347.  
  1348. @@ -6045,7 +5559,7 @@ static void rtl_hw_start_8102e_1(struct
  1349.  
  1350. static void rtl_hw_start_8102e_2(struct rtl8169_private *tp)
  1351. {
  1352. -   rtl_csi_access_enable_2(tp);
  1353. +   rtl_set_def_aspm_entry_latency(tp);
  1354.  
  1355.     rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
  1356.  
  1357. @@ -6100,7 +5614,7 @@ static void rtl_hw_start_8402(struct rtl
  1358.         { 0x1e, 0, 0x4000 }
  1359.     };
  1360.  
  1361. -   rtl_csi_access_enable_2(tp);
  1362. +   rtl_set_def_aspm_entry_latency(tp);
  1363.  
  1364.     /* Force LAN exit from ASPM if Rx/Tx are not idle */
  1365.     RTL_W32(tp, FuncEvent, RTL_R32(tp, FuncEvent) | 0x002800);
  1366. @@ -6124,6 +5638,8 @@ static void rtl_hw_start_8402(struct rtl
  1367.  
  1368. static void rtl_hw_start_8106(struct rtl8169_private *tp)
  1369. {
  1370. +   rtl_hw_aspm_clkreq_enable(tp, false);
  1371. +
  1372.     /* Force LAN exit from ASPM if Rx/Tx are not idle */
  1373.     RTL_W32(tp, FuncEvent, RTL_R32(tp, FuncEvent) | 0x002800);
  1374.  
  1375. @@ -6132,6 +5648,7 @@ static void rtl_hw_start_8106(struct rtl
  1376.     RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) & ~PFM_EN);
  1377.  
  1378.     rtl_pcie_state_l2l3_enable(tp, false);
  1379. +   rtl_hw_aspm_clkreq_enable(tp, true);
  1380. }
  1381.  
  1382. static void rtl_hw_start_8101(struct rtl8169_private *tp)
  1383. @@ -6383,7 +5900,6 @@ static void rtl_reset_work(struct rtl816
  1384.     napi_enable(&tp->napi);
  1385.     rtl_hw_start(tp);
  1386.     netif_wake_queue(dev);
  1387. -   rtl8169_check_link_status(dev, tp);
  1388. }
  1389.  
  1390. static void rtl8169_tx_timeout(struct net_device *dev)
  1391. @@ -6957,20 +6473,15 @@ release_descriptor:
  1392. static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance)
  1393. {
  1394.     struct rtl8169_private *tp = dev_instance;
  1395. -   int handled = 0;
  1396. -   u16 status;
  1397. +   u16 status = rtl_get_events(tp);
  1398.  
  1399. -   status = rtl_get_events(tp);
  1400. -   if (status && status != 0xffff) {
  1401. -       status &= RTL_EVENT_NAPI | tp->event_slow;
  1402. -       if (status) {
  1403. -           handled = 1;
  1404. +   if (status == 0xffff || !(status & (RTL_EVENT_NAPI | tp->event_slow)))
  1405. +       return IRQ_NONE;
  1406.  
  1407. -           rtl_irq_disable(tp);
  1408. -           napi_schedule_irqoff(&tp->napi);
  1409. -       }
  1410. -   }
  1411. -   return IRQ_RETVAL(handled);
  1412. +   rtl_irq_disable(tp);
  1413. +   napi_schedule_irqoff(&tp->napi);
  1414. +
  1415. +   return IRQ_HANDLED;
  1416. }
  1417.  
  1418. /*
  1419. @@ -7000,7 +6511,7 @@ static void rtl_slow_event_work(struct r
  1420.         rtl8169_pcierr_interrupt(dev);
  1421.  
  1422.     if (status & LinkChg)
  1423. -       rtl8169_check_link_status(dev, tp);
  1424. +       phy_mac_interrupt(dev->phydev);
  1425.  
  1426.     rtl_irq_enable_all(tp);
  1427. }
  1428. @@ -7014,7 +6525,6 @@ static void rtl_task(struct work_struct
  1429.         /* XXX - keep rtl_slow_event_work() as first element. */
  1430.         { RTL_FLAG_TASK_SLOW_PENDING,   rtl_slow_event_work },
  1431.         { RTL_FLAG_TASK_RESET_PENDING,  rtl_reset_work },
  1432. -       { RTL_FLAG_TASK_PHY_PENDING,    rtl_phy_work }
  1433.     };
  1434.     struct rtl8169_private *tp =
  1435.         container_of(work, struct rtl8169_private, wk.work);
  1436. @@ -7081,11 +6591,51 @@ static void rtl8169_rx_missed(struct net
  1437.     RTL_W32(tp, RxMissed, 0);
  1438. }
  1439.  
  1440. +static void r8169_phylink_handler(struct net_device *ndev)
  1441. +{
  1442. +   struct rtl8169_private *tp = netdev_priv(ndev);
  1443. +
  1444. +   if (netif_carrier_ok(ndev)) {
  1445. +       rtl_link_chg_patch(tp);
  1446. +       pm_request_resume(&tp->pci_dev->dev);
  1447. +   } else {
  1448. +       pm_runtime_idle(&tp->pci_dev->dev);
  1449. +   }
  1450. +
  1451. +   if (net_ratelimit())
  1452. +       phy_print_status(ndev->phydev);
  1453. +}
  1454. +
  1455. +static int r8169_phy_connect(struct rtl8169_private *tp)
  1456. +{
  1457. +   struct phy_device *phydev = mdiobus_get_phy(tp->mii_bus, 0);
  1458. +   phy_interface_t phy_mode;
  1459. +   int ret;
  1460. +
  1461. +   phy_mode = tp->supports_gmii ? PHY_INTERFACE_MODE_GMII :
  1462. +          PHY_INTERFACE_MODE_MII;
  1463. +
  1464. +   ret = phy_connect_direct(tp->dev, phydev, r8169_phylink_handler,
  1465. +                phy_mode);
  1466. +   if (ret)
  1467. +       return ret;
  1468. +
  1469. +   if (!tp->supports_gmii)
  1470. +       phy_set_max_speed(phydev, SPEED_100);
  1471. +
  1472. +   /* Ensure to advertise everything, incl. pause */
  1473. +   phydev->advertising = phydev->supported;
  1474. +
  1475. +   phy_attached_info(phydev);
  1476. +
  1477. +   return 0;
  1478. +}
  1479. +
  1480. static void rtl8169_down(struct net_device *dev)
  1481. {
  1482.     struct rtl8169_private *tp = netdev_priv(dev);
  1483.  
  1484. -   del_timer_sync(&tp->timer);
  1485. +   phy_stop(dev->phydev);
  1486.  
  1487.     napi_disable(&tp->napi);
  1488.     netif_stop_queue(dev);
  1489. @@ -7127,6 +6677,8 @@ static int rtl8169_close(struct net_devi
  1490.  
  1491.     cancel_work_sync(&tp->wk.work);
  1492.  
  1493. +   phy_disconnect(dev->phydev);
  1494. +
  1495.     pci_free_irq(pdev, 0, tp);
  1496.  
  1497.     dma_free_coherent(&pdev->dev, R8169_RX_RING_BYTES, tp->RxDescArray,
  1498. @@ -7187,6 +6739,10 @@ static int rtl_open(struct net_device *d
  1499.     if (retval < 0)
  1500.         goto err_release_fw_2;
  1501.  
  1502. +   retval = r8169_phy_connect(tp);
  1503. +   if (retval)
  1504. +       goto err_free_irq;
  1505. +
  1506.     rtl_lock_work(tp);
  1507.  
  1508.     set_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags);
  1509. @@ -7202,17 +6758,17 @@ static int rtl_open(struct net_device *d
  1510.     if (!rtl8169_init_counter_offsets(tp))
  1511.         netif_warn(tp, hw, dev, "counter reset/update failed\n");
  1512.  
  1513. +   phy_start(dev->phydev);
  1514.     netif_start_queue(dev);
  1515.  
  1516.     rtl_unlock_work(tp);
  1517.  
  1518. -   tp->saved_wolopts = 0;
  1519.     pm_runtime_put_sync(&pdev->dev);
  1520. -
  1521. -   rtl8169_check_link_status(dev, tp);
  1522. out:
  1523.     return retval;
  1524.  
  1525. +err_free_irq:
  1526. +   pci_free_irq(pdev, 0, tp);
  1527. err_release_fw_2:
  1528.     rtl_release_firmware(tp);
  1529.     rtl8169_rx_clear(tp);
  1530. @@ -7291,6 +6847,7 @@ static void rtl8169_net_suspend(struct n
  1531.     if (!netif_running(dev))
  1532.         return;
  1533.  
  1534. +   phy_stop(dev->phydev);
  1535.     netif_device_detach(dev);
  1536.     netif_stop_queue(dev);
  1537.  
  1538. @@ -7310,8 +6867,10 @@ static int rtl8169_suspend(struct device
  1539. {
  1540.     struct pci_dev *pdev = to_pci_dev(device);
  1541.     struct net_device *dev = pci_get_drvdata(pdev);
  1542. +   struct rtl8169_private *tp = netdev_priv(dev);
  1543.  
  1544.     rtl8169_net_suspend(dev);
  1545. +   clk_disable_unprepare(tp->clk);
  1546.  
  1547.     return 0;
  1548. }
  1549. @@ -7323,6 +6882,9 @@ static void __rtl8169_resume(struct net_
  1550.     netif_device_attach(dev);
  1551.  
  1552.     rtl_pll_power_up(tp);
  1553. +   rtl8169_init_phy(dev, tp);
  1554. +
  1555. +   phy_start(tp->dev->phydev);
  1556.  
  1557.     rtl_lock_work(tp);
  1558.     napi_enable(&tp->napi);
  1559. @@ -7338,7 +6900,7 @@ static int rtl8169_resume(struct device
  1560.     struct net_device *dev = pci_get_drvdata(pdev);
  1561.     struct rtl8169_private *tp = netdev_priv(dev);
  1562.  
  1563. -   rtl8169_init_phy(dev, tp);
  1564. +   clk_prepare_enable(tp->clk);
  1565.  
  1566.     if (netif_running(dev))
  1567.         __rtl8169_resume(dev);
  1568. @@ -7352,13 +6914,10 @@ static int rtl8169_runtime_suspend(struc
  1569.     struct net_device *dev = pci_get_drvdata(pdev);
  1570.     struct rtl8169_private *tp = netdev_priv(dev);
  1571.  
  1572. -   if (!tp->TxDescArray) {
  1573. -       rtl_pll_power_down(tp);
  1574. +   if (!tp->TxDescArray)
  1575.         return 0;
  1576. -   }
  1577.  
  1578.     rtl_lock_work(tp);
  1579. -   tp->saved_wolopts = __rtl8169_get_wol(tp);
  1580.     __rtl8169_set_wol(tp, WAKE_ANY);
  1581.     rtl_unlock_work(tp);
  1582.  
  1583. @@ -7383,11 +6942,8 @@ static int rtl8169_runtime_resume(struct
  1584.  
  1585.     rtl_lock_work(tp);
  1586.     __rtl8169_set_wol(tp, tp->saved_wolopts);
  1587. -   tp->saved_wolopts = 0;
  1588.     rtl_unlock_work(tp);
  1589.  
  1590. -   rtl8169_init_phy(dev, tp);
  1591. -
  1592.     __rtl8169_resume(dev);
  1593.  
  1594.     return 0;
  1595. @@ -7455,7 +7011,7 @@ static void rtl_shutdown(struct pci_dev
  1596.     rtl8169_hw_reset(tp);
  1597.  
  1598.     if (system_state == SYSTEM_POWER_OFF) {
  1599. -       if (__rtl8169_get_wol(tp) & WAKE_ANY) {
  1600. +       if (tp->saved_wolopts) {
  1601.             rtl_wol_suspend_quirk(tp);
  1602.             rtl_wol_shutdown_quirk(tp);
  1603.         }
  1604. @@ -7476,6 +7032,7 @@ static void rtl_remove_one(struct pci_de
  1605.     netif_napi_del(&tp->napi);
  1606.  
  1607.     unregister_netdev(dev);
  1608. +   mdiobus_unregister(tp->mii_bus);
  1609.  
  1610.     rtl_release_firmware(tp);
  1611.  
  1612. @@ -7561,6 +7118,68 @@ DECLARE_RTL_COND(rtl_rxtx_empty_cond)
  1613.     return (RTL_R8(tp, MCU) & RXTX_EMPTY) == RXTX_EMPTY;
  1614. }
  1615.  
  1616. +static int r8169_mdio_read_reg(struct mii_bus *mii_bus, int phyaddr, int phyreg)
  1617. +{
  1618. +   struct rtl8169_private *tp = mii_bus->priv;
  1619. +
  1620. +   if (phyaddr > 0)
  1621. +       return -ENODEV;
  1622. +
  1623. +   return rtl_readphy(tp, phyreg);
  1624. +}
  1625. +
  1626. +static int r8169_mdio_write_reg(struct mii_bus *mii_bus, int phyaddr,
  1627. +               int phyreg, u16 val)
  1628. +{
  1629. +   struct rtl8169_private *tp = mii_bus->priv;
  1630. +
  1631. +   if (phyaddr > 0)
  1632. +       return -ENODEV;
  1633. +
  1634. +   rtl_writephy(tp, phyreg, val);
  1635. +
  1636. +   return 0;
  1637. +}
  1638. +
  1639. +static int r8169_mdio_register(struct rtl8169_private *tp)
  1640. +{
  1641. +   struct pci_dev *pdev = tp->pci_dev;
  1642. +   struct phy_device *phydev;
  1643. +   struct mii_bus *new_bus;
  1644. +   int ret;
  1645. +
  1646. +   new_bus = devm_mdiobus_alloc(&pdev->dev);
  1647. +   if (!new_bus)
  1648. +       return -ENOMEM;
  1649. +
  1650. +   new_bus->name = "r8169";
  1651. +   new_bus->priv = tp;
  1652. +   new_bus->parent = &pdev->dev;
  1653. +   new_bus->irq[0] = PHY_IGNORE_INTERRUPT;
  1654. +   snprintf(new_bus->id, MII_BUS_ID_SIZE, "r8169-%x",
  1655. +        PCI_DEVID(pdev->bus->number, pdev->devfn));
  1656. +
  1657. +   new_bus->read = r8169_mdio_read_reg;
  1658. +   new_bus->write = r8169_mdio_write_reg;
  1659. +
  1660. +   ret = mdiobus_register(new_bus);
  1661. +   if (ret)
  1662. +       return ret;
  1663. +
  1664. +   phydev = mdiobus_get_phy(new_bus, 0);
  1665. +   if (!phydev) {
  1666. +       mdiobus_unregister(new_bus);
  1667. +       return -ENODEV;
  1668. +   }
  1669. +
  1670. +   /* PHY will be woken up in rtl_open() */
  1671. +   phy_suspend(phydev);
  1672. +
  1673. +   tp->mii_bus = new_bus;
  1674. +
  1675. +   return 0;
  1676. +}
  1677. +
  1678. static void rtl_hw_init_8168g(struct rtl8169_private *tp)
  1679. {
  1680.     u32 data;
  1681. @@ -7614,19 +7233,53 @@ static void rtl_hw_initialize(struct rtl
  1682.     }
  1683. }
  1684.  
  1685. +/* Versions RTL8102e and from RTL8168c onwards support csum_v2 */
  1686. +static bool rtl_chip_supports_csum_v2(struct rtl8169_private *tp)
  1687. +{
  1688. +   switch (tp->mac_version) {
  1689. +   case RTL_GIGA_MAC_VER_01 ... RTL_GIGA_MAC_VER_06:
  1690. +   case RTL_GIGA_MAC_VER_10 ... RTL_GIGA_MAC_VER_17:
  1691. +       return false;
  1692. +   default:
  1693. +       return true;
  1694. +   }
  1695. +}
  1696. +
  1697. +static int rtl_jumbo_max(struct rtl8169_private *tp)
  1698. +{
  1699. +   /* Non-GBit versions don't support jumbo frames */
  1700. +   if (!tp->supports_gmii)
  1701. +       return JUMBO_1K;
  1702. +
  1703. +   switch (tp->mac_version) {
  1704. +   /* RTL8169 */
  1705. +   case RTL_GIGA_MAC_VER_01 ... RTL_GIGA_MAC_VER_06:
  1706. +       return JUMBO_7K;
  1707. +   /* RTL8168b */
  1708. +   case RTL_GIGA_MAC_VER_11:
  1709. +   case RTL_GIGA_MAC_VER_12:
  1710. +   case RTL_GIGA_MAC_VER_17:
  1711. +       return JUMBO_4K;
  1712. +   /* RTL8168c */
  1713. +   case RTL_GIGA_MAC_VER_18 ... RTL_GIGA_MAC_VER_24:
  1714. +       return JUMBO_6K;
  1715. +   default:
  1716. +       return JUMBO_9K;
  1717. +   }
  1718. +}
  1719. +
  1720. +static void rtl_disable_clk(void *data)
  1721. +{
  1722. +   clk_disable_unprepare(data);
  1723. +}
  1724. +
  1725. static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
  1726. {
  1727.     const struct rtl_cfg_info *cfg = rtl_cfg_infos + ent->driver_data;
  1728.     struct rtl8169_private *tp;
  1729. -   struct mii_if_info *mii;
  1730.     struct net_device *dev;
  1731.     int chipset, region, i;
  1732. -   int rc;
  1733. -
  1734. -   if (netif_msg_drv(&debug)) {
  1735. -       printk(KERN_INFO "%s Gigabit Ethernet driver %s loaded\n",
  1736. -              MODULENAME, RTL8169_VERSION);
  1737. -   }
  1738. +   int jumbo_max, rc;
  1739.  
  1740.     dev = devm_alloc_etherdev(&pdev->dev, sizeof (*tp));
  1741.     if (!dev)
  1742. @@ -7638,19 +7291,33 @@ static int rtl_init_one(struct pci_dev *
  1743.     tp->dev = dev;
  1744.     tp->pci_dev = pdev;
  1745.     tp->msg_enable = netif_msg_init(debug.msg_enable, R8169_MSG_DEFAULT);
  1746. +   tp->supports_gmii = cfg->has_gmii;
  1747. +
  1748. +   /* Get the *optional* external "ether_clk" used on some boards */
  1749. +   tp->clk = devm_clk_get(&pdev->dev, "ether_clk");
  1750. +   if (IS_ERR(tp->clk)) {
  1751. +       rc = PTR_ERR(tp->clk);
  1752. +       if (rc == -ENOENT) {
  1753. +           /* clk-core allows NULL (for suspend / resume) */
  1754. +           tp->clk = NULL;
  1755. +       } else if (rc == -EPROBE_DEFER) {
  1756. +           return rc;
  1757. +       } else {
  1758. +           dev_err(&pdev->dev, "failed to get clk: %d\n", rc);
  1759. +           return rc;
  1760. +       }
  1761. +   } else {
  1762. +       rc = clk_prepare_enable(tp->clk);
  1763. +       if (rc) {
  1764. +           dev_err(&pdev->dev, "failed to enable clk: %d\n", rc);
  1765. +           return rc;
  1766. +       }
  1767.  
  1768. -   mii = &tp->mii;
  1769. -   mii->dev = dev;
  1770. -   mii->mdio_read = rtl_mdio_read;
  1771. -   mii->mdio_write = rtl_mdio_write;
  1772. -   mii->phy_id_mask = 0x1f;
  1773. -   mii->reg_num_mask = 0x1f;
  1774. -   mii->supports_gmii = cfg->has_gmii;
  1775. -
  1776. -   /* disable ASPM completely as that cause random device stop working
  1777. -    * problems as well as full system hangs for some PCIe devices users */
  1778. -   pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
  1779. -                    PCIE_LINK_STATE_CLKPM);
  1780. +       rc = devm_add_action_or_reset(&pdev->dev, rtl_disable_clk,
  1781. +                         tp->clk);
  1782. +       if (rc)
  1783. +           return rc;
  1784. +   }
  1785.  
  1786.     /* enable device (incl. PCI PM wakeup and hotplug setup) */
  1787.     rc = pcim_enable_device(pdev);
  1788. @@ -7689,6 +7356,11 @@ static int rtl_init_one(struct pci_dev *
  1789.     /* Identify chip attached to board */
  1790.     rtl8169_get_mac_version(tp, cfg->default_ver);
  1791.  
  1792. +   if (rtl_tbi_enabled(tp)) {
  1793. +       dev_err(&pdev->dev, "TBI fiber mode not supported\n");
  1794. +       return -ENODEV;
  1795. +   }
  1796. +
  1797.     tp->cp_cmd = RTL_R16(tp, CPlusCmd);
  1798.  
  1799.     if ((sizeof(dma_addr_t) > 4) &&
  1800. @@ -7736,22 +7408,6 @@ static int rtl_init_one(struct pci_dev *
  1801.  
  1802.     tp->saved_wolopts = __rtl8169_get_wol(tp);
  1803.  
  1804. -   if (rtl_tbi_enabled(tp)) {
  1805. -       tp->set_speed = rtl8169_set_speed_tbi;
  1806. -       tp->get_link_ksettings = rtl8169_get_link_ksettings_tbi;
  1807. -       tp->phy_reset_enable = rtl8169_tbi_reset_enable;
  1808. -       tp->phy_reset_pending = rtl8169_tbi_reset_pending;
  1809. -       tp->link_ok = rtl8169_tbi_link_ok;
  1810. -       tp->do_ioctl = rtl_tbi_ioctl;
  1811. -   } else {
  1812. -       tp->set_speed = rtl8169_set_speed_xmii;
  1813. -       tp->get_link_ksettings = rtl8169_get_link_ksettings_xmii;
  1814. -       tp->phy_reset_enable = rtl8169_xmii_reset_enable;
  1815. -       tp->phy_reset_pending = rtl8169_xmii_reset_pending;
  1816. -       tp->link_ok = rtl8169_xmii_link_ok;
  1817. -       tp->do_ioctl = rtl_xmii_ioctl;
  1818. -   }
  1819. -
  1820.     mutex_init(&tp->wk.mutex);
  1821.     u64_stats_init(&tp->rx_stats.syncp);
  1822.     u64_stats_init(&tp->tx_stats.syncp);
  1823. @@ -7800,16 +7456,11 @@ static int rtl_init_one(struct pci_dev *
  1824.         /* Disallow toggling */
  1825.         dev->hw_features &= ~NETIF_F_HW_VLAN_CTAG_RX;
  1826.  
  1827. -   switch (rtl_chip_infos[chipset].txd_version) {
  1828. -   case RTL_TD_0:
  1829. -       tp->tso_csum = rtl8169_tso_csum_v1;
  1830. -       break;
  1831. -   case RTL_TD_1:
  1832. +   if (rtl_chip_supports_csum_v2(tp)) {
  1833.         tp->tso_csum = rtl8169_tso_csum_v2;
  1834.         dev->hw_features |= NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
  1835. -       break;
  1836. -   default:
  1837. -       WARN_ON_ONCE(1);
  1838. +   } else {
  1839. +       tp->tso_csum = rtl8169_tso_csum_v1;
  1840.     }
  1841.  
  1842.     dev->hw_features |= NETIF_F_RXALL;
  1843. @@ -7817,14 +7468,13 @@ static int rtl_init_one(struct pci_dev *
  1844.  
  1845.     /* MTU range: 60 - hw-specific max */
  1846.     dev->min_mtu = ETH_ZLEN;
  1847. -   dev->max_mtu = rtl_chip_infos[chipset].jumbo_max;
  1848. +   jumbo_max = rtl_jumbo_max(tp);
  1849. +   dev->max_mtu = jumbo_max;
  1850.  
  1851.     tp->hw_start = cfg->hw_start;
  1852.     tp->event_slow = cfg->event_slow;
  1853.     tp->coalesce_info = cfg->coalesce_info;
  1854.  
  1855. -   timer_setup(&tp->timer, rtl8169_phy_timer, 0);
  1856. -
  1857.     tp->rtl_fw = RTL_FIRMWARE_UNKNOWN;
  1858.  
  1859.     tp->counters = dmam_alloc_coherent (&pdev->dev, sizeof(*tp->counters),
  1860. @@ -7835,30 +7485,39 @@ static int rtl_init_one(struct pci_dev *
  1861.  
  1862.     pci_set_drvdata(pdev, dev);
  1863.  
  1864. -   rc = register_netdev(dev);
  1865. -   if (rc < 0)
  1866. +   rc = r8169_mdio_register(tp);
  1867. +   if (rc)
  1868.         return rc;
  1869.  
  1870. +   /* chip gets powered up in rtl_open() */
  1871. +   rtl_pll_power_down(tp);
  1872. +
  1873. +   rc = register_netdev(dev);
  1874. +   if (rc)
  1875. +       goto err_mdio_unregister;
  1876. +
  1877.     netif_info(tp, probe, dev, "%s, %pM, XID %08x, IRQ %d\n",
  1878.            rtl_chip_infos[chipset].name, dev->dev_addr,
  1879.            (u32)(RTL_R32(tp, TxConfig) & 0xfcf0f8ff),
  1880.            pci_irq_vector(pdev, 0));
  1881. -   if (rtl_chip_infos[chipset].jumbo_max != JUMBO_1K) {
  1882. -       netif_info(tp, probe, dev, "jumbo features [frames: %d bytes, "
  1883. -              "tx checksumming: %s]\n",
  1884. -              rtl_chip_infos[chipset].jumbo_max,
  1885. -             tp->mac_version <= RTL_GIGA_MAC_VER_06 ? "ok" : "ko");
  1886. -   }
  1887. +
  1888. +   if (jumbo_max > JUMBO_1K)
  1889. +       netif_info(tp, probe, dev,
  1890. +              "jumbo features [frames: %d bytes, tx checksumming: %s]\n",
  1891. +              jumbo_max, tp->mac_version <= RTL_GIGA_MAC_VER_06 ?
  1892. +              "ok" : "ko");
  1893.  
  1894.     if (r8168_check_dash(tp))
  1895.         rtl8168_driver_start(tp);
  1896.  
  1897. -   netif_carrier_off(dev);
  1898. -
  1899.     if (pci_dev_run_wake(pdev))
  1900.         pm_runtime_put_sync(&pdev->dev);
  1901.  
  1902.     return 0;
  1903. +
  1904. +err_mdio_unregister:
  1905. +   mdiobus_unregister(tp->mii_bus);
  1906. +   return rc;
  1907. }
  1908.  
  1909. static struct pci_driver rtl8169_pci_driver = {
  1910. diff -Narup a/drivers/net/wireless/ath/ath9k/ahb.c b/drivers/net/wireless/ath/ath9k/ahb.c
  1911. --- a/drivers/net/wireless/ath/ath9k/ahb.c  2018-11-21 09:22:14.000000000 +0100
  1912. +++ b/drivers/net/wireless/ath/ath9k/ahb.c  2018-12-17 09:24:42.000000000 +0100
  1913. @@ -19,6 +19,7 @@
  1914. #include <linux/nl80211.h>
  1915. #include <linux/platform_device.h>
  1916. #include <linux/module.h>
  1917. +#include <linux/mod_devicetable.h>
  1918. #include "ath9k.h"
  1919.  
  1920. static const struct platform_device_id ath9k_platform_id_table[] = {
  1921. diff -Narup a/drivers/net/wireless/ath/ath9k/ar5008_phy.c b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
  1922. --- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c   2018-11-21 09:22:14.000000000 +0100
  1923. +++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c   2018-12-17 09:24:42.000000000 +0100
  1924. @@ -583,12 +583,14 @@ static void ar5008_hw_init_chain_masks(s
  1925.     case 0x5:
  1926.         REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP,
  1927.                 AR_PHY_SWAP_ALT_CHAIN);
  1928. +       /* fall through */
  1929.     case 0x3:
  1930.         if (ah->hw_version.macVersion == AR_SREV_REVISION_5416_10) {
  1931.             REG_WRITE(ah, AR_PHY_RX_CHAINMASK, 0x7);
  1932.             REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, 0x7);
  1933.             break;
  1934.         }
  1935. +       /* else: fall through */
  1936.     case 0x1:
  1937.     case 0x2:
  1938.     case 0x7:
  1939. diff -Narup a/drivers/net/wireless/ath/ath9k/ar9002_calib.c b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
  1940. --- a/drivers/net/wireless/ath/ath9k/ar9002_calib.c 2018-11-21 09:22:14.000000000 +0100
  1941. +++ b/drivers/net/wireless/ath/ath9k/ar9002_calib.c 2018-12-17 09:24:42.000000000 +0100
  1942. @@ -676,10 +676,10 @@ static int ar9002_hw_calibrate(struct at
  1943.             return 0;
  1944.  
  1945.         ah->cal_list_curr = currCal = currCal->calNext;
  1946. -       if (currCal->calState == CAL_WAITING) {
  1947. +       if (currCal->calState == CAL_WAITING)
  1948.             ath9k_hw_reset_calibration(ah, currCal);
  1949. -           return 0;
  1950. -       }
  1951. +
  1952. +       return 0;
  1953.     }
  1954.  
  1955.     /* Do NF cal only at longer intervals */
  1956. diff -Narup a/drivers/net/wireless/ath/ath9k/ar9002_phy.c b/drivers/net/wireless/ath/ath9k/ar9002_phy.c
  1957. --- a/drivers/net/wireless/ath/ath9k/ar9002_phy.c   2018-11-21 09:22:14.000000000 +0100
  1958. +++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.c   2018-12-17 09:24:42.000000000 +0100
  1959. @@ -119,6 +119,7 @@ static int ar9002_hw_set_channel(struct
  1960.                 aModeRefSel = 2;
  1961.             if (aModeRefSel)
  1962.                 break;
  1963. +           /* else: fall through */
  1964.         case 1:
  1965.         default:
  1966.             aModeRefSel = 0;
  1967. diff -Narup a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
  1968. --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c   2018-11-21 09:22:14.000000000 +0100
  1969. +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c   2018-12-17 09:24:42.000000000 +0100
  1970. @@ -1800,6 +1800,8 @@ static void ar9003_hw_spectral_scan_conf
  1971.  
  1972. static void ar9003_hw_spectral_scan_trigger(struct ath_hw *ah)
  1973. {
  1974. +   REG_SET_BIT(ah, AR_PHY_SPECTRAL_SCAN,
  1975. +           AR_PHY_SPECTRAL_SCAN_ENABLE);
  1976.     /* Activate spectral scan */
  1977.     REG_SET_BIT(ah, AR_PHY_SPECTRAL_SCAN,
  1978.             AR_PHY_SPECTRAL_SCAN_ACTIVE);
  1979. diff -Narup a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h
  1980. --- a/drivers/net/wireless/ath/ath9k/ath9k.h    2018-11-21 09:22:14.000000000 +0100
  1981. +++ b/drivers/net/wireless/ath/ath9k/ath9k.h    2018-12-17 09:24:42.000000000 +0100
  1982. @@ -342,7 +342,7 @@ struct ath_chanctx {
  1983.  
  1984.     struct ath_beacon_config beacon;
  1985.     struct ath9k_hw_cal_data caldata;
  1986. -   struct timespec tsf_ts;
  1987. +   struct timespec64 tsf_ts;
  1988.     u64 tsf_val;
  1989.     u32 last_beacon;
  1990.  
  1991. @@ -1021,7 +1021,7 @@ struct ath_softc {
  1992.     struct ath_offchannel offchannel;
  1993.     struct ath_chanctx *next_chan;
  1994.     struct completion go_beacon;
  1995. -   struct timespec last_event_time;
  1996. +   struct timespec64 last_event_time;
  1997. #endif
  1998.  
  1999.     unsigned long driver_data;
  2000. diff -Narup a/drivers/net/wireless/ath/ath9k/channel.c b/drivers/net/wireless/ath/ath9k/channel.c
  2001. --- a/drivers/net/wireless/ath/ath9k/channel.c  2018-11-21 09:22:14.000000000 +0100
  2002. +++ b/drivers/net/wireless/ath/ath9k/channel.c  2018-12-17 09:24:42.000000000 +0100
  2003. @@ -233,9 +233,9 @@ static const char *chanctx_state_string(
  2004. static u32 chanctx_event_delta(struct ath_softc *sc)
  2005. {
  2006.     u64 ms;
  2007. -   struct timespec ts, *old;
  2008. +   struct timespec64 ts, *old;
  2009.  
  2010. -   getrawmonotonic(&ts);
  2011. +   ktime_get_raw_ts64(&ts);
  2012.     old = &sc->last_event_time;
  2013.     ms = ts.tv_sec * 1000 + ts.tv_nsec / 1000000;
  2014.     ms -= old->tv_sec * 1000 + old->tv_nsec / 1000000;
  2015. @@ -334,7 +334,7 @@ ath_chanctx_get_next(struct ath_softc *s
  2016. static void ath_chanctx_adjust_tbtt_delta(struct ath_softc *sc)
  2017. {
  2018.     struct ath_chanctx *prev, *cur;
  2019. -   struct timespec ts;
  2020. +   struct timespec64 ts;
  2021.     u32 cur_tsf, prev_tsf, beacon_int;
  2022.     s32 offset;
  2023.  
  2024. @@ -346,7 +346,7 @@ static void ath_chanctx_adjust_tbtt_delt
  2025.     if (!prev->switch_after_beacon)
  2026.         return;
  2027.  
  2028. -   getrawmonotonic(&ts);
  2029. +   ktime_get_raw_ts64(&ts);
  2030.     cur_tsf = (u32) cur->tsf_val +
  2031.           ath9k_hw_get_tsf_offset(&cur->tsf_ts, &ts);
  2032.  
  2033. @@ -1230,7 +1230,7 @@ void ath_chanctx_set_next(struct ath_sof
  2034. {
  2035.     struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  2036.     struct ath_chanctx *old_ctx;
  2037. -   struct timespec ts;
  2038. +   struct timespec64 ts;
  2039.     bool measure_time = false;
  2040.     bool send_ps = false;
  2041.     bool queues_stopped = false;
  2042. @@ -1260,7 +1260,7 @@ void ath_chanctx_set_next(struct ath_sof
  2043.         spin_unlock_bh(&sc->chan_lock);
  2044.  
  2045.         if (sc->next_chan == &sc->offchannel.chan) {
  2046. -           getrawmonotonic(&ts);
  2047. +           ktime_get_raw_ts64(&ts);
  2048.             measure_time = true;
  2049.         }
  2050.  
  2051. @@ -1277,7 +1277,7 @@ void ath_chanctx_set_next(struct ath_sof
  2052.         spin_lock_bh(&sc->chan_lock);
  2053.  
  2054.         if (sc->cur_chan != &sc->offchannel.chan) {
  2055. -           getrawmonotonic(&sc->cur_chan->tsf_ts);
  2056. +           ktime_get_raw_ts64(&sc->cur_chan->tsf_ts);
  2057.             sc->cur_chan->tsf_val = ath9k_hw_gettsf64(sc->sc_ah);
  2058.         }
  2059.     }
  2060. diff -Narup a/drivers/net/wireless/ath/ath9k/debug.c b/drivers/net/wireless/ath/ath9k/debug.c
  2061. --- a/drivers/net/wireless/ath/ath9k/debug.c    2018-11-21 09:22:14.000000000 +0100
  2062. +++ b/drivers/net/wireless/ath/ath9k/debug.c    2018-12-17 09:24:42.000000000 +0100
  2063. @@ -538,7 +538,7 @@ static int read_file_interrupt(struct se
  2064.     if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  2065.         PR_IS("RXLP", rxlp);
  2066.         PR_IS("RXHP", rxhp);
  2067. -       PR_IS("WATHDOG", bb_watchdog);
  2068. +       PR_IS("WATCHDOG", bb_watchdog);
  2069.     } else {
  2070.         PR_IS("RX", rxok);
  2071.     }
  2072. diff -Narup a/drivers/net/wireless/ath/ath9k/hif_usb.c b/drivers/net/wireless/ath/ath9k/hif_usb.c
  2073. --- a/drivers/net/wireless/ath/ath9k/hif_usb.c  2018-11-21 09:22:14.000000000 +0100
  2074. +++ b/drivers/net/wireless/ath/ath9k/hif_usb.c  2018-12-17 09:24:42.000000000 +0100
  2075. @@ -138,6 +138,7 @@ static void hif_usb_mgmt_cb(struct urb *
  2076. {
  2077.     struct cmd_buf *cmd = (struct cmd_buf *)urb->context;
  2078.     struct hif_device_usb *hif_dev;
  2079. +   unsigned long flags;
  2080.     bool txok = true;
  2081.  
  2082.     if (!cmd || !cmd->skb || !cmd->hif_dev)
  2083. @@ -158,14 +159,14 @@ static void hif_usb_mgmt_cb(struct urb *
  2084.          * If the URBs are being flushed, no need to complete
  2085.          * this packet.
  2086.          */
  2087. -       spin_lock(&hif_dev->tx.tx_lock);
  2088. +       spin_lock_irqsave(&hif_dev->tx.tx_lock, flags);
  2089.         if (hif_dev->tx.flags & HIF_USB_TX_FLUSH) {
  2090. -           spin_unlock(&hif_dev->tx.tx_lock);
  2091. +           spin_unlock_irqrestore(&hif_dev->tx.tx_lock, flags);
  2092.             dev_kfree_skb_any(cmd->skb);
  2093.             kfree(cmd);
  2094.             return;
  2095.         }
  2096. -       spin_unlock(&hif_dev->tx.tx_lock);
  2097. +       spin_unlock_irqrestore(&hif_dev->tx.tx_lock, flags);
  2098.  
  2099.         break;
  2100.     default:
  2101. diff -Narup a/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c b/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c
  2102. --- a/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c 2018-11-21 09:22:14.000000000 +0100
  2103. +++ b/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c 2018-12-17 09:24:42.000000000 +0100
  2104. @@ -1107,25 +1107,26 @@ void ath9k_htc_rxep(void *drv_priv, stru
  2105.     struct ath_hw *ah = priv->ah;
  2106.     struct ath_common *common = ath9k_hw_common(ah);
  2107.     struct ath9k_htc_rxbuf *rxbuf = NULL, *tmp_buf = NULL;
  2108. +   unsigned long flags;
  2109.  
  2110. -   spin_lock(&priv->rx.rxbuflock);
  2111. +   spin_lock_irqsave(&priv->rx.rxbuflock, flags);
  2112.     list_for_each_entry(tmp_buf, &priv->rx.rxbuf, list) {
  2113.         if (!tmp_buf->in_process) {
  2114.             rxbuf = tmp_buf;
  2115.             break;
  2116.         }
  2117.     }
  2118. -   spin_unlock(&priv->rx.rxbuflock);
  2119. +   spin_unlock_irqrestore(&priv->rx.rxbuflock, flags);
  2120.  
  2121.     if (rxbuf == NULL) {
  2122.         ath_dbg(common, ANY, "No free RX buffer\n");
  2123.         goto err;
  2124.     }
  2125.  
  2126. -   spin_lock(&priv->rx.rxbuflock);
  2127. +   spin_lock_irqsave(&priv->rx.rxbuflock, flags);
  2128.     rxbuf->skb = skb;
  2129.     rxbuf->in_process = true;
  2130. -   spin_unlock(&priv->rx.rxbuflock);
  2131. +   spin_unlock_irqrestore(&priv->rx.rxbuflock, flags);
  2132.  
  2133.     tasklet_schedule(&priv->rx_tasklet);
  2134.     return;
  2135. diff -Narup a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
  2136. --- a/drivers/net/wireless/ath/ath9k/hw.c   2018-11-21 09:22:14.000000000 +0100
  2137. +++ b/drivers/net/wireless/ath/ath9k/hw.c   2018-12-17 09:24:42.000000000 +0100
  2138. @@ -496,7 +496,7 @@ static void ath9k_hw_init_macaddr(struct
  2139.     ath_err(common, "eeprom contains invalid mac address: %pM\n",
  2140.         common->macaddr);
  2141.  
  2142. -   random_ether_addr(common->macaddr);
  2143. +   eth_random_addr(common->macaddr);
  2144.     ath_err(common, "random mac address will be used: %pM\n",
  2145.         common->macaddr);
  2146.  
  2147. @@ -1835,13 +1835,13 @@ fail:
  2148.     return -EINVAL;
  2149. }
  2150.  
  2151. -u32 ath9k_hw_get_tsf_offset(struct timespec *last, struct timespec *cur)
  2152. +u32 ath9k_hw_get_tsf_offset(struct timespec64 *last, struct timespec64 *cur)
  2153. {
  2154. -   struct timespec ts;
  2155. +   struct timespec64 ts;
  2156.     s64 usec;
  2157.  
  2158.     if (!cur) {
  2159. -       getrawmonotonic(&ts);
  2160. +       ktime_get_raw_ts64(&ts);
  2161.         cur = &ts;
  2162.     }
  2163.  
  2164. @@ -1859,7 +1859,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st
  2165.     u32 saveLedState;
  2166.     u32 saveDefAntenna;
  2167.     u32 macStaId1;
  2168. -   struct timespec tsf_ts;
  2169. +   struct timespec64 tsf_ts;
  2170.     u32 tsf_offset;
  2171.     u64 tsf = 0;
  2172.     int r;
  2173. @@ -1905,7 +1905,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st
  2174.     macStaId1 = REG_READ(ah, AR_STA_ID1) & AR_STA_ID1_BASE_RATE_11B;
  2175.  
  2176.     /* Save TSF before chip reset, a cold reset clears it */
  2177. -   getrawmonotonic(&tsf_ts);
  2178. +   ktime_get_raw_ts64(&tsf_ts);
  2179.     tsf = ath9k_hw_gettsf64(ah);
  2180.  
  2181.     saveLedState = REG_READ(ah, AR_CFG_LED) &
  2182. diff -Narup a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
  2183. --- a/drivers/net/wireless/ath/ath9k/hw.h   2018-11-21 09:22:14.000000000 +0100
  2184. +++ b/drivers/net/wireless/ath/ath9k/hw.h   2018-12-17 09:24:42.000000000 +0100
  2185. @@ -1060,7 +1060,7 @@ u32 ath9k_hw_gettsf32(struct ath_hw *ah)
  2186. u64 ath9k_hw_gettsf64(struct ath_hw *ah);
  2187. void ath9k_hw_settsf64(struct ath_hw *ah, u64 tsf64);
  2188. void ath9k_hw_reset_tsf(struct ath_hw *ah);
  2189. -u32 ath9k_hw_get_tsf_offset(struct timespec *last, struct timespec *cur);
  2190. +u32 ath9k_hw_get_tsf_offset(struct timespec64 *last, struct timespec64 *cur);
  2191. void ath9k_hw_set_tsfadjust(struct ath_hw *ah, bool set);
  2192. void ath9k_hw_init_global_settings(struct ath_hw *ah);
  2193. u32 ar9003_get_pll_sqsum_dvc(struct ath_hw *ah);
  2194. diff -Narup a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c
  2195. --- a/drivers/net/wireless/ath/ath9k/main.c 2018-11-21 09:22:14.000000000 +0100
  2196. +++ b/drivers/net/wireless/ath/ath9k/main.c 2018-12-17 09:24:42.000000000 +0100
  2197. @@ -1865,7 +1865,7 @@ static void ath9k_set_tsf(struct ieee802
  2198.     mutex_lock(&sc->mutex);
  2199.     ath9k_ps_wakeup(sc);
  2200.     tsf -= le64_to_cpu(avp->tsf_adjust);
  2201. -   getrawmonotonic(&avp->chanctx->tsf_ts);
  2202. +   ktime_get_raw_ts64(&avp->chanctx->tsf_ts);
  2203.     if (sc->cur_chan == avp->chanctx)
  2204.         ath9k_hw_settsf64(sc->sc_ah, tsf);
  2205.     avp->chanctx->tsf_val = tsf;
  2206. @@ -1881,7 +1881,7 @@ static void ath9k_reset_tsf(struct ieee8
  2207.     mutex_lock(&sc->mutex);
  2208.  
  2209.     ath9k_ps_wakeup(sc);
  2210. -   getrawmonotonic(&avp->chanctx->tsf_ts);
  2211. +   ktime_get_raw_ts64(&avp->chanctx->tsf_ts);
  2212.     if (sc->cur_chan == avp->chanctx)
  2213.         ath9k_hw_reset_tsf(sc->sc_ah);
  2214.     avp->chanctx->tsf_val = 0;
  2215. @@ -1928,6 +1928,7 @@ static int ath9k_ampdu_action(struct iee
  2216.     case IEEE80211_AMPDU_TX_STOP_FLUSH:
  2217.     case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
  2218.         flush = true;
  2219. +       /* fall through */
  2220.     case IEEE80211_AMPDU_TX_STOP_CONT:
  2221.         ath9k_ps_wakeup(sc);
  2222.         ath_tx_aggr_stop(sc, sta, tid);
  2223. diff -Narup a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c
  2224. --- a/drivers/net/wireless/ath/ath9k/pci.c  2018-11-21 09:22:14.000000000 +0100
  2225. +++ b/drivers/net/wireless/ath/ath9k/pci.c  2018-12-17 09:24:42.000000000 +0100
  2226. @@ -18,7 +18,6 @@
  2227.  
  2228. #include <linux/nl80211.h>
  2229. #include <linux/pci.h>
  2230. -#include <linux/pci-aspm.h>
  2231. #include <linux/module.h>
  2232. #include "ath9k.h"
  2233.  
  2234. diff -Narup a/drivers/net/wireless/ath/ath9k/wmi.c b/drivers/net/wireless/ath/ath9k/wmi.c
  2235. --- a/drivers/net/wireless/ath/ath9k/wmi.c  2018-11-21 09:22:14.000000000 +0100
  2236. +++ b/drivers/net/wireless/ath/ath9k/wmi.c  2018-12-17 09:24:42.000000000 +0100
  2237. @@ -209,6 +209,7 @@ static void ath9k_wmi_ctrl_rx(void *priv
  2238. {
  2239.     struct wmi *wmi = priv;
  2240.     struct wmi_cmd_hdr *hdr;
  2241. +   unsigned long flags;
  2242.     u16 cmd_id;
  2243.  
  2244.     if (unlikely(wmi->stopped))
  2245. @@ -218,20 +219,20 @@ static void ath9k_wmi_ctrl_rx(void *priv
  2246.     cmd_id = be16_to_cpu(hdr->command_id);
  2247.  
  2248.     if (cmd_id & 0x1000) {
  2249. -       spin_lock(&wmi->wmi_lock);
  2250. +       spin_lock_irqsave(&wmi->wmi_lock, flags);
  2251.         __skb_queue_tail(&wmi->wmi_event_queue, skb);
  2252. -       spin_unlock(&wmi->wmi_lock);
  2253. +       spin_unlock_irqrestore(&wmi->wmi_lock, flags);
  2254.         tasklet_schedule(&wmi->wmi_event_tasklet);
  2255.         return;
  2256.     }
  2257.  
  2258.     /* Check if there has been a timeout. */
  2259. -   spin_lock(&wmi->wmi_lock);
  2260. +   spin_lock_irqsave(&wmi->wmi_lock, flags);
  2261.     if (be16_to_cpu(hdr->seq_no) != wmi->last_seq_id) {
  2262. -       spin_unlock(&wmi->wmi_lock);
  2263. +       spin_unlock_irqrestore(&wmi->wmi_lock, flags);
  2264.         goto free_skb;
  2265.     }
  2266. -   spin_unlock(&wmi->wmi_lock);
  2267. +   spin_unlock_irqrestore(&wmi->wmi_lock, flags);
  2268.  
  2269.     /* WMI command response */
  2270.     ath9k_wmi_rsp_callback(wmi, skb);
  2271. diff -Narup a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c
  2272. --- a/drivers/net/wireless/ath/ath9k/xmit.c 2018-11-21 09:22:14.000000000 +0100
  2273. +++ b/drivers/net/wireless/ath/ath9k/xmit.c 2018-12-17 09:24:42.000000000 +0100
  2274. @@ -62,7 +62,7 @@ static void ath_tx_rc_status(struct ath_
  2275.                  struct ath_tx_status *ts, int nframes, int nbad,
  2276.                  int txok);
  2277. static void ath_tx_update_baw(struct ath_softc *sc, struct ath_atx_tid *tid,
  2278. -                 int seqno);
  2279. +                 struct ath_buf *bf);
  2280. static struct ath_buf *ath_tx_setup_buffer(struct ath_softc *sc,
  2281.                        struct ath_txq *txq,
  2282.                        struct ath_atx_tid *tid,
  2283. @@ -296,7 +296,7 @@ static void ath_tx_flush_tid(struct ath_
  2284.         }
  2285.  
  2286.         if (fi->baw_tracked) {
  2287. -           ath_tx_update_baw(sc, tid, bf->bf_state.seqno);
  2288. +           ath_tx_update_baw(sc, tid, bf);
  2289.             sendbar = true;
  2290.         }
  2291.  
  2292. @@ -312,10 +312,15 @@ static void ath_tx_flush_tid(struct ath_
  2293. }
  2294.  
  2295. static void ath_tx_update_baw(struct ath_softc *sc, struct ath_atx_tid *tid,
  2296. -                 int seqno)
  2297. +                 struct ath_buf *bf)
  2298. {
  2299. +   struct ath_frame_info *fi = get_frame_info(bf->bf_mpdu);
  2300. +   u16 seqno = bf->bf_state.seqno;
  2301.     int index, cindex;
  2302.  
  2303. +   if (!fi->baw_tracked)
  2304. +       return;
  2305. +
  2306.     index  = ATH_BA_INDEX(tid->seq_start, seqno);
  2307.     cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
  2308.  
  2309. @@ -336,6 +341,9 @@ static void ath_tx_addto_baw(struct ath_
  2310.     u16 seqno = bf->bf_state.seqno;
  2311.     int index, cindex;
  2312.  
  2313. +   if (fi->baw_tracked)
  2314. +       return;
  2315. +
  2316.     index  = ATH_BA_INDEX(tid->seq_start, seqno);
  2317.     cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
  2318.     __set_bit(cindex, tid->tx_buf);
  2319. @@ -612,7 +620,7 @@ static void ath_tx_complete_aggr(struct
  2320.              * complete the acked-ones/xretried ones; update
  2321.              * block-ack window
  2322.              */
  2323. -           ath_tx_update_baw(sc, tid, seqno);
  2324. +           ath_tx_update_baw(sc, tid, bf);
  2325.  
  2326.             if (rc_update && (acked_cnt == 1 || txfail_cnt == 1)) {
  2327.                 memcpy(tx_info->control.rates, rates, sizeof(rates));
  2328. @@ -642,7 +650,7 @@ static void ath_tx_complete_aggr(struct
  2329.                  * run out of tx buf.
  2330.                  */
  2331.                 if (!tbf) {
  2332. -                   ath_tx_update_baw(sc, tid, seqno);
  2333. +                   ath_tx_update_baw(sc, tid, bf);
  2334.  
  2335.                     ath_tx_complete_buf(sc, bf, txq,
  2336.                                 &bf_head, NULL, ts,
  2337. @@ -970,7 +978,8 @@ ath_tx_get_tid_subframe(struct ath_softc
  2338.         bf->bf_lastbf = bf;
  2339.  
  2340.         tx_info = IEEE80211_SKB_CB(skb);
  2341. -       tx_info->flags &= ~IEEE80211_TX_CTL_CLEAR_PS_FILT;
  2342. +       tx_info->flags &= ~(IEEE80211_TX_CTL_CLEAR_PS_FILT |
  2343. +                   IEEE80211_TX_STATUS_EOSP);
  2344.  
  2345.         /*
  2346.          * No aggregation session is running, but there may be frames
  2347. @@ -1010,11 +1019,14 @@ ath_tx_get_tid_subframe(struct ath_softc
  2348.  
  2349.             INIT_LIST_HEAD(&bf_head);
  2350.             list_add(&bf->list, &bf_head);
  2351. -           ath_tx_update_baw(sc, tid, seqno);
  2352. +           ath_tx_update_baw(sc, tid, bf);
  2353.             ath_tx_complete_buf(sc, bf, txq, &bf_head, NULL, &ts, 0);
  2354.             continue;
  2355.         }
  2356.  
  2357. +       if (bf_isampdu(bf))
  2358. +           ath_tx_addto_baw(sc, tid, bf);
  2359. +
  2360.         return bf;
  2361.     }
  2362.  
  2363. @@ -1072,8 +1084,6 @@ ath_tx_form_aggr(struct ath_softc *sc, s
  2364.         bf->bf_next = NULL;
  2365.  
  2366.         /* link buffers of this frame to the aggregate */
  2367. -       if (!fi->baw_tracked)
  2368. -           ath_tx_addto_baw(sc, tid, bf);
  2369.         bf->bf_state.ndelim = ndelim;
  2370.  
  2371.         list_add_tail(&bf->list, bf_q);
  2372. @@ -1660,6 +1670,22 @@ void ath_tx_aggr_wakeup(struct ath_softc
  2373.     }
  2374. }
  2375.  
  2376. +
  2377. +static void
  2378. +ath9k_set_moredata(struct ath_softc *sc, struct ath_buf *bf, bool val)
  2379. +{
  2380. +   struct ieee80211_hdr *hdr;
  2381. +   u16 mask = cpu_to_le16(IEEE80211_FCTL_MOREDATA);
  2382. +   u16 mask_val = mask * val;
  2383. +
  2384. +   hdr = (struct ieee80211_hdr *) bf->bf_mpdu->data;
  2385. +   if ((hdr->frame_control & mask) != mask_val) {
  2386. +       hdr->frame_control = (hdr->frame_control & ~mask) | mask_val;
  2387. +       dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
  2388. +           sizeof(*hdr), DMA_TO_DEVICE);
  2389. +   }
  2390. +}
  2391. +
  2392. void ath9k_release_buffered_frames(struct ieee80211_hw *hw,
  2393.                    struct ieee80211_sta *sta,
  2394.                    u16 tids, int nframes,
  2395. @@ -1690,12 +1716,11 @@ void ath9k_release_buffered_frames(struc
  2396.             if (!bf)
  2397.                 break;
  2398.  
  2399. +           ath9k_set_moredata(sc, bf, true);
  2400.             list_add_tail(&bf->list, &bf_q);
  2401.             ath_set_rates(tid->an->vif, tid->an->sta, bf);
  2402. -           if (bf_isampdu(bf)) {
  2403. -               ath_tx_addto_baw(sc, tid, bf);
  2404. +           if (bf_isampdu(bf))
  2405.                 bf->bf_state.bf_type &= ~BUF_AGGR;
  2406. -           }
  2407.             if (bf_tail)
  2408.                 bf_tail->bf_next = bf;
  2409.  
  2410. @@ -1713,6 +1738,9 @@ void ath9k_release_buffered_frames(struc
  2411.     if (list_empty(&bf_q))
  2412.         return;
  2413.  
  2414. +   if (!more_data)
  2415. +       ath9k_set_moredata(sc, bf_tail, false);
  2416. +
  2417.     info = IEEE80211_SKB_CB(bf_tail->bf_mpdu);
  2418.     info->flags |= IEEE80211_TX_STATUS_EOSP;
  2419.  
  2420. @@ -2408,7 +2436,6 @@ void ath_tx_cabq(struct ieee80211_hw *hw
  2421.         .txq = sc->beacon.cabq
  2422.     };
  2423.     struct ath_tx_info info = {};
  2424. -   struct ieee80211_hdr *hdr;
  2425.     struct ath_buf *bf_tail = NULL;
  2426.     struct ath_buf *bf;
  2427.     LIST_HEAD(bf_q);
  2428. @@ -2452,15 +2479,10 @@ void ath_tx_cabq(struct ieee80211_hw *hw
  2429.     if (list_empty(&bf_q))
  2430.         return;
  2431.  
  2432. -   bf = list_first_entry(&bf_q, struct ath_buf, list);
  2433. -   hdr = (struct ieee80211_hdr *) bf->bf_mpdu->data;
  2434. -
  2435. -   if (hdr->frame_control & cpu_to_le16(IEEE80211_FCTL_MOREDATA)) {
  2436. -       hdr->frame_control &= ~cpu_to_le16(IEEE80211_FCTL_MOREDATA);
  2437. -       dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
  2438. -           sizeof(*hdr), DMA_TO_DEVICE);
  2439. -   }
  2440. +   bf = list_last_entry(&bf_q, struct ath_buf, list);
  2441. +   ath9k_set_moredata(sc, bf, false);
  2442.  
  2443. +   bf = list_first_entry(&bf_q, struct ath_buf, list);
  2444.     ath_txq_lock(sc, txctl.txq);
  2445.     ath_tx_fill_desc(sc, bf, txctl.txq, 0);
  2446.     ath_tx_txqaddbuf(sc, txctl.txq, &bf_q, false);
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