library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;

entity Accelerator is
    generic (
        D : integer := 10000;
        N : integer := 32;
        M : integer := 200
    );
    Port (
        clk : in STD_LOGIC;
        reset : in STD_LOGIC;
        feature_values : in STD_LOGIC_VECTOR(N*16-1 downto 0);
        start : in STD_LOGIC;
        done : out STD_LOGIC;
        encoded_hv_ready : out STD_LOGIC;
        bundled_result : out STD_LOGIC_VECTOR(D-1 downto 0);
        im_we : in STD_LOGIC;
        im_addr : in STD_LOGIC_VECTOR(15 downto 0);
        im_data_in : in STD_LOGIC_VECTOR(31 downto 0);
        cm_we : in STD_LOGIC;
        cm_addr : in STD_LOGIC_VECTOR(15 downto 0);
        cm_data_in : in STD_LOGIC_VECTOR(31 downto 0);
        im_data_out : out STD_LOGIC_VECTOR(31 downto 0);
        cm_data_out : out STD_LOGIC_VECTOR(31 downto 0)
    );
end Accelerator;

architecture Behavioral of Accelerator is

    component IdentityMemory
        Port (
            clk : in STD_LOGIC;
            we : in STD_LOGIC;
            addr : in STD_LOGIC_VECTOR(15 downto 0);
            data_in : in STD_LOGIC_VECTOR(31 downto 0);
            data_out : out STD_LOGIC_VECTOR(31 downto 0)
        );
    end component;

    component ContinousMemory
        Port (
            clk : in STD_LOGIC;
            we : in STD_LOGIC;
            addr : in STD_LOGIC_VECTOR(15 downto 0);
            data_in : in STD_LOGIC_VECTOR(31 downto 0);
            data_out : out STD_LOGIC_VECTOR(31 downto 0)
        );
    end component;

    constant CHUNK_WIDTH : integer := 32;
    constant CHUNKS_PER_VEC : integer := (D + CHUNK_WIDTH - 1) / CHUNK_WIDTH;

    type ram_array_type is array(0 to CHUNKS_PER_VEC-1) of std_logic_vector(31 downto 0);
    signal majority_ram : ram_array_type := (others => (others => '0'));

    type counter_array_type is array(0 to 31) of unsigned(4 downto 0);
    signal count_array : counter_array_type := (others => (others => '0'));

    signal state : integer range 0 to 11 := 0;

    signal feature_index : integer range 0 to N-1 := 0;
    signal chunk_counter : integer range 0 to CHUNKS_PER_VEC-1 := 0;
    signal level_index   : integer range 0 to M-1 := 0;

    signal position_chunk : std_logic_vector(31 downto 0) := (others => '0');
    signal level_chunk    : std_logic_vector(31 downto 0) := (others => '0');
    signal bound_chunk    : std_logic_vector(31 downto 0) := (others => '0');

    signal im_addr_mux, cm_addr_mux : std_logic_vector(15 downto 0);
    signal im_data, cm_data : std_logic_vector(31 downto 0);
    signal im_read_en, cm_read_en : std_logic := '0';
    signal test : std_logic := '0';

begin

    -- Identity Memory Address
    process(clk)
    begin
        if rising_edge(clk) then
            if im_we = '1' then
                im_addr_mux <= im_addr;
            elsif im_read_en = '1' then
                im_addr_mux <= std_logic_vector(to_unsigned(feature_index * (CHUNKS_PER_VEC) + chunk_counter, 16));
            end if;
            -- kein else nötig → keine Latch, Wert bleibt im Flip-Flop gespeichert
        end if;
    end process;


    -- Continous Memory Address
    process(clk)
    begin
        if rising_edge(clk) then
            if cm_we = '1' then
                cm_addr_mux <= cm_addr;
            elsif cm_read_en = '1' then
                cm_addr_mux <= std_logic_vector(to_unsigned(level_index * (CHUNKS_PER_VEC) + chunk_counter, 16));
            end if;
        end if;
    end process;


    IM: IdentityMemory port map (
        clk => clk, we => im_we, addr => im_addr_mux, data_in => im_data_in, data_out => im_data
    );

    CIM: ContinousMemory port map (
        clk => clk, we => cm_we, addr => cm_addr_mux, data_in => cm_data_in, data_out => cm_data
    );

    im_data_out <= im_data;
    cm_data_out <= cm_data;

   -- Der Header und alle Konstanten bleiben wie in deiner letzten Version
-- nur der Prozess ab "process(clk, reset)" wurde aktualisiert:
process(clk, reset)
begin
    if reset = '1' then
        state <= 0;
        feature_index <= 0;
        chunk_counter <= 0;
        majority_ram <= (others => (others => '0'));
        count_array <= (others => (others => '0'));
        bundled_result <= (others => '0');
        done <= '0';
        encoded_hv_ready <= '0';
        im_read_en <= '0';
        cm_read_en <= '0';

    elsif rising_edge(clk) then
        case state is

            when 0 => -- IDLE
                if start = '1' then
                    bundled_result <= (others => '0');
                    feature_index <= 0;
                    chunk_counter <= 0;
                    count_array <= (others => (others => '0'));
                    done <= '0';
                    encoded_hv_ready <= '0';
                    state <= 1;
                end if;

            when 1 => -- Set im_read_en (nachdem feature_index gesetzt wurde)
                im_read_en <= '1';
                state <= 2;
            when 2 =>
                state <= 3;
            when 3 => -- Fetch Position + berechne level_index
                im_read_en <= '0';

                level_index <= (to_integer(unsigned(feature_values((feature_index+1)*16-1 downto feature_index*16))) * (M - 1) + 27500) / 55000;
                cm_read_en <= '1';
                state <= 4;

            when 4 => -- Trigger CM Read (mit gültigem level_index)
                position_chunk <= im_data;
                state <= 5;

            when 5 => -- Fetch Level
                cm_read_en <= '0';
                state <= 6;
            when 6 =>
                level_chunk <= cm_data;
                state <= 7;
            when 7 => -- Calculate Bound Chunk
                bound_chunk <= position_chunk xor level_chunk;
                state <= 8;

            when 8 => -- Count '1's in Bound Chunk
                for i in 0 to 31 loop
                    if bound_chunk(i) = '1' then
                        count_array(i) <= count_array(i) + 1;
                    end if;
                end loop;

                if feature_index < N-1 then
                    feature_index <= feature_index + 1;
                    state <= 1;
                else
                    feature_index <= 0;
                    state <= 9;
                end if;

            when 9 => -- Write Majority for current chunk
                for k in 0 to 31 loop
                    if (chunk_counter * 32 + k) < (D+15) then
                        if count_array(k)(4) = '1' then
                            majority_ram(chunk_counter)(k) <= '1';
                        else
                            majority_ram(chunk_counter)(k) <= '0';
                        end if;
                    end if;
                end loop;
                count_array <= (others => (others => '0'));

                if chunk_counter < CHUNKS_PER_VEC-1 then
                    chunk_counter <= chunk_counter + 1;
                    if chunk_counter = 311 then
                        test <= '1';
                    end if;
                    state <= 1;
                else
                    chunk_counter <= 0;
                    state <= 10;
                end if;

            when 10 => -- Output bundled result
                for i in 0 to CHUNKS_PER_VEC-1 loop
                    if i < CHUNKS_PER_VEC-1 then
                        -- bundled_result(D-i*32-1 downto D-(i+1)*32)
                        bundled_result(D-i*32-1 downto D-(i+1)*32) <= majority_ram(i);
                    else
                        for j in 0 to 15 loop
                            bundled_result(D-i*32 - j) <= majority_ram(i)(31-j);
                        end loop;
                    end if;
                end loop;
                encoded_hv_ready <= '1';
                done <= '1';
                majority_ram <= (others => (others => '0'));
                state <= 11;
            when 11 =>
                done <= '0';
                state <= 0;
            when others => -- Wait here until reset
                state <= 0;
        end case;
    end if;
end process;


end Behavioral;