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sn65dsi84 devicetree binding

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Nov 1st, 2022
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  1. #include "imx8mm.dtsi"
  2.  
  3. / {
  4.     backlight: backlight {
  5.         compatible = "pwm-backlight";
  6.         pwms = <&pwm3 0 500000>; /* COM pin 149 tx8m */
  7.         turn-on-delay-ms = <35>;
  8.         power-supply = <&reg_3v3>;
  9.         brightness-levels = < 0  1  2  3  4  5  6  7  8  9
  10.                      10 11 12 13 14 15 16 17 18 19
  11.                      20 21 22 23 24 25 26 27 28 29
  12.                      30 31 32 33 34 35 36 37 38 39
  13.                      40 41 42 43 44 45 46 47 48 49
  14.                      50 51 52 53 54 55 56 57 58 59
  15.                      60 61 62 63 64 65 66 67 68 69
  16.                      70 71 72 73 74 75 76 77 78 79
  17.                      80 81 82 83 84 85 86 87 88 89
  18.                      90 91 92 93 94 95 96 97 98 99
  19.                     100>;
  20.         default-brightness-level = <50>;
  21.         pinctrl-names = "default";
  22.         pinctrl-0 = <&pinctrl_lcd_en>;
  23.         enable-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; /* Enable onboard backlight chip DIM_ENABLE COM pin 154 */
  24.         //status = "okay";
  25.     };
  26.  
  27.     /* if the standard linux sn65 driver is used the screen should be defined something like this.
  28.     av123z7m_n17: lvds_panel {
  29.         compatible = "boe,av123z7m-n17","panel-lvds";
  30.         //backlight = <&backlight>;
  31.         power-supply = <&reg_3v3>;
  32.         width-mm  = <292>;
  33.         height-mm = <109>;
  34.         data-mapping = "vesa-24"; /* linux/documentation/devicetree/bindings/display/panel/lvds.yaml and spec sheet *
  35.         status = "okay";
  36.         reset-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
  37.         enable-gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
  38.         panel-timing {
  39.             clock-frequency = <44100000>;
  40.             hactive = <1920>;
  41.             vactive = <720>;
  42.             hback-porch = <6>;
  43.             hfront-porch = <5>;
  44.             vback-porch = <2>;
  45.             vfront-porch = <3>;
  46.             hsync-len = <2>;
  47.             vsync-len = <1>;
  48.  
  49.         };
  50.  
  51.         ports {
  52.             #address-cells = <1>;
  53.             #size-cells = <0>;
  54.             port@0 {
  55.                 reg = <0>;
  56.                 dual-lvds-odd-pixels;
  57.                 panel_lvds_in_A: endpoint {
  58.                     remote-endpoint = <&dsi_lvds_bridge_out_A>;
  59.                 };
  60.             };
  61.             port@1 {
  62.                 reg = <1>;
  63.                 dual-lvds-even-pixels;
  64.                 panel_lvds_in_B: endpoint {
  65.                     remote-endpoint = <&dsi_lvds_bridge_out_B>;
  66.                 };
  67.             };
  68.         };
  69.     };
  70.     */
  71. };
  72.  
  73. &i2c4 {
  74.     pinctrl-names = "default", "gpio";
  75.     pinctrl-0 = <&pinctrl_i2c4>;
  76.     pinctrl-1 = <&pinctrl_i2c4_gpio>;
  77.     scl-gpios = <&gpio5 20 GPIO_ACTIVE_HIGH>;
  78.     sda-gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>;
  79.     clock-frequency = <400000>;
  80.     status = "okay";
  81.  
  82.     #address-cells = <1>;
  83.     #size-cells = <0>;
  84.    
  85.     dsi_lvds_bridge: sn65dsi83@2d {
  86.         compatible = "ti,sn65dsi83";
  87.         reg = <0x2d>;
  88.         enable-gpio = <&gpio3 10 GPIO_ACTIVE_HIGH>; /* SN65_EN COM pin 96 */
  89.         enable-panel-gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>; /* screen enable COM pin 157 */
  90.         ti,lvds-channels= <2>;
  91.         pinctrl-names = "default";
  92.         pinctrl-0 = <&pinctrl_lvds>;
  93.  
  94.         /* panel initialisation like this is only done with the driver present on the variscite kernel. */
  95.         display-timings {
  96.             lvds {
  97.                 clock-frequency = <62500000>;
  98.                 hactive = <1920>;
  99.                 vactive = <720>;
  100.                 hback-porch = <6>;
  101.                 hfront-porch = <5>;
  102.                 vback-porch = <2>;
  103.                 vfront-porch = <3>;
  104.                 hsync-len = <2>;
  105.                 vsync-len = <1>;
  106.                 hsync-active = <0>;
  107.                 vsync-active = <0>;
  108.                 de-active = <1>;
  109.                 pixelclk-active = <0>;
  110.             };
  111.         };
  112.  
  113.         ports {
  114.             #address-cells = <1>;
  115.             #size-cells = <0>;
  116.             port@0 {
  117.                 reg = <0>;
  118.                 dsi_lvds_bridge_in: endpoint {
  119.                     remote-endpoint = <&mipi_dsi_out>;
  120.                     data-lanes = <0 1 2 3>;
  121.                 };
  122.             };
  123.     //      /* if the standard kernel driver is used this block should be present with these remote-endpoints linking to a screen definition. https://github.com/varigit/linux-imx/tree/lf-5.10.y_var04/drivers/gpu/drm/bridge/sn65dsi83
  124.     //      port@2 {
  125.     //          reg = <2>;
  126.     //          dual-lvds-odd-pixels;
  127.     //          dsi_lvds_bridge_out_A: endpoint {
  128.     //              remote-endpoint = <&panel_lvds_in_A>;
  129.     //          };
  130.     //      };
  131.     //         port@3 {
  132.     //             reg = <3>;
  133.     //          dual-lvds-even-pixels;
  134.     //             dsi_lvds_bridge_out_B: endpoint {
  135.     //              remote-endpoint = <&panel_lvds_in_B>;
  136.     //          };
  137.     //         };
  138.     //      */
  139.            
  140.         };
  141.     };
  142. };
  143.  
  144. &lcdif {
  145.     status = "okay";
  146. };
  147.  
  148. &mipi_dsi {
  149.     status = "okay";
  150.     port@1 {
  151.         mipi_dsi_out: endpoint {
  152.             remote-endpoint = <&dsi_lvds_bridge_in>;
  153.             data-lanes = <0 1 2 3>;
  154.             attach-bridge;
  155.         };
  156.     };
  157. };
  158.  
  159. &iomuxc {
  160.     pinctrl_i2c4: i2c4grp {
  161.         fsl,pins = <
  162.             MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL          0x400001d6 /* I2C3 SCL on 150 of COM */
  163.             MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA          0x400001d6 /* I2C3 SDA on 151 of COM */
  164.         >;
  165.     };
  166.  
  167.     pinctrl_i2c4_gpio: i2c4-gpiogrp {
  168.         fsl,pins = <
  169.             MX8MM_IOMUXC_I2C4_SCL_GPIO5_IO20        0x400001d6 /* I2C3 SCL on 150 of COM */
  170.             MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21        0x400001d6 /* I2C3 SDA on 151 of COM */
  171.         >;
  172.     };
  173.  
  174.     pinctrl_lvds: lvdsgrp {
  175.         fsl,pins = <
  176.             MX8MM_IOMUXC_SAI1_TXD7_GPIO4_IO19       0x156
  177.         >;
  178.     };
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