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Sep 14th, 2019
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  1. hwdef-FW3A.h
  2.  
  3.  
  4. #ifndef HWDEF_FW3A_H
  5. #define HWDEF_FW3A_H
  6.  
  7. /* BLF/TLF FW3A driver layout
  8.  *           ----
  9.  *   Reset -|1  8|- VCC
  10.  * eswitch -|2  7|- optic nerve
  11.  *     FET -|3  6|- 7x7135
  12.  *     GND -|4  5|- 1x7135
  13.  *           ----
  14.  */
  15.  
  16. #define PWM_CHANNELS 3
  17.  
  18. #ifndef SWITCH_PIN
  19. #define SWITCH_PIN   PB3    // pin 2
  20. #define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt
  21. #endif
  22.  
  23. #ifndef PWM1_PIN
  24. #define PWM1_PIN PB0        // pin 5, 1x7135 PWM
  25. #define PWM1_LVL OCR0A      // OCR0A is the output compare register for PB0
  26. #endif
  27. #ifndef PWM2_PIN
  28. #define PWM2_PIN PB1        // pin 6, 7x7135 PWM
  29. #define PWM2_LVL OCR0B      // OCR0B is the output compare register for PB1
  30. #endif
  31. #ifndef PWM3_PIN
  32. #define PWM3_PIN PB4        // pin 3, FET PWM
  33. #define PWM3_LVL OCR1B      // OCR1B is the output compare register for PB4
  34. #endif
  35.  
  36. #define ADC_PRSCL   0x06    // clk/64
  37.  
  38. // start adding aux support
  39. #ifndef AUXLED_PIN
  40. #define AUXLED_PIN PB2 // pin 7
  41. #endif
  42. // end adding aux support
  43.  
  44. // average drop across diode on this hardware
  45. #ifndef VOLTAGE_FUDGE_FACTOR
  46. #define VOLTAGE_FUDGE_FACTOR 5  // add 0.25V
  47. #endif
  48.  
  49. //#define TEMP_DIDR   ADC4D
  50. #define TEMP_CHANNEL 0b00001111
  51.  
  52. #define FAST 0xA3           // fast PWM both channels
  53. #define PHASE 0xA1          // phase-correct PWM both channels
  54.  
  55. #define LAYOUT_DEFINED
  56.  
  57. #endif
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