ISR(ADC_vect){
    ad[channel] = ADCH; // Store the result (8 -bits, discard the 3 LSB)
    ADCSRA &= ~(1 << ADEN); // Disable the ADC
    if(channel<7){ //Cycle trough the channels 0-4
        channel ++;
        ADMUX |= channel;//Update the ADMUX register
        ADCSRA |= (1 << ADEN); // Enable the ADC
    }
    else if (channel == 7){
    cli(); // disable interrupts for now
    newSampleReady = 1; // 7 channels sampled
    channel = 0; // Reset to channel 0
    ADMUX = channel; //Update the ADMUX register
    }
}