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- library IEEE;
- use IEEE.STD_LOGIC_1164.ALL;
- entity tb_sqrt is
- generic(WIDTH:natural:=8);
- -- Port ( );
- end tb_sqrt;
- architecture Behavioral of tb_sqrt is
- signal clk_s,reset_s,start_s,ready_s:std_logic;
- signal a_in_s,b_in_s:std_logic_vector(WIDTH-1 downto 0);
- signal res_s:std_logic_vector(2*WIDTH-1 downto 0);
- begin
- duv:entity work.booths_algorithm(Behavioral)
- port map(
- clk=>clk_s,
- reset=>reset_s,
- start=>start_s,
- ready=>ready_s,
- a_in=>a_in_s,
- b_in=>b_in_s,
- res=>res_s
- );
- clk_gen:process is
- begin
- clk_s<='0','1' after 100 ns;
- wait for 200 ns;
- end process;
- stim_gen:process is
- begin
- wait until falling_edge(clk_s);
- reset_s<='1';
- wait until falling_edge(clk_s);
- reset_s<='0';
- start_s<='0','1' after 200 ns;
- a_in_s<=x"03",x"05" after 4800 ns,x"78" after 9400 ns; --120
- b_in_s<=x"FC",x"FD" after 4800 ns,x"81" after 9400 ns; -- -127 -> 120*(-127)= -15240
- wait;
- end process;
- end Behavioral;
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