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- void InitCAN_0(uint8_t bootloadMessageID) { /* General init. No MB IDs initialized */
- uint8_t i;
- CAN_0.MCR.B.MDIS = 1; /* Disable module before selecting clock source*/
- //0-FXOSR 1-BUS CLOCK
- // CAN_0.CTRL1.B.CLKSRC=0; /* Clock Source = oscillator clock (40 MHz) */
- CAN_0.MCR.B.FRZ = 1;
- CAN_0.MCR.B.MDIS = 0; /* Enable module for config. (Sets FRZ, HALT)*/
- while (!CAN_0.MCR.B.FRZACK) {} /* Wait for freeze acknowledge to set */
- //CAN_0.CTRL1.R = 0x04DB0086; /* CAN bus: 40 MHz clksrc, 500K bps with 16 tq */
- /* PRESDIV+1 = Fclksrc/Ftq = 40 MHz/8MHz = 5 */
- /* so PRESDIV = 4 */
- /* PSEG2 = Phase_Seg2 - 1 = 4 - 1 = 3 */
- /* PSEG1 = PSEG2 = 3 */
- /* PROPSEG= Prop_Seg - 1 = 7 - 1 = 6 */
- /* RJW = Resync Jump Width - 1 = 4 = 1 */
- /* SMP = 1: use 3 bits per CAN sample */
- /* CLKSRC=0 (unchanged): Fcanclk= Fxtal= 40 MHz*/
- for (i=0; i<64; i++) {
- CAN_0.MB[i].CS.B.CODE = 0; /* Inactivate all message buffers */
- }
- CAN_0.MB[1].CS.B.CODE = 8; /* Message Buffer 0 set to TX INACTIVE */
- CAN_0.MB[0].CS.B.IDE = 0; /* MB 4 will look for a standard ID */
- CAN_0.MB[0].ID.B.ID_STD = bootloadMessageID; /* MB 4 will look for ID */
- CAN_0.MB[0].CS.B.CODE = 4; /* MB 4 set to RX EMPTY */
- CAN_0.RXMGMASK.R = 0x1FFFFFFF; /* Global acceptance mask */
- CAN_0.CTRL1.B.CLKSRC=0; /* Clock Source = oscillator clock (40 MHz) */
- // Set for baud rate to 1000 1Mbit
- //Prescaler Division Factor: 5
- CAN_0.CTRL1.B.PRESDIV = 4;
- //Re-synchronization Jump Width: 1
- CAN_0.CTRL1.B.RJW = 0;
- //Phase Segment1: 3
- CAN_0.CTRL1.B.PSEG1 = 2;
- //Phase Segment2: 2
- CAN_0.CTRL1.B.PSEG2 = 1;
- //Propagation Segment: 2
- CAN_0.CTRL1.B.PROPSEG = 1;
- //Use 3 bits per CAN sample
- CAN_0.CTRL1.B.SMP=1;
- /* Configure the CAN0_TX pin to transmit. */
- SIUL2.MSCR[16].B.SSS = 1; /* Pad PB0: Source signal is CAN0_TX */
- SIUL2.MSCR[16].B.OBE = 1; /* Pad PB0: Output Buffer Enable */
- SIUL2.MSCR[16].B.SRC = 3; /* Pad PB0: Maximum slew rate */
- /* Configure the CAN0_RX pin. */
- SIUL2.MSCR[17].B.IBE = 1; /* Pad PB1: Enable pad for input - CAN0_RX */
- SIUL2.IMCR[32].B.SSS = 2; /* CAN0_RX: connected to pad PB1 */
- CAN_0.MCR.R = 0x0000003F; /* Negate FlexCAN 0 halt state for 64 MB */
- while (CAN_0.MCR.B.FRZACK & CAN_0.MCR.B.NOTRDY) {} /* Wait to clear */
- /* Good practice: wait for FRZACK on freeze mode entry/exit */
- }
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