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- architecture Behavioral of fsmmc1 is
- signal cntval : STD_LOGIC_VECTOR(26 downto 0);
- signal e : STD_LOGIC_VECTOR(2 downto 0);
- signal mode : STD_LOGIC;
- signal RES_IN : STD_LOGIC;
- signal t1 : STD_LOGIC;
- signal t2 : STD_LOGIC;
- signal t3 : STD_LOGIC;
- signal t4 : STD_LOGIC;
- signal t5 : STD_LOGIC;
- signal m1 : STD_LOGIC;
- signal m0 : STD_LOGIC;
- signal mode : STD_LOGIC;
- signal n : integer;
- begin
- e(2) <= cntval(26);
- e(1) <= cntval(25);
- e(0) <= cntval(24);
- n <= to_integer(unsigned(e));
- process (CLK, RES_IN, MODE_UP) begin
- if RES_IN = '1' then
- cntval <= "000000000000000000000000000";
- elsif (CLK'event and clk='1') then
- if (MODE_UP = '1') then
- cntval <= cntval+1;
- else
- cntval <= cntval-1;
- end if;
- else
- end if;
- end process;
- process(mode,n)
- begin
- t1 <= '0';
- t2 <= '0';
- t3 <= '0';
- t4 <= '0';
- t5 <= '0';
- m1 <= '0';
- m0 <= '0';
- mode <= '0';
- case mode is
- when 0 =>
- m0 => '1';
- when 1 =>
- m1 => '1';
- case n is
- when 0 =>
- t1 <= '1';
- when 1 =>
- t2 <= '1';
- when 2 =>
- t3 <= '1';
- when 3 =>
- case mode is
- when 0 =>
- t1 <= '1';
- n = 0;
- when 1 =>
- t4 <= '1';
- when 4 =>
- t5 <= '1';
- when 5 =>
- t1 <= '1';
- n = 0;
- when others =>
- n <= '0';
- end case;
- end process;
- LED0 <= t1;
- LED1 <= t2;
- LED2 <= t3;
- LED3 <= t4;
- LED4 <= t5;
- LED5 <= m1;
- LED6 <= m0;
- LED7 <= mode;
- end Behavioral;
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