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Jul 7th, 2018
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VHDL 0.33 KB | None | 0 0
  1. procedure w_rand(lo: integer; hi: integer) is
  2. variable R: real;
  3. variable S1, S2, c: positive := 55;
  4. begin
  5.         uniform(S1, S2, R);
  6.         R := R * real(hi - lo) + real(lo);
  7.         c := positive(floor(R));
  8.         loop
  9.                 w;
  10.                 c := c - 1;
  11.                 exit when c = 1;
  12.         end loop;
  13. end;
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