phillip_bourdon234

ShotDeliverSystem_Dispensary_Configbits.h

Jun 10th, 2020 (edited)
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  1. // A demonstration of this project can be found here: https://bit.ly/2Ynx09x
  2.  
  3. #ifndef SHOT_DELIVERY_SYSTEM_H
  4. #define SHOT_DELIVERY_SYSTEM_H
  5.  
  6. #include <xc.h>
  7.  
  8. #define _XTAL_FREQ 8000000
  9. // PIC18F4520 Configuration Bit Settings
  10.  
  11. // 'C' source line config statements
  12.  
  13. // CONFIG1H
  14. #pragma config OSC = INTIO67    // Oscillator Selection bits (Internal oscillator block, port function on RA6 and RA7)
  15. #pragma config FCMEN = OFF      // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
  16. #pragma config IESO = OFF       // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)
  17.  
  18. // CONFIG2L
  19. #pragma config PWRT = OFF       // Power-up Timer Enable bit (PWRT disabled)
  20. #pragma config BOREN = OFF  // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
  21. #pragma config BORV = 3         // Brown Out Reset Voltage bits (Minimum setting)
  22.  
  23. // CONFIG2H
  24. #pragma config WDT = OFF        // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
  25. #pragma config WDTPS = 32768    // Watchdog Timer Postscale Select bits (1:32768)
  26.  
  27. // CONFIG3H
  28. #pragma config CCP2MX = PORTC   // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
  29. #pragma config PBADEN = OFF      // PORTB A/D Enable bit (PORTB<4:0> pins are configured as analog input channels on Reset)
  30. #pragma config LPT1OSC = OFF    // Low-Power Timer1 Oscillator Enable bit (Timer1 configured for higher power operation)
  31. #pragma config MCLRE = OFF      // MCLR Pin Enable bit (RE3 input pin enabled; MCLR disabled)
  32.  
  33. // CONFIG4L
  34. #pragma config STVREN = OFF      // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
  35. #pragma config LVP = ON         // Single-Supply ICSP Enable bit (Single-Supply ICSP enabled)
  36. #pragma config XINST = OFF      // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
  37.  
  38. // CONFIG5L
  39. #pragma config CP0 = OFF        // Code Protection bit (Block 0 (000800-001FFFh) not code-protected)
  40. #pragma config CP1 = OFF        // Code Protection bit (Block 1 (002000-003FFFh) not code-protected)
  41. #pragma config CP2 = OFF        // Code Protection bit (Block 2 (004000-005FFFh) not code-protected)
  42. #pragma config CP3 = OFF        // Code Protection bit (Block 3 (006000-007FFFh) not code-protected)
  43.  
  44. // CONFIG5H
  45. #pragma config CPB = OFF        // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
  46. #pragma config CPD = OFF        // Data EEPROM Code Protection bit (Data EEPROM not code-protected)
  47.  
  48. // CONFIG6L
  49. #pragma config WRT0 = OFF       // Write Protection bit (Block 0 (000800-001FFFh) not write-protected)
  50. #pragma config WRT1 = OFF       // Write Protection bit (Block 1 (002000-003FFFh) not write-protected)
  51. #pragma config WRT2 = OFF       // Write Protection bit (Block 2 (004000-005FFFh) not write-protected)
  52. #pragma config WRT3 = OFF       // Write Protection bit (Block 3 (006000-007FFFh) not write-protected)
  53.  
  54. // CONFIG6H
  55. #pragma config WRTC = OFF       // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
  56. #pragma config WRTB = OFF       // Boot Block Write Protection bit (Boot block (000000-0007FFh) not write-protected)
  57. #pragma config WRTD = OFF       // Data EEPROM Write Protection bit (Data EEPROM not write-protected)
  58.  
  59. // CONFIG7L
  60. #pragma config EBTR0 = OFF      // Table Read Protection bit (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
  61. #pragma config EBTR1 = OFF      // Table Read Protection bit (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
  62. #pragma config EBTR2 = OFF      // Table Read Protection bit (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks)
  63. #pragma config EBTR3 = OFF      // Table Read Protection bit (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks)
  64.  
  65. // CONFIG7H
  66. #pragma config EBTRB = OFF      // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) not protected from table reads executed in other blocks)
  67.  
  68. // #pragma config statements should precede project file includes.
  69. // Use project enums instead of #define for ON and OFF.
  70.  
  71.  
  72. #endif  /* SHOT_DELIVERY_SYSTEM_H */
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