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Florii11

bistabil_D

Mar 30th, 2021
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  1. library IEEE;
  2. use IEEE.STD_LOGIC_1164.all;
  3.  
  4. entity bistabil_D is
  5.     port(D,EN,S,R,CLK:in std_logic; Q: out std_logic);
  6. end entity;
  7.  
  8. architecture comportamentala of bistabil_D is
  9. begin
  10.     process(EN,CLK,S,R)
  11.     begin
  12.         if(EN='1') then
  13.             if(S='0' and R='1') then Q<='1';
  14.             elsif (R='0' and S='1')then Q<='0';
  15.             elsif (R='0' and S='0') then Q<='Z';
  16.             elsif(CLK'event and (CLK='1')) then Q<=D;
  17.             end if;
  18.         else
  19.             Q<='Z';
  20.         end if;
  21.     end process;
  22. end architecture;
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