clock tree stm32h745xih6

void cache_enable_m7(){
    SCB_EnableICache();
    SCB_EnableDCache();
    SCB->CACR |= 1 << 2;
}
void clock_init_m7(){
    HAL_StatusTypeDef ret = HAL_OK;
    RCC_ClkInitTypeDef rccclk;
    RCC_OscInitTypeDef rccosc;
    HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY);
    __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
    while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)){}
    rccosc.OscillatorType = RCC_OSCILLATORTYPE_HSE;
    rccosc.HSEState = RCC_HSE_ON;
    rccosc.HSI48State = RCC_HSI_OFF;
    rccosc.CSIState = RCC_CSI_OFF;
    rccosc.PLL.PLLState = RCC_PLL_ON;
    rccosc.PLL.PLLSource = RCC_PLLSOURCE_HSE;
    rccosc.PLL.PLLFRACN = 0;
    rccosc.PLL.PLLM = CLOCK_PLLM;
    rccosc.PLL.PLLN = CLOCK_PLLN;
    rccosc.PLL.PLLP = CLOCK_PLLP;
    rccosc.PLL.PLLQ = CLOCK_PLLQ;
    rccosc.PLL.PLLR = CLOCK_PLLR;
    rccosc.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
    rccosc.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
    ret = HAL_RCC_OscConfig(&rccosc);
    if(ret){
        for(;;){
            ;
        }
    }
    rccclk.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D3PCLK1);
    rccclk.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
    rccclk.SYSCLKDivider = RCC_SYSCLK_DIV1;
    rccclk.AHBCLKDivider = RCC_HCLK_DIV2;
    rccclk.APB1CLKDivider = RCC_APB1_DIV2;
    rccclk.APB2CLKDivider = RCC_APB2_DIV2;
    rccclk.APB3CLKDivider = RCC_APB3_DIV2;
    rccclk.APB4CLKDivider = RCC_APB4_DIV4;
    ret = HAL_RCC_ClockConfig(&rccclk, FLASH_LATENCY_3);
    if(ret)for(;;);
    __HAL_RCC_CSI_ENABLE();
    __HAL_RCC_SYSCFG_CLK_ENABLE();
    HAL_EnableCompensationCell();
    __HAL_RCC_GPIOA_CLK_ENABLE();
    __HAL_RCC_GPIOB_CLK_ENABLE();
    __HAL_RCC_GPIOC_CLK_ENABLE();
    __HAL_RCC_GPIOD_CLK_ENABLE();
    __HAL_RCC_GPIOE_CLK_ENABLE();
    __HAL_RCC_GPIOF_CLK_ENABLE();
    __HAL_RCC_GPIOG_CLK_ENABLE();
    __HAL_RCC_GPIOH_CLK_ENABLE();
    __HAL_RCC_GPIOI_CLK_ENABLE();
    __HAL_RCC_GPIOJ_CLK_ENABLE();
    __HAL_RCC_GPIOK_CLK_ENABLE();
}