LIBRARY IEEE;

USE ieee.std_logic_1164.ALL;

-- JEDNOSTKA SUMATORA JEDNOBITOWEGO PELNEGO
-- FA = FULL ADDER
ENTITY FA IS
PORT
(
    a, b, cin : in std_logic;
    s, cout     : out std_logic
);
END FA;

-- ARCHITEKTURA SUMATORA JEDNOBITOWEGO PELNEGO
ARCHITECTURE strukturalna OF FA IS
BEGIN
    s <= (a XOR b) XOR cin;
    cout <= ((a XOR b) AND cin) or (a AND b);
END ARCHITECTURE;