library ieee;
use ieee.std_logic_1164.all;
entity sig_var is
    port(   L1: in bit_vector(3 downto 0);
                L2: in bit_vector(3 downto 0);
                L3: in bit_vector(3 downto 0);
                L4: in bit_vector(3 downto 0);
                clr, clk: in bit;
                W1: out bit_vector(6 downto 0);
                W2: out bit_vector(6 downto 0);
                W3: out bit_vector(6 downto 0);
                W4: out bit_vector(6 downto 0);
                W5: out bit_vector(6 downto 0);
                W6: out bit_vector(6 downto 0);
                W7: out bit_vector(6 downto 0);
                W8: out bit_vector(6 downto 0));
end sig_var;
architecture behv of sig_var is
begin
    proc1: process(L1,L2,L3,L4)
    begin
        case L1 is
            when "0000" => w1 <= "1110111";
            when "0001" => w1 <= "0010010";
            when "0010" => w1 <= "1011101";
            when "0011" => w1 <= "1011011";
            when "0100" => w1 <= "0111010";
            when "0101" => w1 <= "1101011";
            when "0110" => w1 <= "1101111";
            when "0111" => w1 <= "1010010";
            when "1000" => w1 <= "1111111";
            when "1001" => w1 <= "1111011";
            when "1010" => w1 <= "1111110";
            when "1011" => w1 <= "0011111";
            when "1100" => w1 <= "1100101";
            when "1101" => w1 <= "0101111";
            when "1110" => w1 <= "1101101";
            when "1111" => w1 <= "1101100";
        end case;
        case L2 is
            when "0000" => w2 <= "1110111";
            when "0001" => w2 <= "0010010";
            when "0010" => w2 <= "1011101";
            when "0011" => w2 <= "1011011";
            when "0100" => w2 <= "0111010";
            when "0101" => w2 <= "1101011";
            when "0110" => w2 <= "1101111";
            when "0111" => w2 <= "1010010";
            when "1000" => w2 <= "1111111";
            when "1001" => w2 <= "1111011";
            when "1010" => w2 <= "1111110";
            when "1011" => w2 <= "0011111";
            when "1100" => w2 <= "1100101";
            when "1101" => w2 <= "0101111";
            when "1110" => w2 <= "1101101";
            when "1111" => w2 <= "1101100";
        end case;
        case L3 is
            when "0000" => w3 <= "1110111";
            when "0001" => w3 <= "0010010";
            when "0010" => w3 <= "1011101";
            when "0011" => w3 <= "1011011";
            when "0100" => w3 <= "0111010";
            when "0101" => w3 <= "1101011";
            when "0110" => w3 <= "1101111";
            when "0111" => w3 <= "1010010";
            when "1000" => w3 <= "1111111";
            when "1001" => w3 <= "1111011";
            when "1010" => w3 <= "1111110";
            when "1011" => w3 <= "0011111";
            when "1100" => w3 <= "1100101";
            when "1101" => w3 <= "0101111";
            when "1110" => w3 <= "1101101";
            when "1111" => w3 <= "1101100";
        end case;
        case L4 is
            when "0000" => w4 <= "1110111";
            when "0001" => w4 <= "0010010";
            when "0010" => w4 <= "1011101";
            when "0011" => w4 <= "1011011";
            when "0100" => w4 <= "0111010";
            when "0101" => w4 <= "1101011";
            when "0110" => w4 <= "1101111";
            when "0111" => w4 <= "1010010";
            when "1000" => w4 <= "1111111";
            when "1001" => w4 <= "1111011";
            when "1010" => w4 <= "1111110";
            when "1011" => w4 <= "0011111";
            when "1100" => w4 <= "1100101";
            when "1101" => w4 <= "0101111";
            when "1110" => w4 <= "1101101";
            when "1111" => w4 <= "1101100";
        end case;
    end process;
    proc2: process(L1)
    begin
        IF clk= '1' THEN
            case L1 is
                when "0000" => w5 <= "1110111";
                when "0001" => w5 <= "0010010";
                when "0010" => w5 <= "1011101";
                when "0011" => w5 <= "1011011";
                when "0100" => w5 <= "0111010";
                when "0101" => w5 <= "1101011";
                when "0110" => w5 <= "1101111";
                when "0111" => w5 <= "1010010";
                when "1000" => w5 <= "1111111";
                when "1001" => w5 <= "1111011";
                when "1010" => w5 <= "1111110";
                when "1011" => w5 <= "0011111";
                when "1100" => w5 <= "1100101";
                when "1101" => w5 <= "0101111";
                when "1110" => w5 <= "1101101";
                when "1111" => w5 <= "1101100";
            end case;
        END IF;
    end process;
end behv;