TheLegace

CSE3215_Exam

Apr 10th, 2012
66
0
Never
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
C 2.53 KB | None | 0 0
  1.  
  2. #pragma CODE_SEG __NEAR_SEG NON_BANKED
  3. interrupt void RTI_ISR(void) {
  4.   absoluteTime++;
  5.   /* clear RTIF bit */
  6.   CRGFLG = 0x80;  
  7. }
  8.  
  9. #pragma CODE_SEG __NEAR_SEG NON_BANKED
  10. interrupt void TOF_ISR(void) {
  11.     PORTA = PORTA+1;
  12.     TFLG2 = 0x80;
  13. }
  14.  
  15.  
  16.  
  17. #pragma CODE_SEG DEFAULT
  18. static void RTIInit(void) {
  19.   /* setup of the RTI interrupt frequency */
  20.   /* adjusted to get 1 millisecond (1.024 ms) with 16 MHz oscillator */
  21.   RTICTL = 0x1F; /* set RTI prescaler */  
  22.   CRGINT = 0x80; /* enable RTI interrupts */
  23. }
  24.  
  25. static void TimerInit(void){
  26.     DDRA = 0xFF; /* PORTA output*/
  27.     TSCR1 = 0x80; /* Turn on timer*/
  28.     TSRC2 = 0x85; /*Enable timer overflow, set prescalar */
  29.     TFLG2 = 0x80; /*Clear timer interrupt flag*/
  30. }
  31.  
  32. static void PWMInit(void){
  33.     PWMCTL = 0x00;  /* 8-bit Mode */
  34.     PWMPOL = 0xFF;  /* High polarity mode */
  35.     PWMCAE = 0x00;  /* Left-Aligned */
  36.     PWMPRCLK = PWMPRCLK & ~0x07;  /* PCKA = 0 */
  37.     PWMCLK = PWMCLK | 0x01;  /* PCLK0 = 1 */
  38.     PWMSCLA = 30;
  39.     PWMPER0 = 200;
  40.     PWME = PWME | 0x01;  /* Enable PWM Channel 0 */
  41.     PWDTY0 = 120;  /* 60% duty cycle on Channel 0 */
  42. }
  43.  
  44. static void SPI0_Init(void){
  45.     // SPI communication initialization as a master
  46.     SPI0BR  = 0b00100101;    // Baud rate = 24MHz/16 = 1.5MHz 0x53;
  47.     SPI0CR2 = 0b00010000;  // SPI0CR2_SPISWAI=1 : Stop SPI clocks when in wait mode
  48.     SPI0CR1 = 0b01010010;  // Enable SPI ; Master mode ; CPHA = 1 ;
  49.  
  50.     WOMS = 0;
  51. }
  52.  
  53. static void SPI0_send(char x){
  54.     // Send a byte to the slave blocking(CPU will wait)
  55.     while( SPI0SR_SPTEF == 0); // Wait until SPIDR becomes empty.
  56.     SPI0DR = 0xAA;              //  Clear the flag SPI0SR_STEF
  57.  
  58.     while( SPI0SR_SPIF == 0 );   // Wait until the end of an SPI transfer.  
  59.     data = SPI0DR;
  60. }
  61.  
  62. char SPI0_receive(void) {
  63.     // Receive a byte from the slave
  64.     while(SPI0SR_SPTEF == 0);  // Wait until the SPI0DR is empty
  65.     SPI0DR = 0x00;                         // Read SPI0DR to clear the SPI0SR_SPTEF flag
  66.     while(SPI0SR_SPIF == 0);      // Wait until a SPI transfer is finished  
  67.     return SPI0DR;                         // Write the received data to data    
  68. }
  69.  
  70.  
  71.  void main(void)
  72.   RTIInit();
  73.   TimerInit();
  74.   PWMInit();
  75.   SPI0_Init();
  76.   EnableInterrupts;
  77.  
  78.   SPI0_send('a');
  79.  
  80.   for(;;)
  81.   {
  82.      
  83.   }
  84.  
  85. /* Interrupt Vector Table
  86.  * const IsrFunc _vectab[] @0x3e00 /*0xFF80 =
  87. {
  88.   (IsrFunc)0,                                        
  89.   (RTI_ISR)0,                           RTI 0xFFF0
  90.   (TOF_ISR)0,                               Timer Overflow 0xFFDE              
  91.   (IsrFunc)0,                                      
  92. */
Advertisement
Add Comment
Please, Sign In to add comment