ROM from MUX code

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;

entity rom_2 is
generic(
    address_length: natural := 2;
    data_length: natural := 4
);
port(
    clock: in std_logic;
    rom_enable: in std_logic;
    address: in std_logic_vector((address_length - 1) downto 0);
    data_output: out std_logic_vector ((data_length - 1) downto 0)
);
end rom_2;

architecture arch of rom_2 is

begin

process(clock) is
begin
    if(rising_edge(clock) and rom_enable = '1') then
        if(address="00") then
            data_output <= "1001";
        elsif(address="01") then
                data_output <= "0110";
        elsif(address="10") then
                data_output <= "0000";
        elsif(address="11") then
                data_output <= "1111";
        end if;
    end if;
end process;

end arch;