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startup_hardware_init.s

sreejith2904
Mar 12th, 2011
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  1. /*
  2.     TNKernel startup hardware init for LPC21XX(LPC22XX) processor
  3.     (for Rowley Associates Ltd.(R) CrossStudio(C) IDE
  4.      and any other IDE uses GCC compiler)
  5.  
  6.     GCC ARM assembler
  7.  
  8. Copyright © 2004,2005 Yuri Tiomkin
  9. All rights reserved.
  10.  
  11. Permission to use, copy, modify, and distribute this software in source
  12. and binary forms and its documentation for any purpose and without fee
  13. is hereby granted, provided that the above copyright notice appear
  14. in all copies and that both that copyright notice and this permission
  15. notice appear in supporting documentation.
  16.  
  17. THIS SOFTWARE IS PROVIDED BY THE YURI TIOMKIN AND CONTRIBUTORS ``AS IS'' AND
  18. ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  19. IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  20. ARE DISCLAIMED. IN NO EVENT SHALL YURI TIOMKIN OR CONTRIBUTORS BE LIABLE
  21. FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  22. DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  23. OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  24. HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  25. LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  26. OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  27. SUCH DAMAGE.
  28. */
  29.  
  30.   .equ    MC_FMR,    0xFFFFFF60
  31.   .equ    WDT_MR,    0xFFFFFD44
  32.   .equ    CKGR_MOR,  0xFFFFFC20
  33.   .equ    PMC_SR,    0xFFFFFC68
  34.   .equ    CKGR_PLLR, 0xFFFFFC2C
  35.   .equ    PMC_MCKR,  0xFFFFFC30
  36.   .equ    MC_RCR,    0xFFFFFF00
  37.  
  38.   .equ    NOINT,     0xc0
  39.  
  40.  
  41.   .text
  42.   .code 32
  43.   .align 0
  44.  
  45.   .global tn_startup_hardware_init
  46.   .global tn_arm_disable_interrupts
  47.   .global tn_arm_enable_interrupts
  48.  
  49. rMAMTIM:         .word  0xE01FC004
  50. rMAMCR:          .word  0xE01FC000
  51.  
  52. /*----------------------------------------------------------------------------
  53. //  This routine is called immediately after reset to setup hardware that is
  54. // vital for processor's functionality (for instance,SDRAM controller setup,
  55. // PLL setup,etc.)
  56. //  It is assumed that other hardware's init routine(s) will be invoked later
  57. // by C-language function call.
  58. //----------------------------------------------------------------------------*/
  59.  
  60. /*-- For LPC2101/03, LPC2141/48 */
  61.  
  62. tn_startup_hardware_init:
  63.  
  64.      /* Flash speed */
  65.      /* rMAMTIM = 3 */
  66.      ldr   r0, rMAMTIM
  67.      mov   r1, #3
  68.      strb  r1, [r0]
  69.  
  70.      /* rMAMCR  = 2 */
  71.      ldr   r0, rMAMCR
  72.      mov   r1, #2
  73.      strb  r1, [r0]
  74.  
  75.      bx   lr
  76.  
  77. /*----------------------------------------------------------------------------*/
  78.  
  79. tn_arm_disable_interrupts:
  80.  
  81.      mrs  r0, cpsr
  82.      orr  r0, r0, #NOINT
  83.      msr  cpsr_c, r0
  84.      bx   lr
  85.  
  86.  
  87. /*----------------------------------------------------------------------------*/
  88.  
  89. tn_arm_enable_interrupts:
  90.  
  91.      mrs  r0, cpsr
  92.      bic  r0, r0, #NOINT
  93.      msr  cpsr_c, r0
  94.      bx   lr
  95.  
  96.  
  97. /*--------------------------------------------------/*
  98.     TNKernel startup hardware init for LPC21XX(LPC22XX) processor
  99.     (for Rowley Associates Ltd.(R) CrossStudio(C) IDE
  100.      and any other IDE uses GCC compiler)
  101.  
  102.     GCC ARM assembler
  103.  
  104. Copyright © 2004,2005 Yuri Tiomkin
  105. All rights reserved.
  106.  
  107. Permission to use, copy, modify, and distribute this software in source
  108. and binary forms and its documentation for any purpose and without fee
  109. is hereby granted, provided that the above copyright notice appear
  110. in all copies and that both that copyright notice and this permission
  111. notice appear in supporting documentation.
  112.  
  113. THIS SOFTWARE IS PROVIDED BY THE YURI TIOMKIN AND CONTRIBUTORS ``AS IS'' AND
  114. ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  115. IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  116. ARE DISCLAIMED. IN NO EVENT SHALL YURI TIOMKIN OR CONTRIBUTORS BE LIABLE
  117. FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  118. DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  119. OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  120. HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  121. LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  122. OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  123. SUCH DAMAGE.
  124. */
  125.  
  126.   .equ    MC_FMR,    0xFFFFFF60
  127.   .equ    WDT_MR,    0xFFFFFD44
  128.   .equ    CKGR_MOR,  0xFFFFFC20
  129.   .equ    PMC_SR,    0xFFFFFC68
  130.   .equ    CKGR_PLLR, 0xFFFFFC2C
  131.   .equ    PMC_MCKR,  0xFFFFFC30
  132.   .equ    MC_RCR,    0xFFFFFF00
  133.  
  134.   .equ    NOINT,     0xc0
  135.  
  136.  
  137.   .text
  138.   .code 32
  139.   .align 0
  140.  
  141.   .global tn_startup_hardware_init
  142.   .global tn_arm_disable_interrupts
  143.   .global tn_arm_enable_interrupts
  144.  
  145. rMAMTIM:         .word  0xE01FC004
  146. rMAMCR:          .word  0xE01FC000
  147.  
  148. /*----------------------------------------------------------------------------
  149. //  This routine is called immediately after reset to setup hardware that is
  150. // vital for processor's functionality (for instance,SDRAM controller setup,
  151. // PLL setup,etc.)
  152. //  It is assumed that other hardware's init routine(s) will be invoked later
  153. // by C-language function call.
  154. //----------------------------------------------------------------------------*/
  155.  
  156. /*-- For LPC2101/03, LPC2141/48 */
  157.  
  158. tn_startup_hardware_init:
  159.  
  160.      /* Flash speed */
  161.      /* rMAMTIM = 3 */
  162.      ldr   r0, rMAMTIM
  163.      mov   r1, #3
  164.      strb  r1, [r0]
  165.  
  166.      /* rMAMCR  = 2 */
  167.      ldr   r0, rMAMCR
  168.      mov   r1, #2
  169.      strb  r1, [r0]
  170.  
  171.      bx   lr
  172.  
  173. /*----------------------------------------------------------------------------*/
  174.  
  175. tn_arm_disable_interrupts:
  176.  
  177.      mrs  r0, cpsr
  178.      orr  r0, r0, #NOINT
  179.      msr  cpsr_c, r0
  180.      bx   lr
  181.  
  182.  
  183. /*----------------------------------------------------------------------------*/
  184.  
  185. tn_arm_enable_interrupts:
  186.  
  187.      mrs  r0, cpsr
  188.      bic  r0, r0, #NOINT
  189.      msr  cpsr_c, r0
  190.      bx   lr
  191.  
  192.  
  193. /*----------------------------------------------------------------------------*/
  194. /*----------------------------------------------------------------------------*/
  195. /*----------------------------------------------------------------------------*/--------------------------*/
  196. /*----------------------------------------------------------------------------*/
  197. /*----------------------------------------------------------------------------*/
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