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Apr 4th, 2020
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VHDL 0.48 KB | None | 0 0
  1. ENTITY barrel_shift IS
  2.   PORT (v : IN BIT_VECTOR(3 DOWNTO 0);
  3.           d1, d0    : IN BIT;
  4.           s : OUT BIT_VECTOR(3 DOWNTO 0));
  5. END barrel_shift;
  6.  
  7. ARCHITECTURE teste OF barrel_shift IS
  8.     SIGNAL sel: BIT_VECTOR(1 DOWNTO 0);
  9. BEGIN
  10.     sel <= d1 & d0;
  11.     abc: PROCESS (sel, v)
  12.     BEGIN
  13.         IF sel = "00" THEN
  14.           s <= v;
  15.         ELSIF sel = "01" THEN
  16.           s <= v rol 1;
  17.         ELSIF sel = "10" THEN
  18.           s <= v rol 2;
  19.         ELSIF sel = "11" THEN
  20.           s <= v rol 3;
  21.         END IF;
  22.     END PROCESS abc;
  23. END teste;
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