TWI_CMD_FUNC

// Master:GP4301TW USB -> RS232C -> UART
// Slave:BF592 I2C <- UART
void twi_cmd_func(void)
{
    uint16_t twi_status = *pTWI_INT_STAT;       // Interrupt status
    uint8_t twi_cmd = 0;                        // Command 1byte
    uint16_t rcv_data = 0;                      // Received data from master 2byte

    // Slave status
    if((twi_status & SINIT) != 0)
    {
        // Transfer in progress.
        *pTWI_INT_STAT = SINIT;
    }

    // Received from master
    if((twi_status & RCVSERV) != 0)
    {
        if((*pTWI_FIFO_STAT & RCVSTAT) == RCV_HALF)     // 1byte data
        {
            twi_cmd = *pTWI_RCV_DATA8;
        }
        else if((*pTWI_FIFO_STAT & RCVSTAT) == RCV_FULL)    // 2byte data
        {
            rcv_data = *pTWI_RCV_DATA16;
            swap_upper_and_lower(rcv_data);
        }

        // Clear
        *pTWI_INT_STAT = RCVSERV;
    }

    // Send to master
    else if((twi_status & XMTSERV) != 0)
    {
        if(twi_cmd == 0x0001)
        {
            twi_cmd = 0;
            *pTWI_XMT_DATA16 = avg_data;    // Average sound data
        }
        else if(twi_cmd == 0x0002)
        {
            twi_cmd = 0;
            *pTWI_XMT_DATA16 = mem_data;    // Memory sound data
        }
        *pTWI_INT_STAT = XMTSERV;
    }

    // Error
    else if((twi_status & SERR) != 0u)
    {
        // Clear FIFO
        *pTWI_FIFO_CTL = XMTFLUSH | RCVFLUSH;
        ssync();
        *pTWI_FIFO_CTL = 0;
        ssync();
        *pTWI_INT_STAT = SERR;
    }

    // Overflow
    else if((twi_status & SOVF) != 0u)
    {
        // Clear FIFO
        *pTWI_FIFO_CTL = RCVFLUSH;
        ssync();
        *pTWI_FIFO_CTL = 0;
        ssync();
        *pTWI_INT_STAT = SOVF;
    }

    // Finish
    else if((twi_status & SCOMP) != 0u)
    {
        if(twi_status & RCV_HALF)
        {
            rcv_data = *pTWI_RCV_DATA16;
            *pTWI_FIFO_CTL = RCVFLUSH;
            ssync();
            *pTWI_FIFO_CTL = 0;
            ssync();
            *pTWI_FIFO_CTL = 0;
        }

        // Clear FIFO
        *pTWI_FIFO_CTL = XMTFLUSH;
        ssync();
        *pTWI_FIFO_CTL = 0;
        ssync();
        *pTWI_INT_STAT = SCOMP;
    }
    ssync();
}

uint16_t swap_upper_and_lower(uint16_t x)
{
    uint16_t upper_b = 0x0;
    uint16_t lower_b = 0x0;
    uint16_t swap_b = 0x0;

    // upper 8bit shift to the right
    upper_b = x >> 8;

    // lower logical AND
    lower_b = x & 0x00FF;

    // lower 8bit shift to the left logical OR upper
    swap_b = (lower_b << 8) | upper_b;

    return(swap_b);