traffic light

`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 12.05.2022 09:34:38
// Design Name:
// Module Name: traffic_light
// Project Name:
// Target Devices:
// Tool Versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////


module top(
    input clk,
    input reset,
    input night_mode,
    output red_v,
    output yellow_v,
    output green_v,
    output red_h,
    output yellow_h,
    output green_h
    );

	traffic_light light(.clk(clk), .reset(reset), .night_mode(~night_mode),
	 .red_h(red_h), .yellow_h(yellow_h), .green_h(green_h),
	 .red_v(red_v), .yellow_v(yellow_v), .green_v(green_v));

endmodule

//пока без мерцания
module traffic_light(
    input clk,
    input reset,
    input night_mode,
    output logic red_h,
    output logic yellow_h,
    output logic green_h,
    output logic red_v,
    output logic yellow_v,
    output logic green_v
);
    enum logic[2:0] {
		RED = 3b'001,
		YELLOW_FORWARD = 3b'010,
		YELLOW_BACK = 3b'011,
		GREEN = 3b'100
	} COLOR;

	integer i;
	integer sec;

    always_ff @(posedge clk) begin
		if (!reset) begin
			COLOR = RED;
			sec <= 0;
			i <= 0;
		end;

		i <= i + 1;
		if (i == 12000000) begin
			i <= 0;
			sec <= sec + 1;
		end;

		if (sec == 3) begin
			sec <= 0;
			case(COLOR)
				RED: begin
					red_v <= 1;
					red_h <= 0;
					yellow_v <= 0;
					yellow_h <= 0;
					green_v <= 0;
					green_h <= 1;
					COLOR <= YELLOW_FORWARD;
				end;

				YELLOW_FORWARD: begin
					red_v <= 0;
					red_h <= 0;
					yellow_v <= 1;
					yellow_h <= 1;
					green_v <= 0;
					green_h <= 0;
					COLOR <= GREEN;
				end;

				GREEN: begin
					red_v <= 0;
					red_h <= 1;
					yellow_v <= 0;
					yellow_h <= 0;
					green_v <= 1;
					green_h <= 0;
					COLOR <= YELLOW_BACK;
				end;

				YELLOW_BACK: begin
					red_v <= 0;
					red_h <= 0;
					yellow_v <= 1;
					yellow_h <= 1;
					green_v <= 0;
					green_h <= 0;
					COLOR <= RED;
				end;

			endcase

		end;


	end;





endmodule