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  1.  
  2. ---Check S2idle path S0ix Residency---:
  3.  
  4. The system OS Kernel version is:
  5. Linux bryce-laptop 6.14.9-300.fc42.x86_64 #1 SMP PREEMPT_DYNAMIC Thu May 29 14:27:53 UTC 2025 x86_64 GNU/Linux
  6.  
  7. ---Check whether your system supports S0ix or not---:
  8.  
  9. Low Power S0 Idle is:1
  10. Your system supports low power S0 idle capability.
  11.  
  12.  
  13.  
  14. ---Check whether intel_pmc_core sysfs files exit---:
  15.  
  16. The pmc_core debug sysfs files are OK on your system.
  17.  
  18.  
  19.  
  20. ---Judge PC10, S0ix residency available status---:
  21.  
  22. Test system supports S0ix.y substate
  23.  
  24. S0ix substate before S2idle:
  25. S0i2.0 S0i3.0
  26.  
  27. S0ix substate residency before S2idle:
  28. 0 0
  29.  
  30. Turbostat output:
  31. 11.449769 sec
  32. CPU%c1 CPU%c6 CPU%c7 Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc8 Pk%pc10 SYS%LPI
  33. 1.71 0.00 93.30 2.04 3.28 0.01 0.07 80.90 0.00
  34. 2.17 0.00 94.70 2.04 3.28 0.01 0.07 80.90 0.00
  35. 2.17
  36. 1.83 0.00 92.34
  37. 1.83
  38. 1.22 0.00 91.74
  39. 1.22
  40. 1.64 0.00 94.40
  41. 1.64
  42.  
  43. CPU Core C7 residency after S2idle is: 93.30
  44. CPU Package C-state 2 residency after S2idle is: 2.04
  45. CPU Package C-state 3 residency after S2idle is: 3.28
  46. CPU Package C-state 8 residency after S2idle is: 0.07
  47. CPU Package C-state 10 residency after S2idle is: 80.90
  48. S0ix residency after S2idle is: 0.00
  49.  
  50. Your system supports S0ix substates, but did not achieve the shallowest s0i2.0
  51.  
  52. Here is the S0ix substates status:
  53. Substate Residency
  54. S0i2.0 0
  55. S0i3.0 0
  56.  
  57.  
  58. ---Debug s0i2.0 substate failure scenario---:
  59.  
  60. ---Begin S0ix Substate Debug by substate_requirements---:
  61.  
  62. ./s0ix-selftest-tool.sh: line 193: /sys/kernel/debug/pmc_core/lpm_latch_mode: Operation not permitted
  63. Clear lpm_latch_mode is Done
  64.  
  65. ./s0ix-selftest-tool.sh: line 196: /sys/kernel/debug/pmc_core/lpm_latch_mode: Operation not permitted
  66. Set c10 to lpm_latch_mode is Done
  67.  
  68. Need to run once S2idle, please wait for 15 seconds...
  69.  
  70.  
  71. substate_requirements file shows:
  72.  
  73. Element S0i2.0 Live Status
  74. pmc0: USB2PLL_OFF_STS Required
  75. pmc0: PCIe/USB3.1_Gen2PLL_OFF_STS Required Yes
  76. pmc0: PCIe_Gen3PLL_OFF_STS Required Yes
  77. pmc0: OPIOPLL_OFF_STS Required
  78. pmc0: OCPLL_OFF_STS Required Yes
  79. pmc0: MainPLL_OFF_STS
  80. pmc0: MIPIPLL_OFF_STS Required Yes
  81. pmc0: Fast_XTAL_Osc_OFF_STS
  82. pmc0: AC_Ring_Osc_OFF_STS Required Yes
  83. pmc0: SATAPLL_OFF_STS Required Yes
  84. pmc0: XTAL_USB2PLL_OFF_STS
  85. pmc0: CSME_PG_STS Required
  86. pmc0: SATA_PG_STS Required Yes
  87. pmc0: xHCI_PG_STS Required
  88. pmc0: UFSX2_PG_STS Required Yes
  89. pmc0: OTG_PG_STS Required Yes
  90. pmc0: SPA_PG_STS Required Yes
  91. pmc0: SPB_PG_STS Required Yes
  92. pmc0: SPC_PG_STS Required Yes
  93. pmc0: THC0_PG_STS Required Yes
  94. pmc0: THC1_PG_STS Required Yes
  95. pmc0: GBETSN_PG_STS Required Yes
  96. pmc0: GBE_PG_STS Required
  97. pmc0: LPSS_PG_STS Required Yes
  98. pmc0: ADSP_D3_STS
  99. pmc0: xHCI0_D3_STS Required
  100. pmc0: xDCI1_D3_STS Required Yes
  101. pmc0: IS_D3_STS Required Yes
  102. pmc0: GBE_TSN_D3_STS Required Yes
  103. pmc0: CPU_C10_REQ_STS_0 Required
  104. pmc0: CNVI_REQ_STS_6
  105. pmc0: ISH_REQ_STS_7 Yes
  106. pmc0: MPHY_Core_DL_REQ_STS_16 Required
  107. pmc0: Break-even_En_REQ_STS_17 Required Yes
  108. pmc0: Auto-demo_En_REQ_STS_18 Required Yes
  109.  
  110. Below are the deeper S0ix substate required IPs did not show YES:
  111.  
  112. pmc0: USB2PLL_OFF_STS Required
  113. pmc0: OPIOPLL_OFF_STS Required
  114. pmc0: CSME_PG_STS Required
  115. pmc0: xHCI_PG_STS Required
  116. pmc0: GBE_PG_STS Required
  117. pmc0: xHCI0_D3_STS Required
  118. pmc0: CPU_C10_REQ_STS_0 Required
  119. pmc0: MPHY_Core_DL_REQ_STS_16 Required
  120.  
  121.  
  122. Your system south port controller did not meet S0ix requirement: SPC
  123. PMC0:PCH IP: 6 - SPC State: On
  124.  
  125. ---Trying S0ix workaround: setting No ACPI DSM Callback---:
  126. ./s0ix-selftest-tool.sh: line 1237: /sys/module/acpi/parameters/sleep_no_lps0: Permission denied
  127.  
  128. Setting no ACPI DSM callback is not helpful to the S0ix residency.
  129. ./s0ix-selftest-tool.sh: line 1256: /sys/module/acpi/parameters/sleep_no_lps0: Permission denied
  130.  
  131. ---Debug PCIeport D states and link PM states---
  132. ./s0ix-selftest-tool.sh: line 140: /sys/kernel/debug/dynamic_debug/control: Operation not permitted
  133. Available bridge device: 0000:00:07.0 0000:00:07.1 0000:00:1c.0 0000:00:1d.0
  134. ./s0ix-selftest-tool.sh: line 854: xxd: command not found
  135. ./s0ix-selftest-tool.sh: line 785: 16#: invalid integer constant (error token is "16#")
  136. ./s0ix-selftest-tool.sh: line 785: 16#: invalid integer constant (error token is "16#")
  137. ./s0ix-selftest-tool.sh: line 785: 16#: invalid integer constant (error token is "16#")
  138. ./s0ix-selftest-tool.sh: line 785: 16#: invalid integer constant (error token is "16#")
  139. ./s0ix-selftest-tool.sh: line 785: 16#: invalid integer constant (error token is "16#")
  140. ./s0ix-selftest-tool.sh: line 785: 16#: invalid integer constant (error token is "16#")
  141. ./s0ix-selftest-tool.sh: line 785: 16#: invalid integer constant (error token is "16#")
  142.  
  143. The PCIe bridge link power management state is:
  144. ./s0ix-selftest-tool.sh: line 785: 16#: invalid integer constant (error token is "16#")
  145. 0000:00:07.0
  146.  
  147. The link power management state of PCIe bridge: 0000:00:07.0 is not expected.
  148. which is expected to be L1.1 or L1.2, or user would run this script again.
  149.  
  150.  
  151. The L1SubCap of the failed 0000:00:07.0 is:
  152.  
  153.  
  154. The L1SubCtl1 of the failed 0000:00:07.0 is:
  155.  
  156.  
  157.  
  158. Checking PCI Devices tree diagram:
  159. -[0000:00]-+-00.0 Intel Corporation Tiger Lake-UP3/H35 4 cores Host Bridge/DRAM Registers
  160. +-02.0 Intel Corporation TigerLake-LP GT2 [Iris Xe Graphics]
  161. +-04.0 Intel Corporation TigerLake-LP Dynamic Tuning Processor Participant
  162. +-07.0-[01-38]--
  163. +-07.1-[39-70]--
  164. +-0d.0 Intel Corporation Tiger Lake-LP Thunderbolt 4 USB Controller
  165. +-0d.2 Intel Corporation Tiger Lake-LP Thunderbolt 4 NHI #0
  166. +-12.0 Intel Corporation Tiger Lake-LP Integrated Sensor Hub
  167. +-14.0 Intel Corporation Tiger Lake-LP USB 3.2 Gen 2x1 xHCI Host Controller
  168. +-14.2 Intel Corporation Tiger Lake-LP Shared SRAM
  169. +-14.3 Intel Corporation Wi-Fi 6 AX201
  170. +-15.0 Intel Corporation Tiger Lake-LP Serial IO I2C Controller #0
  171. +-15.1 Intel Corporation Tiger Lake-LP Serial IO I2C Controller #1
  172. +-16.0 Intel Corporation Tiger Lake-LP Management Engine Interface
  173. +-16.3 Intel Corporation Tiger Lake-LP Active Management Technology - SOL
  174. +-1c.0-[71]----00.0 Realtek Semiconductor Co., Ltd. RTS525A PCI Express Card Reader
  175. +-1d.0-[72]----00.0 Phison Electronics Corporation E18 PCIe4 NVMe Controller
  176. +-1f.0 Intel Corporation Tiger Lake-LP LPC Controller
  177. +-1f.3 Intel Corporation Tiger Lake-LP Smart Sound Technology Audio Controller
  178. +-1f.4 Intel Corporation Tiger Lake-LP SMBus Controller
  179. +-1f.5 Intel Corporation Tiger Lake-LP SPI Controller
  180. \-1f.6 Intel Corporation Ethernet Connection (13) I219-LM
  181.  
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