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==Motivation==
Due to the exploding complexity of digital electronic circuits since the 1970s (see [[Moore's law]]), circuit designers needed [[digital logic]] descriptions to be performed at a high level without being tied to a specific electronic technology, such as [[CMOS]] or [[BJT]]. HDLs were created to implement [[register-transfer level]] abstraction, a model of the data flow and timing of a circuit.<ref>{{cite book|last=Ciletti|first=Michael D.|title=Advanced Digital Design with Verilog HDL|publisher=Prentice Hall|year=2010}}</ref>

There are two major hardware description languages: [[VHDL]] and [[Verilog]]. There are different types of description in them
"dataflow, behavioral and structural".
Example of dataflow of VHDL:

<source lang="vhdl">
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;

ENTITY not1 IS
    PORT(
        a : IN  STD_LOGIC;
        b: OUT STD_LOGIC;
    );
END not1;

ARCHITECTURE behavioral OF not1 IS
BEGIN
    b <= NOT a;
END behavioral;
</source>