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ADL-P RTL8111H LAN

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  1. [NOTE ] coreboot-24.02-92-gcce6dfbf4906-dirty Thu Feb 29 09:20:43 UTC 2024 x86_32 bootblock starting (log level: 8)...
  2. [DEBUG] CPU: 12th Gen Intel(R) Core(TM) i3-1215U
  3. [DEBUG] CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000430
  4. [DEBUG] CPU: AES supported, TXT NOT supported, VT supported
  5. [INFO ] Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
  6. [INFO ] Cache size = 10 MiB
  7. [DEBUG] MCH: device id 4609 (rev 04) is Alderlake-P
  8. [DEBUG] PCH: device id 5182 (rev 01) is Alderlake-P SKU
  9. [DEBUG] IGD: device id 46b3 (rev 0c) is Alderlake P GT2
  10. [DEBUG] FMAP: Found "FLASH" version 1.1 at 0x1a50000.
  11. [DEBUG] FMAP: base = 0xfe000000 size = 0x2000000 #areas = 10
  12. [DEBUG] FMAP: area COREBOOT found @ 1a50200 (5963264 bytes)
  13. [INFO ] CBFS: mcache @0xfef84600 built for 16 files, used 0x37c of 0x4000 bytes
  14. [INFO ] CBFS: Found 'fallback/romstage' @0x80 size 0x129b8 in mcache @0xfef8462c
  15. [DEBUG] BS: bootblock times (exec / console): total (unknown) / 90 ms
  16.  
  17.  
  18. [NOTE ] coreboot-24.02-92-gcce6dfbf4906-dirty Thu Feb 29 09:20:43 UTC 2024 x86_32 romstage starting (log level: 8)...
  19. [DEBUG] pm1_sts: 8000 pm1_en: 0000 pm1_cnt: 00001c00
  20. [DEBUG] gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
  21. [DEBUG] gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
  22. [DEBUG] gpe0_sts[2]: 00000088 gpe0_en[2]: 00000000
  23. [DEBUG] gpe0_sts[3]: 00010000 gpe0_en[3]: 00000000
  24. [DEBUG] TCO_STS: 0000 0000
  25. [DEBUG] GEN_PMCON: d9801038 00002200
  26. [DEBUG] GBLRST_CAUSE: 00000040 00000000
  27. [DEBUG] HPR_CAUSE0: 00000000
  28. [DEBUG] prev_sleep_state 5 (S5)
  29. [INFO ] OC Watchdog: disabling watchdog timer
  30. [INFO ] POST: 0x00
  31. [DEBUG] Abort disabling TXT, as CPU is not TXT capable.
  32. [DEBUG] FMAP: area COREBOOT found @ 1a50200 (5963264 bytes)
  33. [INFO ] MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  34. [INFO ] CBFS: Found 'fspm.bin' @0xc5dc0 size 0xc0000 in mcache @0xfef84824
  35. [INFO ] POST: 0x34
  36. [DEBUG] FMAP: area RW_MRC_CACHE found @ 1a00000 (65536 bytes)
  37. [SPEW ] MRC cache found, size 63176 bytes
  38. [SPEW ] bootmode is set to: 2 (boot assuming no config change)
  39. [WARN ] Missing root port clock structure definition
  40. [WARN ] Missing root port clock structure definition
  41. [SPEW ] Data from EC: 0x08
  42. [SPEW ] Data from EC: 0x14
  43. [INFO ] board id is 0x14
  44. [INFO ] SPD index is 0x4
  45. [INFO ] No memory dimm at address A2
  46. [INFO ] No memory dimm at address A6
  47. [INFO ] SPD: module type is DDR4
  48. [INFO ] SPD: module part number is M471A1G44CB0-CWE
  49. [INFO ] SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
  50. [INFO ] SPD: device width 16 bits, bus width 64 bits
  51. [INFO ] SPD: module size is 8192 MB (per channel)
  52. [INFO ] SPD: module type is DDR4
  53. [INFO ] SPD: module part number is M471A1G44CB0-CWE
  54. [INFO ] SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
  55. [INFO ] SPD: device width 16 bits, bus width 64 bits
  56. [INFO ] SPD: module size is 8192 MB (per channel)
  57. [INFO ] POST: 0x36
  58. [INFO ] POST: 0x92
  59. [INFO ] POST: 0x98
  60. [DEBUG] CBMEM:
  61. [DEBUG] IMD: root @ 0x76fff000 254 entries.
  62. [DEBUG] IMD: root @ 0x76ffec00 62 entries.
  63. [DEBUG] External stage cache:
  64. [DEBUG] IMD: root @ 0x7bbff000 254 entries.
  65. [DEBUG] IMD: root @ 0x7bbfec00 62 entries.
  66. [DEBUG] FMAP: area RW_MRC_CACHE found @ 1a00000 (65536 bytes)
  67. [DEBUG] MRC: Checking cached data update for 'RW_MRC_CACHE'.
  68. [INFO ] SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
  69. [DEBUG] MRC: 'RW_MRC_CACHE' does not need update.
  70. [DEBUG] 2 DIMMs found
  71. [DEBUG] SMM Memory Map
  72. [DEBUG] SMRAM : 0x7b800000 0x800000
  73. [DEBUG] Subregion 0: 0x7b800000 0x200000
  74. [DEBUG] Subregion 1: 0x7ba00000 0x200000
  75. [DEBUG] Subregion 2: 0x7bc00000 0x400000
  76. [DEBUG] top_of_ram = 0x77000000
  77. [DEBUG] Normal boot
  78. [INFO ] CBFS: Found 'fallback/postcar' @0x1ce840 size 0x5dac in mcache @0xfef848c8
  79. [DEBUG] Loading module at 0x76aaf000 with entry 0x76aaf031. filesize: 0x59c8 memsize: 0xbd80
  80. [DEBUG] Processing 233 relocs. Offset value of 0x74aaf000
  81. [SPEW ] CLFLUSH [0x76aaf000, 0x76abad80]
  82. [SPEW ] CLFLUSH [0x76ab49c0, 0x76ab49c4]
  83. [SPEW ] CLFLUSH [0x76ffe8a0, 0x76ffe948]
  84. [DEBUG] BS: romstage times (exec / console): total (unknown) / 313 ms
  85. [SPEW ] CLFLUSH [0x76aae000, 0x77000000]
  86. [SPEW ] CLFLUSH [0x7ba00000, 0x7bc00000]
  87.  
  88.  
  89. [NOTE ] coreboot-24.02-92-gcce6dfbf4906-dirty Thu Feb 29 09:20:43 UTC 2024 x86_32 postcar starting (log level: 8)...
  90. [DEBUG] Normal boot
  91. [DEBUG] FMAP: area COREBOOT found @ 1a50200 (5963264 bytes)
  92. [INFO ] MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  93. [INFO ] CBFS: Found 'fallback/ramstage' @0x99f80 size 0x25357 in mcache @0x76abd10c
  94. [DEBUG] Loading module at 0x76941000 with entry 0x76941000. filesize: 0x508c0 memsize: 0x16ccd0
  95. [DEBUG] Processing 5230 relocs. Offset value of 0x72941000
  96. [DEBUG] BS: postcar times (exec / console): total (unknown) / 51 ms
  97.  
  98.  
  99. [NOTE ] coreboot-24.02-92-gcce6dfbf4906-dirty Thu Feb 29 09:20:43 UTC 2024 x86_32 ramstage starting (log level: 8)...
  100. [INFO ] POST: 0x39
  101. [INFO ] POST: 0x6f
  102. [DEBUG] Normal boot
  103. [INFO ] POST: 0x70
  104. [DEBUG] BS: BS_PRE_DEVICE run times (exec / console): 0 / 2 ms
  105. [DEBUG] microcode: sig=0x906a4 pf=0x80 revision=0x430
  106. [DEBUG] FMAP: area COREBOOT found @ 1a50200 (5963264 bytes)
  107. [INFO ] MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  108. [INFO ] CBFS: Found 'cpu_microcode_blob.bin' @0x12ac0 size 0x87400 in mcache @0x76abd0ac
  109. [INFO ] microcode: Update skipped, already up-to-date
  110. [INFO ] CBFS: Found 'fsps.bin' @0x185e00 size 0x4848d in mcache @0x76abd264
  111. [DEBUG] Detected 6 core, 8 thread CPU.
  112. [DEBUG] Setting up SMI for CPU
  113. [DEBUG] IED base = 0x7bc00000
  114. [DEBUG] IED size = 0x00400000
  115. [INFO ] Will perform SMM setup.
  116. [INFO ] CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
  117. [INFO ] LAPIC 0x0 in XAPIC mode.
  118. [DEBUG] CPU: APIC: 00 enabled
  119. [DEBUG] CPU: APIC: 01 enabled
  120. [DEBUG] CPU: APIC: 02 enabled
  121. [DEBUG] CPU: APIC: 03 enabled
  122. [DEBUG] CPU: APIC: 04 enabled
  123. [DEBUG] CPU: APIC: 05 enabled
  124. [DEBUG] CPU: APIC: 06 enabled
  125. [DEBUG] CPU: APIC: 07 enabled
  126. [DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
  127. [DEBUG] Processing 16 relocs. Offset value of 0x00030000
  128. [SPEW ] CLFLUSH [0x30000, 0x30178]
  129. [DEBUG] Attempting to start 7 APs
  130. [DEBUG] Waiting for 10ms after sending INIT.
  131. [DEBUG] Waiting for SIPI to complete...
  132. [DEBUG] done.
  133. [INFO ] LAPIC 0x1a in XAPIC mode.
  134. [INFO ] LAPIC 0x1e in XAPIC mode.
  135. [INFO ] LAPIC 0x1c in XAPIC mode.
  136. [INFO ] AP: slot 1 apic_id 1a, MCU rev: 0x00000430
  137. [INFO ] AP: slot 2 apic_id 1c, MCU rev: 0x00000430
  138. [INFO ] LAPIC 0x18 in XAPIC mode.
  139. [INFO ] AP: slot 3 apic_id 1e, MCU rev: 0x00000430
  140. [INFO ] AP: slot 4 apic_id 18, MCU rev: 0x00000430
  141. [INFO ] LAPIC 0x9 in XAPIC mode.
  142. [INFO ] LAPIC 0x8 in XAPIC mode.
  143. [INFO ] AP: slot 5 apic_id 9, MCU rev: 0x00000430
  144. [INFO ] AP: slot 7 apic_id 8, MCU rev: 0x00000430
  145. [INFO ] LAPIC 0x1 in XAPIC mode.
  146. [SPEW ] APs are ready after 0us
  147. [DEBUG] Waiting for SIPI to complete...
  148. [DEBUG] done.
  149. [SPEW ] APs are ready after 0us
  150. [INFO ] AP: slot 6 apic_id 1, MCU rev: 0x00000430
  151. [SPEW ] APs are ready after 5200us
  152. [SPEW ] smm_setup_relocation_handler: enter
  153. [SPEW ] smm_setup_relocation_handler: exit
  154. [DEBUG] Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1c0 memsize: 0x1c0
  155. [DEBUG] Processing 9 relocs. Offset value of 0x00038000
  156. [DEBUG] smm_module_setup_stub: stack_top = 0x7b804000
  157. [DEBUG] smm_module_setup_stub: per cpu stack_size = 0x800
  158. [DEBUG] smm_module_setup_stub: runtime.smm_size = 0x10000
  159. [DEBUG] SMM Module: stub loaded at 38000. Will call 0x7696a518
  160. [DEBUG] Installing permanent SMM handler to 0x7b800000
  161. [DEBUG] HANDLER [0x7b9fd000-0x7b9ffbe8]
  162.  
  163. [DEBUG] CPU 0
  164. [DEBUG] ss0 [0x7b9fcc00-0x7b9fd000]
  165. [DEBUG] stub0 [0x7b9f5000-0x7b9f51c0]
  166.  
  167. [DEBUG] CPU 1
  168. [DEBUG] ss1 [0x7b9fc800-0x7b9fcc00]
  169. [DEBUG] stub1 [0x7b9f4c00-0x7b9f4dc0]
  170.  
  171. [DEBUG] CPU 2
  172. [DEBUG] ss2 [0x7b9fc400-0x7b9fc800]
  173. [DEBUG] stub2 [0x7b9f4800-0x7b9f49c0]
  174.  
  175. [DEBUG] CPU 3
  176. [DEBUG] ss3 [0x7b9fc000-0x7b9fc400]
  177. [DEBUG] stub3 [0x7b9f4400-0x7b9f45c0]
  178.  
  179. [DEBUG] CPU 4
  180. [DEBUG] ss4 [0x7b9fbc00-0x7b9fc000]
  181. [DEBUG] stub4 [0x7b9f4000-0x7b9f41c0]
  182.  
  183. [DEBUG] CPU 5
  184. [DEBUG] ss5 [0x7b9fb800-0x7b9fbc00]
  185. [DEBUG] stub5 [0x7b9f3c00-0x7b9f3dc0]
  186.  
  187. [DEBUG] CPU 6
  188. [DEBUG] ss6 [0x7b9fb400-0x7b9fb800]
  189. [DEBUG] stub6 [0x7b9f3800-0x7b9f39c0]
  190.  
  191. [DEBUG] CPU 7
  192. [DEBUG] ss7 [0x7b9fb000-0x7b9fb400]
  193. [DEBUG] stub7 [0x7b9f3400-0x7b9f35c0]
  194.  
  195. [DEBUG] stacks [0x7b800000-0x7b804000]
  196. [DEBUG] Loading module at 0x7b9fd000 with entry 0x7b9fdb3d. filesize: 0x2ac8 memsize: 0x2be8
  197. [DEBUG] Processing 188 relocs. Offset value of 0x7b9fd000
  198. [DEBUG] Loading module at 0x7b9f5000 with entry 0x7b9f5000. filesize: 0x1c0 memsize: 0x1c0
  199. [DEBUG] Processing 9 relocs. Offset value of 0x7b9f5000
  200. [DEBUG] smm_module_setup_stub: stack_top = 0x7b804000
  201. [DEBUG] smm_module_setup_stub: per cpu stack_size = 0x800
  202. [DEBUG] smm_module_setup_stub: runtime.smm_size = 0x200000
  203. [DEBUG] SMM Module: placing smm entry code at 7b9f4c00, cpu # 0x1
  204. [SPEW ] smm_place_entry_code: copying from 7b9f5000 to 7b9f4c00 0x1c0 bytes
  205. [DEBUG] SMM Module: placing smm entry code at 7b9f4800, cpu # 0x2
  206. [SPEW ] smm_place_entry_code: copying from 7b9f5000 to 7b9f4800 0x1c0 bytes
  207. [DEBUG] SMM Module: placing smm entry code at 7b9f4400, cpu # 0x3
  208. [SPEW ] smm_place_entry_code: copying from 7b9f5000 to 7b9f4400 0x1c0 bytes
  209. [DEBUG] SMM Module: placing smm entry code at 7b9f4000, cpu # 0x4
  210. [SPEW ] smm_place_entry_code: copying from 7b9f5000 to 7b9f4000 0x1c0 bytes
  211. [DEBUG] SMM Module: placing smm entry code at 7b9f3c00, cpu # 0x5
  212. [SPEW ] smm_place_entry_code: copying from 7b9f5000 to 7b9f3c00 0x1c0 bytes
  213. [DEBUG] SMM Module: placing smm entry code at 7b9f3800, cpu # 0x6
  214. [SPEW ] smm_place_entry_code: copying from 7b9f5000 to 7b9f3800 0x1c0 bytes
  215. [DEBUG] SMM Module: placing smm entry code at 7b9f3400, cpu # 0x7
  216. [SPEW ] smm_place_entry_code: copying from 7b9f5000 to 7b9f3400 0x1c0 bytes
  217. [DEBUG] SMM Module: stub loaded at 7b9f5000. Will call 0x7b9fdb3d
  218. [DEBUG] Clearing SMI status registers
  219. [DEBUG] SMI_STS: PM1
  220. [DEBUG] PM1_STS: WAK
  221. [DEBUG] GPE0 STD STS: LAN_WAKE
  222. [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9ed000, cpu = 0
  223. [DEBUG] In relocation handler: CPU 0
  224. [DEBUG] New SMBASE=0x7b9ed000 IEDBASE=0x7bc00000
  225. [DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00
  226. [DEBUG] Relocation complete.
  227. [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9eb800, cpu = 6
  228. [DEBUG] In relocation handler: CPU 6
  229. [DEBUG] New SMBASE=0x7b9eb800 IEDBASE=0x7bc00000
  230. [DEBUG] Relocation complete.
  231. [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9ec000, cpu = 4
  232. [DEBUG] In relocation handler: CPU 4
  233. [DEBUG] New SMBASE=0x7b9ec000 IEDBASE=0x7bc00000
  234. [DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00
  235. [DEBUG] Relocation complete.
  236. [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9ec400, cpu = 3
  237. [DEBUG] In relocation handler: CPU 3
  238. [DEBUG] New SMBASE=0x7b9ec400 IEDBASE=0x7bc00000
  239. [DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00
  240. [DEBUG] Relocation complete.
  241. [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9ecc00, cpu = 1
  242. [DEBUG] In relocation handler: CPU 1
  243. [DEBUG] New SMBASE=0x7b9ecc00 IEDBASE=0x7bc00000
  244. [DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00
  245. [DEBUG] Relocation complete.
  246. [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9ec800, cpu = 2
  247. [DEBUG] In relocation handler: CPU 2
  248. [DEBUG] New SMBASE=0x7b9ec800 IEDBASE=0x7bc00000
  249. [DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00
  250. [DEBUG] Relocation complete.
  251. [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9eb400, cpu = 7
  252. [DEBUG] In relocation handler: CPU 7
  253. [DEBUG] New SMBASE=0x7b9eb400 IEDBASE=0x7bc00000
  254. [DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00
  255. [DEBUG] Relocation complete.
  256. [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9ebc00, cpu = 5
  257. [DEBUG] In relocation handler: CPU 5
  258. [DEBUG] New SMBASE=0x7b9ebc00 IEDBASE=0x7bc00000
  259. [DEBUG] Relocation complete.
  260. [SPEW ] APs are ready after 169500us
  261. [INFO ] Initializing CPU #0
  262. [DEBUG] CPU: vendor Intel device 906a4
  263. [DEBUG] CPU: family 06, model 9a, stepping 04
  264. [DEBUG] Clearing out pending MCEs
  265. [DEBUG] cpu: energy policy set to 7
  266. [INFO ] Turbo is available but hidden
  267. [INFO ] Turbo is available and visible
  268. [INFO ] microcode: Update skipped, already up-to-date
  269. [INFO ] CPU #0 initialized
  270. [INFO ] Initializing CPU #5
  271. [INFO ] Initializing CPU #1
  272. [INFO ] Initializing CPU #4
  273. [INFO ] Initializing CPU #2
  274. [DEBUG] CPU: vendor Intel device 906a4
  275. [DEBUG] CPU: family 06, model 9a, stepping 04
  276. [DEBUG] CPU: vendor Intel device 906a4
  277. [DEBUG] CPU: family 06, model 9a, stepping 04
  278. [INFO ] Initializing CPU #3
  279. [DEBUG] CPU: vendor Intel device 906a4
  280. [DEBUG] CPU: family 06, model 9a, stepping 04
  281. [DEBUG] Clearing out pending MCEs
  282. [DEBUG] Clearing out pending MCEs
  283. [DEBUG] Clearing out pending MCEs
  284. [DEBUG] cpu: energy policy set to 7
  285. [DEBUG] cpu: energy policy set to 7
  286. [DEBUG] CPU: vendor Intel device 906a4
  287. [DEBUG] CPU: family 06, model 9a, stepping 04
  288. [INFO ] microcode: Update skipped, already up-to-date
  289. [INFO ] CPU #2 initialized
  290. [DEBUG] cpu: energy policy set to 7
  291. [INFO ] microcode: Update skipped, already up-to-date
  292. [INFO ] CPU #4 initialized
  293. [INFO ] microcode: Update skipped, already up-to-date
  294. [INFO ] CPU #1 initialized
  295. [DEBUG] Clearing out pending MCEs
  296. [INFO ] Initializing CPU #7
  297. [DEBUG] cpu: energy policy set to 7
  298. [DEBUG] CPU: vendor Intel device 906a4
  299. [DEBUG] CPU: family 06, model 9a, stepping 04
  300. [INFO ] microcode: Update skipped, already up-to-date
  301. [INFO ] CPU #3 initialized
  302. [DEBUG] Clearing out pending MCEs
  303. [INFO ] Initializing CPU #6
  304. [DEBUG] CPU: vendor Intel device 906a4
  305. [DEBUG] CPU: family 06, model 9a, stepping 04
  306. [DEBUG] cpu: energy policy set to 7
  307. [DEBUG] Clearing out pending MCEs
  308. [INFO ] microcode: Update skipped, already up-to-date
  309. [INFO ] CPU #7 initialized
  310. [DEBUG] cpu: energy policy set to 7
  311. [DEBUG] CPU: vendor Intel device 906a4
  312. [DEBUG] CPU: family 06, model 9a, stepping 04
  313. [INFO ] microcode: Update skipped, already up-to-date
  314. [INFO ] CPU #5 initialized
  315. [DEBUG] Clearing out pending MCEs
  316. [DEBUG] cpu: energy policy set to 7
  317. [INFO ] microcode: Update skipped, already up-to-date
  318. [INFO ] CPU #6 initialized
  319. [SPEW ] APs are ready after 200300us
  320. [INFO ] bsp_do_flight_plan done after 774 msecs.
  321. [DEBUG] CPU: frequency set to 4400 MHz
  322. [DEBUG] Enabling SMIs.
  323. [DEBUG] BS: BS_DEV_INIT_CHIPS entry times (exec / console): 528 / 550 ms
  324. [INFO ] POST: 0x71
  325. [INFO ] Overriding power limits PL1 (3000, 15000) PL2 (55000, 55000) PL4 (123000)
  326. [DEBUG] HECI: Sending Get IP firmware command
  327. [ERROR] HECI: Get IP firmware response invalid
  328. [DEBUG] HECI response:
  329. [DEBUG] 0x7699371b: f0 a1 00 ff 01 00 00 00 01 00 00 00 00 f0 9a 76 ...............v
  330. [DEBUG] 0x7699372b: 02 00 00 00 00 80 00 00 00 00 00 00 00 00 00 00 ................
  331. [DEBUG] 0x7699373b: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
  332. [DEBUG] ...
  333. [ERROR] Failed to get HSPHY FW over HECI.
  334. [ERROR] Failed to load HSPHY FW, PCIe Gen5 won't work.
  335. [INFO ] CBFS: Found 'vbt.bin' @0x1ce300 size 0x4f7 in mcache @0x76abd298
  336. [INFO ] Found a VBT of 9216 bytes
  337. [INFO ] PCI 1.0, PIN A, using IRQ #16
  338. [INFO ] PCI 2.0, PIN A, using IRQ #17
  339. [INFO ] PCI 4.0, PIN A, using IRQ #18
  340. [INFO ] PCI 5.0, PIN A, using IRQ #16
  341. [INFO ] PCI 6.0, PIN A, using IRQ #16
  342. [INFO ] PCI 6.2, PIN C, using IRQ #18
  343. [INFO ] PCI 7.0, PIN A, using IRQ #19
  344. [INFO ] PCI 7.1, PIN B, using IRQ #20
  345. [INFO ] PCI 7.2, PIN C, using IRQ #21
  346. [INFO ] PCI 7.3, PIN D, using IRQ #22
  347. [INFO ] PCI 8.0, PIN A, using IRQ #23
  348. [INFO ] PCI D.0, PIN A, using IRQ #17
  349. [INFO ] PCI D.1, PIN B, using IRQ #19
  350. [INFO ] PCI 10.0, PIN A, using IRQ #24
  351. [INFO ] PCI 10.1, PIN B, using IRQ #25
  352. [INFO ] PCI 10.6, PIN C, using IRQ #20
  353. [INFO ] PCI 10.7, PIN D, using IRQ #21
  354. [INFO ] PCI 11.0, PIN A, using IRQ #26
  355. [INFO ] PCI 11.1, PIN B, using IRQ #27
  356. [INFO ] PCI 11.2, PIN C, using IRQ #28
  357. [INFO ] PCI 11.3, PIN D, using IRQ #29
  358. [INFO ] PCI 12.0, PIN A, using IRQ #30
  359. [INFO ] PCI 12.6, PIN B, using IRQ #31
  360. [INFO ] PCI 12.7, PIN C, using IRQ #22
  361. [INFO ] PCI 13.0, PIN A, using IRQ #32
  362. [INFO ] PCI 13.1, PIN B, using IRQ #33
  363. [INFO ] PCI 13.2, PIN C, using IRQ #34
  364. [INFO ] PCI 13.3, PIN D, using IRQ #35
  365. [INFO ] PCI 14.0, PIN B, using IRQ #23
  366. [INFO ] PCI 14.1, PIN A, using IRQ #36
  367. [INFO ] PCI 14.3, PIN C, using IRQ #17
  368. [INFO ] PCI 15.0, PIN A, using IRQ #37
  369. [INFO ] PCI 15.1, PIN B, using IRQ #39
  370. [INFO ] PCI 15.2, PIN C, using IRQ #40
  371. [INFO ] PCI 15.3, PIN D, using IRQ #41
  372. [INFO ] PCI 16.0, PIN A, using IRQ #18
  373. [INFO ] PCI 16.1, PIN B, using IRQ #19
  374. [INFO ] PCI 16.2, PIN C, using IRQ #20
  375. [INFO ] PCI 16.3, PIN D, using IRQ #21
  376. [INFO ] PCI 16.4, PIN A, using IRQ #18
  377. [INFO ] PCI 16.5, PIN B, using IRQ #19
  378. [INFO ] PCI 17.0, PIN A, using IRQ #22
  379. [INFO ] PCI 19.0, PIN A, using IRQ #42
  380. [INFO ] PCI 19.1, PIN B, using IRQ #43
  381. [INFO ] PCI 19.2, PIN C, using IRQ #44
  382. [INFO ] PCI 1C.0, PIN A, using IRQ #16
  383. [INFO ] PCI 1C.1, PIN B, using IRQ #17
  384. [INFO ] PCI 1C.2, PIN C, using IRQ #18
  385. [INFO ] PCI 1C.3, PIN D, using IRQ #19
  386. [INFO ] PCI 1C.4, PIN A, using IRQ #16
  387. [INFO ] PCI 1C.5, PIN B, using IRQ #17
  388. [INFO ] PCI 1C.6, PIN C, using IRQ #18
  389. [INFO ] PCI 1C.7, PIN D, using IRQ #19
  390. [INFO ] PCI 1D.0, PIN A, using IRQ #16
  391. [INFO ] PCI 1D.1, PIN B, using IRQ #17
  392. [INFO ] PCI 1D.2, PIN C, using IRQ #18
  393. [INFO ] PCI 1D.3, PIN D, using IRQ #19
  394. [INFO ] PCI 1E.0, PIN A, using IRQ #23
  395. [INFO ] PCI 1E.1, PIN B, using IRQ #20
  396. [INFO ] PCI 1E.2, PIN C, using IRQ #45
  397. [INFO ] PCI 1E.3, PIN D, using IRQ #46
  398. [INFO ] PCI 1F.3, PIN B, using IRQ #22
  399. [INFO ] PCI 1F.4, PIN C, using IRQ #23
  400. [INFO ] PCI 1F.6, PIN D, using IRQ #20
  401. [INFO ] PCI 1F.7, PIN A, using IRQ #21
  402. [INFO ] IRQ: Using dynamically assigned PCI IO-APIC IRQs
  403. [DEBUG] WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
  404. [INFO ] POST: 0x93
  405. [INFO ] FSPS returned 0
  406. [INFO ] POST: 0x99
  407. [INFO ] POST: 0xa0
  408. [SPEW ] Executing Phase 1 of FspMultiPhaseSiInit
  409. [DEBUG] FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
  410. [DEBUG] Detected 6 core, 8 thread CPU.
  411. [DEBUG] Detected 6 core, 8 thread CPU.
  412. [DEBUG] Detected 6 core, 8 thread CPU.
  413. [DEBUG] Detected 6 core, 8 thread CPU.
  414. [DEBUG] Detected 6 core, 8 thread CPU.
  415. [DEBUG] Detected 6 core, 8 thread CPU.
  416. [DEBUG] Detected 6 core, 8 thread CPU.
  417. [DEBUG] Detected 6 core, 8 thread CPU.
  418. [DEBUG] Detected 6 core, 8 thread CPU.
  419. [DEBUG] Detected 6 core, 8 thread CPU.
  420. [DEBUG] Detected 6 core, 8 thread CPU.
  421. [DEBUG] Detected 6 core, 8 thread CPU.
  422. [DEBUG] Detected 6 core, 8 thread CPU.
  423. [DEBUG] Detected 6 core, 8 thread CPU.
  424. [DEBUG] Detected 6 core, 8 thread CPU.
  425. [DEBUG] Detected 6 core, 8 thread CPU.
  426. [DEBUG] Detected 6 core, 8 thread CPU.
  427. [DEBUG] Detected 6 core, 8 thread CPU.
  428. [DEBUG] Detected 6 core, 8 thread CPU.
  429. [DEBUG] Detected 6 core, 8 thread CPU.
  430. [DEBUG] Detected 6 core, 8 thread CPU.
  431. [DEBUG] Detected 6 core, 8 thread CPU.
  432. [DEBUG] Detected 6 core, 8 thread CPU.
  433. [DEBUG] Detected 6 core, 8 thread CPU.
  434. [DEBUG] Detected 6 core, 8 thread CPU.
  435. [DEBUG] Detected 6 core, 8 thread CPU.
  436. [DEBUG] Detected 6 core, 8 thread CPU.
  437. [DEBUG] Detected 6 core, 8 thread CPU.
  438. [DEBUG] Detected 6 core, 8 thread CPU.
  439. [DEBUG] Detected 6 core, 8 thread CPU.
  440. [DEBUG] Detected 6 core, 8 thread CPU.
  441. [DEBUG] Detected 6 core, 8 thread CPU.
  442. [DEBUG] Detected 6 core, 8 thread CPU.
  443. [DEBUG] Detected 6 core, 8 thread CPU.
  444. [DEBUG] Detected 6 core, 8 thread CPU.
  445. [DEBUG] Detected 6 core, 8 thread CPU.
  446. [DEBUG] Detected 6 core, 8 thread CPU.
  447. [DEBUG] Detected 6 core, 8 thread CPU.
  448. [DEBUG] Detected 6 core, 8 thread CPU.
  449. [DEBUG] Detected 6 core, 8 thread CPU.
  450. [DEBUG] Detected 6 core, 8 thread CPU.
  451. [DEBUG] Detected 6 core, 8 thread CPU.
  452. [INFO ] POST: 0xa1
  453. [DEBUG] Display FSP Version Info HOB
  454. [DEBUG] Reference Code - CPU = c.0.75.10
  455. [DEBUG] uCode Version = 0.0.4.30
  456. [DEBUG] TXT ACM version = ff.ff.ff.ffff
  457. [DEBUG] Reference Code - ME = c.0.75.10
  458. [DEBUG] MEBx version = 0.0.0.0
  459. [DEBUG] ME Firmware Version = Consumer SKU
  460. [DEBUG] Reference Code - PCH = c.0.75.10
  461. [DEBUG] PCH-CRID Status = Disabled
  462. [DEBUG] PCH-CRID Original Value = ff.ff.ff.ffff
  463. [DEBUG] PCH-CRID New Value = ff.ff.ff.ffff
  464. [DEBUG] OPROM - RST - RAID = ff.ff.ff.ffff
  465. [DEBUG] PCH Hsio Version = 4.0.0.0
  466. [DEBUG] Reference Code - SA - System Agent = c.0.75.10
  467. [DEBUG] Reference Code - MRC = 0.0.4.3c
  468. [DEBUG] SA - PCIe Version = c.0.75.10
  469. [DEBUG] SA-CRID Status = Disabled
  470. [DEBUG] SA-CRID Original Value = 0.0.0.4
  471. [DEBUG] SA-CRID New Value = 0.0.0.4
  472. [DEBUG] OPROM - VBIOS = ff.ff.ff.ffff
  473. [DEBUG] IO Manageability Engine FW Version = 24.0.6.0
  474. [DEBUG] PHY Build Version = 0.0.0.2043
  475. [DEBUG] Thunderbolt(TM) FW Version = 2.2.0.0
  476. [DEBUG] System Agent Manageability Engine FW Version = ff.ff.ff.ffff
  477. [DEBUG] BS: BS_DEV_INIT_CHIPS run times (exec / console): 3146 / 664 ms
  478. [INFO ] POST: 0x72
  479. [INFO ] Enumerating buses...
  480. [SPEW ] Show all devs... Before device enumeration.
  481. [SPEW ] Root Device: enabled 1
  482. [SPEW ] CPU_CLUSTER: 0: enabled 1
  483. [SPEW ] DOMAIN: 00000000: enabled 1
  484. [SPEW ] PCI: 00:00:1c.4: enabled 1
  485. [SPEW ] PCI: 00:00:1c.6: enabled 1
  486. [SPEW ] PCI: 00:00:1c.5: enabled 1
  487. [SPEW ] PCI: 00:00:1c.7: enabled 1
  488. [SPEW ] PCI: 00:00:1d.0: enabled 1
  489. [SPEW ] PCI: 00:00:1d.2: enabled 1
  490. [SPEW ] GPIO: 0: enabled 1
  491. [SPEW ] PCI: 00:00:00.0: enabled 1
  492. [SPEW ] PCI: 00:00:01.0: enabled 1
  493. [SPEW ] PCI: 00:00:01.1: enabled 0
  494. [SPEW ] PCI: 00:00:02.0: enabled 1
  495. [SPEW ] PCI: 00:00:04.0: enabled 1
  496. [SPEW ] PCI: 00:00:05.0: enabled 0
  497. [SPEW ] PCI: 00:00:06.0: enabled 1
  498. [SPEW ] PCI: 00:00:06.2: enabled 1
  499. [SPEW ] PCI: 00:00:07.0: enabled 0
  500. [SPEW ] PCI: 00:00:07.1: enabled 0
  501. [SPEW ] PCI: 00:00:07.2: enabled 0
  502. [SPEW ] PCI: 00:00:07.3: enabled 0
  503. [SPEW ] PCI: 00:00:08.0: enabled 0
  504. [SPEW ] PCI: 00:00:09.0: enabled 0
  505. [SPEW ] PCI: 00:00:0a.0: enabled 0
  506. [SPEW ] PCI: 00:00:0d.0: enabled 1
  507. [SPEW ] PCI: 00:00:0d.1: enabled 0
  508. [SPEW ] PCI: 00:00:0d.2: enabled 1
  509. [SPEW ] PCI: 00:00:0d.3: enabled 1
  510. [SPEW ] PCI: 00:00:0e.0: enabled 0
  511. [SPEW ] PCI: 00:00:10.0: enabled 0
  512. [SPEW ] PCI: 00:00:10.1: enabled 0
  513. [SPEW ] PCI: 00:00:10.6: enabled 0
  514. [SPEW ] PCI: 00:00:10.7: enabled 0
  515. [SPEW ] PCI: 00:00:12.0: enabled 0
  516. [SPEW ] PCI: 00:00:12.6: enabled 0
  517. [SPEW ] PCI: 00:00:12.7: enabled 0
  518. [SPEW ] PCI: 00:00:13.0: enabled 0
  519. [SPEW ] PCI: 00:00:14.0: enabled 1
  520. [SPEW ] PCI: 00:00:14.1: enabled 0
  521. [SPEW ] PCI: 00:00:14.2: enabled 0
  522. [SPEW ] PCI: 00:00:14.3: enabled 1
  523. [SPEW ] PCI: 00:00:15.0: enabled 1
  524. [SPEW ] PCI: 00:00:15.1: enabled 1
  525. [SPEW ] PCI: 00:00:15.2: enabled 1
  526. [SPEW ] PCI: 00:00:15.3: enabled 1
  527. [SPEW ] PCI: 00:00:16.0: enabled 1
  528. [SPEW ] PCI: 00:00:16.1: enabled 0
  529. [SPEW ] PCI: 00:00:16.2: enabled 0
  530. [SPEW ] PCI: 00:00:16.3: enabled 0
  531. [SPEW ] PCI: 00:00:16.4: enabled 0
  532. [SPEW ] PCI: 00:00:16.5: enabled 0
  533. [SPEW ] PCI: 00:00:17.0: enabled 0
  534. [SPEW ] PCI: 00:00:19.0: enabled 0
  535. [SPEW ] PCI: 00:00:19.1: enabled 0
  536. [SPEW ] PCI: 00:00:19.2: enabled 0
  537. [SPEW ] PCI: 00:00:1a.0: enabled 0
  538. [SPEW ] PCI: 00:00:1c.0: enabled 0
  539. [SPEW ] PCI: 00:00:1c.1: enabled 0
  540. [SPEW ] PCI: 00:00:1c.2: enabled 0
  541. [SPEW ] PCI: 00:00:1c.3: enabled 0
  542. [SPEW ] PCI: 00:00:1c.4: enabled 0
  543. [SPEW ] PCI: 00:00:1c.5: enabled 0
  544. [SPEW ] PCI: 00:00:1c.6: enabled 0
  545. [SPEW ] PCI: 00:00:1c.7: enabled 0
  546. [SPEW ] PCI: 00:00:1d.0: enabled 0
  547. [SPEW ] PCI: 00:00:1d.1: enabled 0
  548. [SPEW ] PCI: 00:00:1d.2: enabled 0
  549. [SPEW ] PCI: 00:00:1d.3: enabled 0
  550. [SPEW ] PCI: 00:00:1e.0: enabled 1
  551. [SPEW ] PCI: 00:00:1e.1: enabled 0
  552. [SPEW ] PCI: 00:00:1e.2: enabled 1
  553. [SPEW ] PCI: 00:00:1e.3: enabled 1
  554. [SPEW ] PCI: 00:00:1f.0: enabled 1
  555. [SPEW ] PCI: 00:00:1f.1: enabled 1
  556. [SPEW ] PCI: 00:00:1f.2: enabled 1
  557. [SPEW ] PCI: 00:00:1f.3: enabled 1
  558. [SPEW ] PCI: 00:00:1f.4: enabled 1
  559. [SPEW ] PCI: 00:00:1f.5: enabled 1
  560. [SPEW ] PCI: 00:00:1f.6: enabled 0
  561. [SPEW ] PCI: 00:00:1f.7: enabled 0
  562. [SPEW ] GENERIC: 0.0: enabled 1
  563. [SPEW ] GENERIC: 0.0: enabled 1
  564. [SPEW ] GENERIC: 1.0: enabled 1
  565. [SPEW ] GENERIC: 0.0: enabled 1
  566. [SPEW ] GENERIC: 1.0: enabled 1
  567. [SPEW ] USB0 port 0: enabled 0
  568. [SPEW ] USB0 port 0: enabled 1
  569. [SPEW ] GENERIC: 0.0: enabled 1
  570. [SPEW ] SPI: 00: enabled 1
  571. [SPEW ] USB3 port 0: enabled 0
  572. [SPEW ] USB3 port 1: enabled 0
  573. [SPEW ] USB3 port 2: enabled 0
  574. [SPEW ] USB3 port 3: enabled 0
  575. [SPEW ] USB2 port 0: enabled 0
  576. [SPEW ] USB2 port 1: enabled 0
  577. [SPEW ] USB2 port 2: enabled 0
  578. [SPEW ] USB2 port 3: enabled 0
  579. [SPEW ] USB2 port 4: enabled 0
  580. [SPEW ] USB2 port 5: enabled 0
  581. [SPEW ] USB2 port 6: enabled 0
  582. [SPEW ] USB2 port 7: enabled 0
  583. [SPEW ] USB2 port 8: enabled 0
  584. [SPEW ] USB2 port 9: enabled 1
  585. [SPEW ] USB3 port 0: enabled 0
  586. [SPEW ] USB3 port 1: enabled 0
  587. [SPEW ] USB3 port 2: enabled 0
  588. [SPEW ] USB3 port 3: enabled 0
  589. [SPEW ] APIC: 00: enabled 1
  590. [SPEW ] APIC: 1a: enabled 1
  591. [SPEW ] APIC: 1c: enabled 1
  592. [SPEW ] APIC: 1e: enabled 1
  593. [SPEW ] APIC: 18: enabled 1
  594. [SPEW ] APIC: 09: enabled 1
  595. [SPEW ] APIC: 01: enabled 1
  596. [SPEW ] APIC: 08: enabled 1
  597. [SPEW ] Compare with tree...
  598. [SPEW ] Root Device: enabled 1
  599. [SPEW ] CPU_CLUSTER: 0: enabled 1
  600. [SPEW ] APIC: 00: enabled 1
  601. [SPEW ] APIC: 1a: enabled 1
  602. [SPEW ] APIC: 1c: enabled 1
  603. [SPEW ] APIC: 1e: enabled 1
  604. [SPEW ] APIC: 18: enabled 1
  605. [SPEW ] APIC: 09: enabled 1
  606. [SPEW ] APIC: 01: enabled 1
  607. [SPEW ] APIC: 08: enabled 1
  608. [SPEW ] DOMAIN: 00000000: enabled 1
  609. [SPEW ] GPIO: 0: enabled 1
  610. [SPEW ] PCI: 00:00:00.0: enabled 1
  611. [SPEW ] PCI: 00:00:01.0: enabled 1
  612. [SPEW ] PCI: 00:00:01.1: enabled 0
  613. [SPEW ] PCI: 00:00:02.0: enabled 1
  614. [SPEW ] PCI: 00:00:04.0: enabled 1
  615. [SPEW ] GENERIC: 0.0: enabled 1
  616. [SPEW ] PCI: 00:00:05.0: enabled 0
  617. [SPEW ] PCI: 00:00:06.0: enabled 1
  618. [SPEW ] PCI: 00:00:06.2: enabled 1
  619. [SPEW ] PCI: 00:00:08.0: enabled 0
  620. [SPEW ] PCI: 00:00:09.0: enabled 0
  621. [SPEW ] PCI: 00:00:0a.0: enabled 0
  622. [SPEW ] PCI: 00:00:0d.0: enabled 1
  623. [SPEW ] USB0 port 0: enabled 0
  624. [SPEW ] USB3 port 0: enabled 0
  625. [SPEW ] USB3 port 1: enabled 0
  626. [SPEW ] USB3 port 2: enabled 0
  627. [SPEW ] USB3 port 3: enabled 0
  628. [SPEW ] PCI: 00:00:0d.1: enabled 0
  629. [SPEW ] PCI: 00:00:0d.2: enabled 1
  630. [SPEW ] PCI: 00:00:0d.3: enabled 1
  631. [SPEW ] PCI: 00:00:0e.0: enabled 0
  632. [SPEW ] PCI: 00:00:10.0: enabled 0
  633. [SPEW ] PCI: 00:00:10.1: enabled 0
  634. [SPEW ] PCI: 00:00:10.6: enabled 0
  635. [SPEW ] PCI: 00:00:10.7: enabled 0
  636. [SPEW ] PCI: 00:00:12.0: enabled 0
  637. [SPEW ] PCI: 00:00:12.6: enabled 0
  638. [SPEW ] PCI: 00:00:12.7: enabled 0
  639. [SPEW ] PCI: 00:00:13.0: enabled 0
  640. [SPEW ] PCI: 00:00:14.0: enabled 1
  641. [SPEW ] USB0 port 0: enabled 1
  642. [SPEW ] USB2 port 0: enabled 0
  643. [SPEW ] USB2 port 1: enabled 0
  644. [SPEW ] USB2 port 2: enabled 0
  645. [SPEW ] USB2 port 3: enabled 0
  646. [SPEW ] USB2 port 4: enabled 0
  647. [SPEW ] USB2 port 5: enabled 0
  648. [SPEW ] USB2 port 6: enabled 0
  649. [SPEW ] USB2 port 7: enabled 0
  650. [SPEW ] USB2 port 8: enabled 0
  651. [SPEW ] USB2 port 9: enabled 1
  652. [SPEW ] USB3 port 0: enabled 0
  653. [SPEW ] USB3 port 1: enabled 0
  654. [SPEW ] USB3 port 2: enabled 0
  655. [SPEW ] USB3 port 3: enabled 0
  656. [SPEW ] PCI: 00:00:14.1: enabled 0
  657. [SPEW ] PCI: 00:00:14.2: enabled 0
  658. [SPEW ] PCI: 00:00:14.3: enabled 1
  659. [SPEW ] GENERIC: 0.0: enabled 1
  660. [SPEW ] PCI: 00:00:15.0: enabled 1
  661. [SPEW ] PCI: 00:00:15.1: enabled 1
  662. [SPEW ] PCI: 00:00:15.2: enabled 1
  663. [SPEW ] PCI: 00:00:15.3: enabled 1
  664. [SPEW ] PCI: 00:00:16.0: enabled 1
  665. [SPEW ] PCI: 00:00:16.1: enabled 0
  666. [SPEW ] PCI: 00:00:16.2: enabled 0
  667. [SPEW ] PCI: 00:00:16.3: enabled 0
  668. [SPEW ] PCI: 00:00:16.4: enabled 0
  669. [SPEW ] PCI: 00:00:16.5: enabled 0
  670. [SPEW ] PCI: 00:00:17.0: enabled 0
  671. [SPEW ] PCI: 00:00:19.0: enabled 0
  672. [SPEW ] PCI: 00:00:19.1: enabled 0
  673. [SPEW ] PCI: 00:00:19.2: enabled 0
  674. [SPEW ] PCI: 00:00:1a.0: enabled 0
  675. [SPEW ] PCI: 00:00:1e.0: enabled 1
  676. [SPEW ] PCI: 00:00:1e.1: enabled 0
  677. [SPEW ] PCI: 00:00:1e.2: enabled 1
  678. [SPEW ] PCI: 00:00:1e.3: enabled 1
  679. [SPEW ] SPI: 00: enabled 1
  680. [SPEW ] PCI: 00:00:1f.0: enabled 1
  681. [SPEW ] PCI: 00:00:1f.1: enabled 1
  682. [SPEW ] PCI: 00:00:1f.2: enabled 1
  683. [SPEW ] PCI: 00:00:1f.3: enabled 1
  684. [SPEW ] PCI: 00:00:1f.4: enabled 1
  685. [SPEW ] PCI: 00:00:1f.5: enabled 1
  686. [SPEW ] PCI: 00:00:1f.6: enabled 0
  687. [SPEW ] PCI: 00:00:1f.7: enabled 0
  688. [SPEW ] PCI: 00:00:1c.4: enabled 1
  689. [SPEW ] PCI: 00:00:1c.6: enabled 1
  690. [SPEW ] PCI: 00:00:1c.5: enabled 1
  691. [SPEW ] PCI: 00:00:1c.7: enabled 1
  692. [SPEW ] PCI: 00:00:1d.0: enabled 1
  693. [SPEW ] PCI: 00:00:1d.2: enabled 1
  694. [DEBUG] Root Device scanning...
  695. [SPEW ] scan_static_bus for Root Device
  696. [DEBUG] CPU_CLUSTER: 0 enabled
  697. [DEBUG] DOMAIN: 00000000 enabled
  698. [DEBUG] PCI: 00:00:1c.4 enabled
  699. [DEBUG] PCI: 00:00:1c.6 enabled
  700. [DEBUG] PCI: 00:00:1c.5 enabled
  701. [DEBUG] PCI: 00:00:1c.7 enabled
  702. [DEBUG] PCI: 00:00:1d.0 enabled
  703. [DEBUG] PCI: 00:00:1d.2 enabled
  704. [DEBUG] DOMAIN: 00000000 scanning...
  705. [DEBUG] PCI: pci_scan_bus for segment group 00 bus 00
  706. [INFO ] POST: 0x24
  707. [SPEW ] PCI: 00:00:00.0 [8086/0000] ops
  708. [DEBUG] PCI: 00:00:00.0 [8086/4609] enabled
  709. [INFO ] PCI: Static device PCI: 00:00:01.0 not found, disabling it.
  710. [SPEW ] PCI: 00:00:02.0 [8086/0000] bus ops
  711. [DEBUG] PCI: 00:00:02.0 [8086/46b3] enabled
  712. [SPEW ] PCI: 00:00:04.0 [8086/0000] bus ops
  713. [DEBUG] PCI: 00:00:04.0 [8086/461d] enabled
  714. [SPEW ] PCI: 00:00:06.0 [8086/0000] bus ops
  715. [DEBUG] PCI: 00:00:06.0 [8086/464d] enabled
  716. [INFO ] PCI: Static device PCI: 00:00:06.2 not found, disabling it.
  717. [SPEW ] PCI: 00:00:0d.0 [8086/0000] bus ops
  718. [DEBUG] PCI: 00:00:0d.0 [8086/461e] enabled
  719. [SPEW ] PCI: 00:00:0d.2 [8086/0000] bus ops
  720. [DEBUG] PCI: 00:00:0d.2 [8086/463e] enabled
  721. [SPEW ] PCI: 00:00:0d.3 [8086/0000] bus ops
  722. [DEBUG] PCI: 00:00:0d.3 [8086/466d] enabled
  723. [SPEW ] PCI: 00:00:14.0 [8086/0000] bus ops
  724. [DEBUG] PCI: 00:00:14.0 [8086/51ed] enabled
  725. [DEBUG] PCI: 00:00:14.2 [8086/51ef] disabled
  726. [SPEW ] PCI: 00:00:14.3 [8086/0000] bus ops
  727. [DEBUG] PCI: 00:00:14.3 [8086/51f0] enabled
  728. [SPEW ] PCI: 00:00:15.0 [8086/0000] bus ops
  729. [DEBUG] PCI: 00:00:15.0 [8086/51e8] enabled
  730. [SPEW ] PCI: 00:00:15.1 [8086/0000] bus ops
  731. [DEBUG] PCI: 00:00:15.1 [8086/51e9] enabled
  732. [SPEW ] PCI: 00:00:15.2 [8086/0000] bus ops
  733. [DEBUG] PCI: 00:00:15.2 [8086/51ea] enabled
  734. [SPEW ] PCI: 00:00:15.3 [8086/0000] bus ops
  735. [DEBUG] PCI: 00:00:15.3 [8086/51eb] enabled
  736. [SPEW ] PCI: 00:00:16.0 [8086/0000] ops
  737. [DEBUG] PCI: 00:00:16.0 [8086/51e0] enabled
  738. [SPEW ] PCI: 00:00:19.0 [8086/0000] bus ops
  739. [DEBUG] PCI: 00:00:19.0 [8086/51c5] disabled
  740. [SPEW ] PCI: 00:00:19.1 [8086/0000] bus ops
  741. [DEBUG] PCI: 00:00:19.1 [8086/51c6] disabled
  742. [SPEW ] PCI: 00:00:1e.0 [8086/0000] ops
  743. [DEBUG] PCI: 00:00:1e.0 [8086/51a8] enabled
  744. [SPEW ] PCI: 00:00:1e.2 [8086/0000] bus ops
  745. [DEBUG] PCI: 00:00:1e.2 [8086/51aa] enabled
  746. [SPEW ] PCI: 00:00:1e.3 [8086/0000] bus ops
  747. [DEBUG] PCI: 00:00:1e.3 [8086/51ab] enabled
  748. [SPEW ] PCI: 00:00:1f.0 [8086/0000] bus ops
  749. [DEBUG] PCI: 00:00:1f.0 [8086/5182] enabled
  750. [INFO ] PCI: Static device PCI: 00:00:1f.1 not found, disabling it.
  751. [DEBUG] RTC Init
  752. [INFO ] Set power on after power failure.
  753. [DEBUG] Disabling Deep S3
  754. [DEBUG] Disabling Deep S3
  755. [DEBUG] Disabling Deep S4
  756. [DEBUG] Disabling Deep S4
  757. [DEBUG] Disabling Deep S5
  758. [DEBUG] Disabling Deep S5
  759. [DEBUG] PCI: 00:00:1f.2 [0000/0000] hidden
  760. [SPEW ] PCI: 00:00:1f.3 [8086/0000] bus ops
  761. [DEBUG] PCI: 00:00:1f.3 [8086/51c8] enabled
  762. [SPEW ] PCI: 00:00:1f.4 [8086/0000] bus ops
  763. [DEBUG] PCI: 00:00:1f.4 [8086/51a3] enabled
  764. [SPEW ] PCI: 00:00:1f.5 [8086/0000] ops
  765. [DEBUG] PCI: 00:00:1f.5 [8086/51a4] enabled
  766. [DEBUG] GPIO: 0 enabled
  767. [WARN ] PCI: Leftover static devices:
  768. [WARN ] PCI: 00:00:01.0
  769. [WARN ] PCI: 00:00:01.1
  770. [WARN ] PCI: 00:00:05.0
  771. [WARN ] PCI: 00:00:06.2
  772. [WARN ] PCI: 00:00:08.0
  773. [WARN ] PCI: 00:00:09.0
  774. [WARN ] PCI: 00:00:0a.0
  775. [WARN ] PCI: 00:00:0d.1
  776. [WARN ] PCI: 00:00:0e.0
  777. [WARN ] PCI: 00:00:10.0
  778. [WARN ] PCI: 00:00:10.1
  779. [WARN ] PCI: 00:00:10.6
  780. [WARN ] PCI: 00:00:10.7
  781. [WARN ] PCI: 00:00:12.0
  782. [WARN ] PCI: 00:00:12.6
  783. [WARN ] PCI: 00:00:12.7
  784. [WARN ] PCI: 00:00:13.0
  785. [WARN ] PCI: 00:00:14.1
  786. [WARN ] PCI: 00:00:16.1
  787. [WARN ] PCI: 00:00:16.2
  788. [WARN ] PCI: 00:00:16.3
  789. [WARN ] PCI: 00:00:16.4
  790. [WARN ] PCI: 00:00:16.5
  791. [WARN ] PCI: 00:00:17.0
  792. [WARN ] PCI: 00:00:19.2
  793. [WARN ] PCI: 00:00:1a.0
  794. [WARN ] PCI: 00:00:1e.1
  795. [WARN ] PCI: 00:00:1f.1
  796. [WARN ] PCI: 00:00:1f.6
  797. [WARN ] PCI: 00:00:1f.7
  798. [WARN ] PCI: Check your devicetree.cb.
  799. [DEBUG] PCI: 00:00:02.0 scanning...
  800. [SPEW ] scan_generic_bus for PCI: 00:00:02.0
  801. [SPEW ] scan_generic_bus for PCI: 00:00:02.0 done
  802. [DEBUG] scan_bus: bus PCI: 00:00:02.0 finished in 9 msecs
  803. [DEBUG] PCI: 00:00:04.0 scanning...
  804. [SPEW ] scan_generic_bus for PCI: 00:00:04.0
  805. [DEBUG] GENERIC: 0.0 enabled
  806. [DEBUG] bus: PCI: 00:00:04.0->scan_generic_bus for PCI: 00:00:04.0 done
  807. [DEBUG] scan_bus: bus PCI: 00:00:04.0 finished in 15 msecs
  808. [DEBUG] PCI: 00:00:06.0 scanning...
  809. [SPEW ] do_pci_scan_bridge for PCI: 00:00:06.0
  810. [DEBUG] PCI: pci_scan_bus for segment group 00 bus 01
  811. [INFO ] POST: 0x24
  812. [INFO ] POST: 0x25
  813. [INFO ] PCI: 00:00:06.0: Setting Max_Payload_Size to 256 for devices under this root port
  814. [DEBUG] scan_bus: bus PCI: 00:00:06.0 finished in 23 msecs
  815. [DEBUG] PCI: 00:00:0d.0 scanning...
  816. [SPEW ] scan_static_bus for PCI: 00:00:0d.0
  817. [DEBUG] USB0 port 0 disabled
  818. [SPEW ] scan_static_bus for PCI: 00:00:0d.0 done
  819. [DEBUG] scan_bus: bus PCI: 00:00:0d.0 finished in 13 msecs
  820. [DEBUG] PCI: 00:00:0d.2 scanning...
  821. [SPEW ] scan_generic_bus for PCI: 00:00:0d.2
  822. [SPEW ] scan_generic_bus for PCI: 00:00:0d.2 done
  823. [DEBUG] scan_bus: bus PCI: 00:00:0d.2 finished in 9 msecs
  824. [DEBUG] PCI: 00:00:0d.3 scanning...
  825. [SPEW ] scan_generic_bus for PCI: 00:00:0d.3
  826. [SPEW ] scan_generic_bus for PCI: 00:00:0d.3 done
  827. [DEBUG] scan_bus: bus PCI: 00:00:0d.3 finished in 9 msecs
  828. [DEBUG] PCI: 00:00:14.0 scanning...
  829. [SPEW ] scan_static_bus for PCI: 00:00:14.0
  830. [DEBUG] USB0 port 0 enabled
  831. [DEBUG] USB0 port 0 scanning...
  832. [SPEW ] scan_static_bus for USB0 port 0
  833. [DEBUG] USB2 port 0 disabled
  834. [DEBUG] USB2 port 1 disabled
  835. [DEBUG] USB2 port 2 disabled
  836. [DEBUG] USB2 port 3 disabled
  837. [DEBUG] USB2 port 4 disabled
  838. [DEBUG] USB2 port 5 disabled
  839. [DEBUG] USB2 port 6 disabled
  840. [DEBUG] USB2 port 7 disabled
  841. [DEBUG] USB2 port 8 disabled
  842. [DEBUG] USB2 port 9 enabled
  843. [DEBUG] USB3 port 0 disabled
  844. [DEBUG] USB3 port 1 disabled
  845. [DEBUG] USB3 port 2 disabled
  846. [DEBUG] USB3 port 3 disabled
  847. [DEBUG] USB2 port 9 scanning...
  848. [SPEW ] scan_static_bus for USB2 port 9
  849. [SPEW ] scan_static_bus for USB2 port 9 done
  850. [DEBUG] scan_bus: bus USB2 port 9 finished in 9 msecs
  851. [SPEW ] scan_static_bus for USB0 port 0 done
  852. [DEBUG] scan_bus: bus USB0 port 0 finished in 73 msecs
  853. [SPEW ] scan_static_bus for PCI: 00:00:14.0 done
  854. [DEBUG] scan_bus: bus PCI: 00:00:14.0 finished in 95 msecs
  855. [DEBUG] PCI: 00:00:14.3 scanning...
  856. [SPEW ] scan_static_bus for PCI: 00:00:14.3
  857. [DEBUG] GENERIC: 0.0 enabled
  858. [SPEW ] scan_static_bus for PCI: 00:00:14.3 done
  859. [DEBUG] scan_bus: bus PCI: 00:00:14.3 finished in 13 msecs
  860. [DEBUG] PCI: 00:00:15.0 scanning...
  861. [SPEW ] scan_static_bus for PCI: 00:00:15.0
  862. [SPEW ] scan_static_bus for PCI: 00:00:15.0 done
  863. [DEBUG] scan_bus: bus PCI: 00:00:15.0 finished in 9 msecs
  864. [DEBUG] PCI: 00:00:15.1 scanning...
  865. [SPEW ] scan_static_bus for PCI: 00:00:15.1
  866. [SPEW ] scan_static_bus for PCI: 00:00:15.1 done
  867. [DEBUG] scan_bus: bus PCI: 00:00:15.1 finished in 9 msecs
  868. [DEBUG] PCI: 00:00:15.2 scanning...
  869. [SPEW ] scan_static_bus for PCI: 00:00:15.2
  870. [SPEW ] scan_static_bus for PCI: 00:00:15.2 done
  871. [DEBUG] scan_bus: bus PCI: 00:00:15.2 finished in 9 msecs
  872. [DEBUG] PCI: 00:00:15.3 scanning...
  873. [SPEW ] scan_static_bus for PCI: 00:00:15.3
  874. [SPEW ] scan_static_bus for PCI: 00:00:15.3 done
  875. [DEBUG] scan_bus: bus PCI: 00:00:15.3 finished in 9 msecs
  876. [DEBUG] PCI: 00:00:1e.2 scanning...
  877. [SPEW ] scan_generic_bus for PCI: 00:00:1e.2
  878. [SPEW ] scan_generic_bus for PCI: 00:00:1e.2 done
  879. [DEBUG] scan_bus: bus PCI: 00:00:1e.2 finished in 9 msecs
  880. [DEBUG] PCI: 00:00:1e.3 scanning...
  881. [SPEW ] scan_generic_bus for PCI: 00:00:1e.3
  882. [DEBUG] SPI: 00 enabled
  883. [DEBUG] bus: PCI: 00:00:1e.3->scan_generic_bus for PCI: 00:00:1e.3 done
  884. [DEBUG] scan_bus: bus PCI: 00:00:1e.3 finished in 14 msecs
  885. [DEBUG] PCI: 00:00:1f.0 scanning...
  886. [SPEW ] scan_static_bus for PCI: 00:00:1f.0
  887. [SPEW ] scan_static_bus for PCI: 00:00:1f.0 done
  888. [DEBUG] scan_bus: bus PCI: 00:00:1f.0 finished in 9 msecs
  889. [DEBUG] PCI: 00:00:1f.2 scanning...
  890. [SPEW ] scan_static_bus for PCI: 00:00:1f.2
  891. [SPEW ] scan_static_bus for PCI: 00:00:1f.2 done
  892. [DEBUG] scan_bus: bus PCI: 00:00:1f.2 finished in 9 msecs
  893. [DEBUG] PCI: 00:00:1f.3 scanning...
  894. [SPEW ] scan_static_bus for PCI: 00:00:1f.3
  895. [SPEW ] scan_static_bus for PCI: 00:00:1f.3 done
  896. [DEBUG] scan_bus: bus PCI: 00:00:1f.3 finished in 9 msecs
  897. [DEBUG] PCI: 00:00:1f.4 scanning...
  898. [SPEW ] scan_generic_bus for PCI: 00:00:1f.4
  899. [SPEW ] scan_generic_bus for PCI: 00:00:1f.4 done
  900. [DEBUG] scan_bus: bus PCI: 00:00:1f.4 finished in 9 msecs
  901. [INFO ] POST: 0x25
  902. [DEBUG] scan_bus: bus DOMAIN: 00000000 finished in 852 msecs
  903. [SPEW ] scan_static_bus for Root Device done
  904. [DEBUG] scan_bus: bus Root Device finished in 900 msecs
  905. [INFO ] done
  906. [DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1730 ms
  907. [INFO ] MRC: Could not find region 'UNIFIED_MRC_CACHE'
  908. [DEBUG] FMAP: area RW_MRC_CACHE found @ 1a00000 (65536 bytes)
  909. [INFO ] MRC: NOT enabling PRR for 'RW_MRC_CACHE'.
  910. [DEBUG] BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 17 ms
  911. [INFO ] POST: 0x73
  912. [DEBUG] found VGA at PCI: 00:00:02.0
  913. [DEBUG] Setting up VGA for PCI: 00:00:02.0
  914. [DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 00000000
  915. [DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
  916. [INFO ] Allocating resources...
  917. [INFO ] Reading resources...
  918. [SPEW ] Root Device read_resources segment group 0 bus 0
  919. [SPEW ] CPU_CLUSTER: 0 read_resources segment group 0 bus 0
  920. [SPEW ] CPU_CLUSTER: 0 read_resources segment group 0 bus 0 done
  921. [SPEW ] DOMAIN: 00000000 read_resources segment group 0 bus 0
  922. [DEBUG] SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x00020000
  923. [SPEW ] dev: PCI: 00:00:00.0, index: 0x0, base: 0xfedc0000, size: 0x20000
  924. [DEBUG] SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x00001000
  925. [SPEW ] dev: PCI: 00:00:00.0, index: 0x1, base: 0xfeda0000, size: 0x1000
  926. [DEBUG] SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x00001000
  927. [SPEW ] dev: PCI: 00:00:00.0, index: 0x2, base: 0xfeda1000, size: 0x1000
  928. [DEBUG] SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x00001000
  929. [SPEW ] dev: PCI: 00:00:00.0, index: 0x3, base: 0xfb000000, size: 0x1000
  930. [DEBUG] SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x00004000
  931. [SPEW ] dev: PCI: 00:00:00.0, index: 0x4, base: 0xfed80000, size: 0x4000
  932. [DEBUG] SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x00080000
  933. [SPEW ] dev: PCI: 00:00:00.0, index: 0x5, base: 0xfeb00000, size: 0x80000
  934. [DEBUG] SA MMIO resource: TPM -> base = 0xfed40000, size = 0x00010000
  935. [SPEW ] dev: PCI: 00:00:00.0, index: 0x6, base: 0xfed40000, size: 0x10000
  936. [DEBUG] SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x00020000
  937. [SPEW ] dev: PCI: 00:00:00.0, index: 0x7, base: 0xfed50000, size: 0x20000
  938. [DEBUG] SA MMIO resource: APIC -> base = 0xfec00000, size = 0x00100000
  939. [SPEW ] dev: PCI: 00:00:00.0, index: 0x8, base: 0xfec00000, size: 0x100000
  940. [DEBUG] SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x02000000
  941. [SPEW ] dev: PCI: 00:00:00.0, index: 0x9, base: 0xfc800000, size: 0x2000000
  942. [DEBUG] SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x00001000
  943. [SPEW ] dev: PCI: 00:00:00.0, index: 0xa, base: 0xfed90000, size: 0x1000
  944. [DEBUG] SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x00001000
  945. [SPEW ] dev: PCI: 00:00:00.0, index: 0xb, base: 0xfed92000, size: 0x1000
  946. [DEBUG] SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x00001000
  947. [SPEW ] dev: PCI: 00:00:00.0, index: 0xc, base: 0xfed84000, size: 0x1000
  948. [DEBUG] SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x00001000
  949. [SPEW ] dev: PCI: 00:00:00.0, index: 0xd, base: 0xfed85000, size: 0x1000
  950. [DEBUG] SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x00001000
  951. [SPEW ] dev: PCI: 00:00:00.0, index: 0xe, base: 0xfed86000, size: 0x1000
  952. [DEBUG] SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x00001000
  953. [SPEW ] dev: PCI: 00:00:00.0, index: 0xf, base: 0xfed87000, size: 0x1000
  954. [DEBUG] SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x00001000
  955. [SPEW ] dev: PCI: 00:00:00.0, index: 0x10, base: 0xfed91000, size: 0x1000
  956. [DEBUG] SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
  957. [SPEW ] dev: PCI: 00:00:00.0, index: 0x11, base: 0xc0000000, size: 0x10000000
  958. [DEBUG] SA MMIO resource: DSM -> base = 0x7c800000, size = 0x03c00000
  959. [SPEW ] dev: PCI: 00:00:00.0, index: 0x12, base: 0x7c800000, size: 0x3c00000
  960. [DEBUG] SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x00800000
  961. [SPEW ] dev: PCI: 00:00:00.0, index: 0x13, base: 0x7b800000, size: 0x800000
  962. [DEBUG] SA MMIO resource: GSM -> base = 0x7c000000, size = 0x00800000
  963. [SPEW ] dev: PCI: 00:00:00.0, index: 0x14, base: 0x7c000000, size: 0x800000
  964. [SPEW ] dev: PCI: 00:00:00.0, index: 0x15, base: 0x0, size: 0xa0000
  965. [SPEW ] dev: PCI: 00:00:00.0, index: 0x16, base: 0xc0000, size: 0x76f40000
  966. [SPEW ] dev: PCI: 00:00:00.0, index: 0x17, base: 0x77000000, size: 0x9400000
  967. [INFO ] Available memory above 4GB: 14332M
  968. [SPEW ] dev: PCI: 00:00:00.0, index: 0x18, base: 0x100000000, size: 0x37fc00000
  969. [SPEW ] dev: PCI: 00:00:00.0, index: 0x19, base: 0xa0000, size: 0x20000
  970. [SPEW ] dev: PCI: 00:00:00.0, index: 0x1a, base: 0xc0000, size: 0x40000
  971. [SPEW ] PCI: 00:00:04.0 read_resources segment group 0 bus 1
  972. [SPEW ] PCI: 00:00:04.0 read_resources segment group 0 bus 1 done
  973. [SPEW ] PCI: 00:00:06.0 read_resources segment group 0 bus 1
  974. [SPEW ] PCI: 00:00:06.0 read_resources segment group 0 bus 1 done
  975. [SPEW ] PCI: 00:00:0d.0 read_resources segment group 0 bus 0
  976. [SPEW ] PCI: 00:00:0d.0 read_resources segment group 0 bus 0 done
  977. [SPEW ] PCI: 00:00:14.0 read_resources segment group 0 bus 0
  978. [SPEW ] USB0 port 0 read_resources segment group 0 bus 0
  979. [SPEW ] USB0 port 0 read_resources segment group 0 bus 0 done
  980. [SPEW ] PCI: 00:00:14.0 read_resources segment group 0 bus 0 done
  981. [SPEW ] PCI: 00:00:14.3 read_resources segment group 0 bus 0
  982. [SPEW ] PCI: 00:00:14.3 read_resources segment group 0 bus 0 done
  983. [SPEW ] PCI: 00:00:1e.3 read_resources segment group 0 bus 2
  984. [SPEW ] PCI: 00:00:1e.3 read_resources segment group 0 bus 2 done
  985. [SPEW ] dev: PCI: 00:00:1f.2, index: 0x10, base: 0xfe000000, size: 0x10000
  986. [SPEW ] dev: PCI: 00:00:1f.5, index: 0x0, base: 0xff000000, size: 0x1000000
  987. [SPEW ] dev: PCI: 00:00:1f.5, index: 0x1, base: 0xf8000000, size: 0x2000000
  988. [SPEW ] DOMAIN: 00000000 read_resources segment group 0 bus 0 done
  989. [ERROR] PCI: 00:00:1c.4 missing read_resources
  990. [ERROR] PCI: 00:00:1c.6 missing read_resources
  991. [ERROR] PCI: 00:00:1c.5 missing read_resources
  992. [ERROR] PCI: 00:00:1c.7 missing read_resources
  993. [ERROR] PCI: 00:00:1d.0 missing read_resources
  994. [ERROR] PCI: 00:00:1d.2 missing read_resources
  995. [SPEW ] Root Device read_resources segment group 0 bus 0 done
  996. [INFO ] Done reading resources.
  997. [SPEW ] Show resources in subtree (Root Device)...After reading.
  998. [DEBUG] Root Device child on link 0 CPU_CLUSTER: 0
  999. [DEBUG] CPU_CLUSTER: 0 child on link 0 APIC: 00
  1000. [DEBUG] APIC: 00
  1001. [DEBUG] APIC: 1a
  1002. [DEBUG] APIC: 1c
  1003. [DEBUG] APIC: 1e
  1004. [DEBUG] APIC: 18
  1005. [DEBUG] APIC: 09
  1006. [DEBUG] APIC: 01
  1007. [DEBUG] APIC: 08
  1008. [DEBUG] DOMAIN: 00000000 child on link 0 GPIO: 0
  1009. [SPEW ] DOMAIN: 00000000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  1010. [SPEW ] DOMAIN: 00000000 resource base 77000000 size 0 align 0 gran 0 limit dfffffff flags 40040200 index 10000100
  1011. [SPEW ] DOMAIN: 00000000 resource base 100000000 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000200
  1012. [DEBUG] GPIO: 0
  1013. [DEBUG] PCI: 00:00:00.0
  1014. [SPEW ] PCI: 00:00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
  1015. [SPEW ] PCI: 00:00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
  1016. [SPEW ] PCI: 00:00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
  1017. [SPEW ] PCI: 00:00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
  1018. [SPEW ] PCI: 00:00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
  1019. [SPEW ] PCI: 00:00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
  1020. [SPEW ] PCI: 00:00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
  1021. [SPEW ] PCI: 00:00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
  1022. [SPEW ] PCI: 00:00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
  1023. [SPEW ] PCI: 00:00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
  1024. [SPEW ] PCI: 00:00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
  1025. [SPEW ] PCI: 00:00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
  1026. [SPEW ] PCI: 00:00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
  1027. [SPEW ] PCI: 00:00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
  1028. [SPEW ] PCI: 00:00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
  1029. [SPEW ] PCI: 00:00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
  1030. [SPEW ] PCI: 00:00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
  1031. [SPEW ] PCI: 00:00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
  1032. [SPEW ] PCI: 00:00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
  1033. [SPEW ] PCI: 00:00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
  1034. [SPEW ] PCI: 00:00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
  1035. [SPEW ] PCI: 00:00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
  1036. [SPEW ] PCI: 00:00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
  1037. [SPEW ] PCI: 00:00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
  1038. [SPEW ] PCI: 00:00:00.0 resource base 100000000 size 37fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
  1039. [SPEW ] PCI: 00:00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
  1040. [SPEW ] PCI: 00:00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
  1041. [DEBUG] PCI: 00:00:02.0
  1042. [SPEW ] PCI: 00:00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
  1043. [SPEW ] PCI: 00:00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
  1044. [SPEW ] PCI: 00:00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
  1045. [DEBUG] PCI: 00:00:04.0 child on link 0 GENERIC: 0.0
  1046. [SPEW ] PCI: 00:00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
  1047. [DEBUG] GENERIC: 0.0
  1048. [DEBUG] PCI: 00:00:06.0
  1049. [SPEW ] PCI: 00:00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
  1050. [SPEW ] PCI: 00:00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
  1051. [SPEW ] PCI: 00:00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
  1052. [DEBUG] PCI: 00:00:0d.0 child on link 0 USB0 port 0
  1053. [SPEW ] PCI: 00:00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
  1054. [DEBUG] USB0 port 0 child on link 0 USB3 port 0
  1055. [DEBUG] USB3 port 0
  1056. [DEBUG] USB3 port 1
  1057. [DEBUG] USB3 port 2
  1058. [DEBUG] USB3 port 3
  1059. [DEBUG] PCI: 00:00:0d.2
  1060. [SPEW ] PCI: 00:00:0d.2 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 10
  1061. [SPEW ] PCI: 00:00:0d.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
  1062. [DEBUG] PCI: 00:00:0d.3
  1063. [SPEW ] PCI: 00:00:0d.3 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 10
  1064. [SPEW ] PCI: 00:00:0d.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
  1065. [DEBUG] PCI: 00:00:14.0 child on link 0 USB0 port 0
  1066. [SPEW ] PCI: 00:00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
  1067. [DEBUG] USB0 port 0 child on link 0 USB2 port 0
  1068. [DEBUG] USB2 port 0
  1069. [DEBUG] USB2 port 1
  1070. [DEBUG] USB2 port 2
  1071. [DEBUG] USB2 port 3
  1072. [DEBUG] USB2 port 4
  1073. [DEBUG] USB2 port 5
  1074. [DEBUG] USB2 port 6
  1075. [DEBUG] USB2 port 7
  1076. [DEBUG] USB2 port 8
  1077. [DEBUG] USB2 port 9
  1078. [DEBUG] USB3 port 0
  1079. [DEBUG] USB3 port 1
  1080. [DEBUG] USB3 port 2
  1081. [DEBUG] USB3 port 3
  1082. [DEBUG] PCI: 00:00:14.2
  1083. [DEBUG] PCI: 00:00:14.3 child on link 0 GENERIC: 0.0
  1084. [SPEW ] PCI: 00:00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
  1085. [DEBUG] GENERIC: 0.0
  1086. [DEBUG] PCI: 00:00:15.0
  1087. [SPEW ] PCI: 00:00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
  1088. [DEBUG] PCI: 00:00:15.1
  1089. [SPEW ] PCI: 00:00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
  1090. [DEBUG] PCI: 00:00:15.2
  1091. [SPEW ] PCI: 00:00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
  1092. [DEBUG] PCI: 00:00:15.3
  1093. [SPEW ] PCI: 00:00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
  1094. [DEBUG] PCI: 00:00:16.0
  1095. [SPEW ] PCI: 00:00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
  1096. [DEBUG] PCI: 00:00:19.0
  1097. [DEBUG] PCI: 00:00:19.1
  1098. [DEBUG] PCI: 00:00:1e.0
  1099. [SPEW ] PCI: 00:00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
  1100. [SPEW ] PCI: 00:00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
  1101. [DEBUG] PCI: 00:00:1e.2
  1102. [SPEW ] PCI: 00:00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
  1103. [DEBUG] PCI: 00:00:1e.3 child on link 0 SPI: 00
  1104. [SPEW ] PCI: 00:00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
  1105. [DEBUG] SPI: 00
  1106. [DEBUG] PCI: 00:00:1f.0
  1107. [SPEW ] PCI: 00:00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
  1108. [SPEW ] PCI: 00:00:1f.0 resource base 800 size 100 align 0 gran 0 limit 0 flags c0000100 index 84
  1109. [SPEW ] PCI: 00:00:1f.0 resource base 200 size 10 align 0 gran 0 limit 0 flags c0000100 index 88
  1110. [SPEW ] PCI: 00:00:1f.0 resource base 900 size 100 align 0 gran 0 limit 0 flags c0000100 index 8c
  1111. [SPEW ] PCI: 00:00:1f.0 resource base 80 size 10 align 0 gran 0 limit 0 flags c0000100 index 90
  1112. [SPEW ] PCI: 00:00:1f.0 resource base fe0b0000 size 10000 align 0 gran 0 limit 0 flags d0000200 index 98
  1113. [DEBUG] PCI: 00:00:1f.2
  1114. [SPEW ] PCI: 00:00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 10
  1115. [SPEW ] PCI: 00:00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
  1116. [DEBUG] PCI: 00:00:1f.3
  1117. [SPEW ] PCI: 00:00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
  1118. [SPEW ] PCI: 00:00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
  1119. [DEBUG] PCI: 00:00:1f.4
  1120. [SPEW ] PCI: 00:00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
  1121. [SPEW ] PCI: 00:00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
  1122. [DEBUG] PCI: 00:00:1f.5
  1123. [SPEW ] PCI: 00:00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
  1124. [SPEW ] PCI: 00:00:1f.5 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags f0000200 index 0
  1125. [SPEW ] PCI: 00:00:1f.5 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1
  1126. [DEBUG] PCI: 00:00:1c.4
  1127. [DEBUG] PCI: 00:00:1c.6
  1128. [DEBUG] PCI: 00:00:1c.5
  1129. [DEBUG] PCI: 00:00:1c.7
  1130. [DEBUG] PCI: 00:00:1d.0
  1131. [DEBUG] PCI: 00:00:1d.2
  1132. [INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 1 (relative placement) ===
  1133. [INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 2 (allocating resources) ===
  1134. [DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
  1135. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 00 base 00000000 limit 00000fff io (fixed)
  1136. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 84 base 00000800 limit 000008ff io (fixed)
  1137. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 88 base 00000200 limit 0000020f io (fixed)
  1138. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 8c base 00000900 limit 000009ff io (fixed)
  1139. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 90 base 00000080 limit 0000008f io (fixed)
  1140. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.2 01 base 00001800 limit 000018ff io (fixed)
  1141. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
  1142. [INFO ] DOMAIN: 00000000: Resource ranges:
  1143. [INFO ] * Base: 1000, Size: 800, Tag: 100
  1144. [INFO ] * Base: 1900, Size: d6a0, Tag: 100
  1145. [INFO ] * Base: efc0, Size: 1040, Tag: 100
  1146. [DEBUG] PCI: 00:00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
  1147. [DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
  1148. [DEBUG] DOMAIN: 00000000 mem: base: 77000000 size: 0 align: 0 gran: 0 limit: dfffffff
  1149. [DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff
  1150. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 00 base fedc0000 limit feddffff mem (fixed)
  1151. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 01 base feda0000 limit feda0fff mem (fixed)
  1152. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 02 base feda1000 limit feda1fff mem (fixed)
  1153. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 03 base fb000000 limit fb000fff mem (fixed)
  1154. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 04 base fed80000 limit fed83fff mem (fixed)
  1155. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
  1156. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
  1157. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
  1158. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 08 base fec00000 limit fecfffff mem (fixed)
  1159. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
  1160. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0a base fed90000 limit fed90fff mem (fixed)
  1161. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0b base fed92000 limit fed92fff mem (fixed)
  1162. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0c base fed84000 limit fed84fff mem (fixed)
  1163. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0d base fed85000 limit fed85fff mem (fixed)
  1164. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0e base fed86000 limit fed86fff mem (fixed)
  1165. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0f base fed87000 limit fed87fff mem (fixed)
  1166. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 10 base fed91000 limit fed91fff mem (fixed)
  1167. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 11 base c0000000 limit cfffffff mem (fixed)
  1168. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
  1169. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
  1170. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
  1171. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
  1172. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
  1173. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 17 base 77000000 limit 803fffff mem (fixed)
  1174. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 18 base 100000000 limit 47fbfffff mem (fixed)
  1175. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
  1176. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
  1177. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 98 base fe0b0000 limit fe0bffff mem (fixed)
  1178. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.2 10 base fe000000 limit fe00ffff mem (fixed)
  1179. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.5 00 base ff000000 limit ffffffff mem (fixed)
  1180. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.5 01 base f8000000 limit f9ffffff mem (fixed)
  1181. [INFO ] DOMAIN: 00000000: Resource ranges:
  1182. [INFO ] * Base: 80400000, Size: 3fc00000, Tag: 200
  1183. [INFO ] * Base: d0000000, Size: 10000000, Tag: 200
  1184. [INFO ] * Base: 47fc00000, Size: 7b80400000, Tag: 200
  1185. [DEBUG] PCI: 00:00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
  1186. [DEBUG] PCI: 00:00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
  1187. [DEBUG] PCI: 00:00:1f.3 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
  1188. [DEBUG] PCI: 00:00:0d.2 10 * [0x80500000 - 0x8053ffff] limit: 8053ffff mem
  1189. [DEBUG] PCI: 00:00:0d.3 10 * [0x80540000 - 0x8057ffff] limit: 8057ffff mem
  1190. [DEBUG] PCI: 00:00:04.0 10 * [0x80580000 - 0x8059ffff] limit: 8059ffff mem
  1191. [DEBUG] PCI: 00:00:0d.0 10 * [0x805a0000 - 0x805affff] limit: 805affff mem
  1192. [DEBUG] PCI: 00:00:14.0 10 * [0x805b0000 - 0x805bffff] limit: 805bffff mem
  1193. [DEBUG] PCI: 00:00:14.3 10 * [0x805c0000 - 0x805c3fff] limit: 805c3fff mem
  1194. [DEBUG] PCI: 00:00:1f.3 10 * [0x805c4000 - 0x805c7fff] limit: 805c7fff mem
  1195. [DEBUG] PCI: 00:00:0d.2 18 * [0x805c8000 - 0x805c8fff] limit: 805c8fff mem
  1196. [DEBUG] PCI: 00:00:0d.3 18 * [0x805c9000 - 0x805c9fff] limit: 805c9fff mem
  1197. [DEBUG] PCI: 00:00:15.0 10 * [0x805ca000 - 0x805cafff] limit: 805cafff mem
  1198. [DEBUG] PCI: 00:00:15.1 10 * [0x805cb000 - 0x805cbfff] limit: 805cbfff mem
  1199. [DEBUG] PCI: 00:00:15.2 10 * [0x805cc000 - 0x805ccfff] limit: 805ccfff mem
  1200. [DEBUG] PCI: 00:00:15.3 10 * [0x805cd000 - 0x805cdfff] limit: 805cdfff mem
  1201. [DEBUG] PCI: 00:00:16.0 10 * [0x805ce000 - 0x805cefff] limit: 805cefff mem
  1202. [DEBUG] PCI: 00:00:1e.0 10 * [0x805cf000 - 0x805cffff] limit: 805cffff mem
  1203. [DEBUG] PCI: 00:00:1e.0 18 * [0x805d0000 - 0x805d0fff] limit: 805d0fff mem
  1204. [DEBUG] PCI: 00:00:1e.2 10 * [0x805d1000 - 0x805d1fff] limit: 805d1fff mem
  1205. [DEBUG] PCI: 00:00:1e.3 10 * [0x805d2000 - 0x805d2fff] limit: 805d2fff mem
  1206. [DEBUG] PCI: 00:00:1f.5 10 * [0x805d3000 - 0x805d3fff] limit: 805d3fff mem
  1207. [DEBUG] PCI: 00:00:1f.4 10 * [0x805d4000 - 0x805d40ff] limit: 805d40ff mem
  1208. [DEBUG] DOMAIN: 00000000 mem: base: 77000000 size: 0 align: 0 gran: 0 limit: dfffffff done
  1209. [DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff done
  1210. [INFO ] === Resource allocator: DOMAIN: 00000000 - resource allocation complete ===
  1211. [SPEW ] Root Device assign_resources, segment group 0 bus 0
  1212. [SPEW ] DOMAIN: 00000000 assign_resources, segment group 0 bus 0
  1213. [DEBUG] PCI: 00:00:02.0 10 <- [0x0000000081000000 - 0x0000000081ffffff] size 0x01000000 gran 0x18 mem64
  1214. [DEBUG] PCI: 00:00:02.0 18 <- [0x0000000090000000 - 0x000000009fffffff] size 0x10000000 gran 0x1c prefmem64
  1215. [DEBUG] PCI: 00:00:02.0 20 <- [0x0000000000001000 - 0x000000000000103f] size 0x00000040 gran 0x06 io
  1216. [DEBUG] PCI: 00:00:04.0 10 <- [0x0000000080580000 - 0x000000008059ffff] size 0x00020000 gran 0x11 mem64
  1217. [SPEW ] PCI: 00:00:04.0 assign_resources, segment group 0 bus 1
  1218. [SPEW ] PCI: 00:00:04.0 assign_resources, segment group 0 bus 1 done
  1219. [DEBUG] PCI: 00:00:06.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 buio
  1220. [DEBUG] PCI: 00:00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 buprefmem
  1221. [DEBUG] PCI: 00:00:06.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bumem
  1222. [DEBUG] PCI: 00:00:0d.0 10 <- [0x00000000805a0000 - 0x00000000805affff] size 0x00010000 gran 0x10 mem64
  1223. [SPEW ] PCI: 00:00:0d.0 assign_resources, segment group 0 bus 0
  1224. [SPEW ] PCI: 00:00:0d.0 assign_resources, segment group 0 bus 0 done
  1225. [DEBUG] PCI: 00:00:0d.2 10 <- [0x0000000080500000 - 0x000000008053ffff] size 0x00040000 gran 0x12 mem64
  1226. [DEBUG] PCI: 00:00:0d.2 18 <- [0x00000000805c8000 - 0x00000000805c8fff] size 0x00001000 gran 0x0c mem64
  1227. [DEBUG] PCI: 00:00:0d.3 10 <- [0x0000000080540000 - 0x000000008057ffff] size 0x00040000 gran 0x12 mem64
  1228. [DEBUG] PCI: 00:00:0d.3 18 <- [0x00000000805c9000 - 0x00000000805c9fff] size 0x00001000 gran 0x0c mem64
  1229. [DEBUG] PCI: 00:00:14.0 10 <- [0x00000000805b0000 - 0x00000000805bffff] size 0x00010000 gran 0x10 mem64
  1230. [SPEW ] PCI: 00:00:14.0 assign_resources, segment group 0 bus 0
  1231. [SPEW ] PCI: 00:00:14.0 assign_resources, segment group 0 bus 0 done
  1232. [DEBUG] PCI: 00:00:14.3 10 <- [0x00000000805c0000 - 0x00000000805c3fff] size 0x00004000 gran 0x0e mem64
  1233. [SPEW ] PCI: 00:00:14.3 assign_resources, segment group 0 bus 0
  1234. [SPEW ] PCI: 00:00:14.3 assign_resources, segment group 0 bus 0 done
  1235. [DEBUG] PCI: 00:00:15.0 10 <- [0x00000000805ca000 - 0x00000000805cafff] size 0x00001000 gran 0x0c mem64
  1236. [DEBUG] PCI: 00:00:15.1 10 <- [0x00000000805cb000 - 0x00000000805cbfff] size 0x00001000 gran 0x0c mem64
  1237. [DEBUG] PCI: 00:00:15.2 10 <- [0x00000000805cc000 - 0x00000000805ccfff] size 0x00001000 gran 0x0c mem64
  1238. [DEBUG] PCI: 00:00:15.3 10 <- [0x00000000805cd000 - 0x00000000805cdfff] size 0x00001000 gran 0x0c mem64
  1239. [DEBUG] PCI: 00:00:16.0 10 <- [0x00000000805ce000 - 0x00000000805cefff] size 0x00001000 gran 0x0c mem64
  1240. [DEBUG] PCI: 00:00:1e.0 10 <- [0x00000000805cf000 - 0x00000000805cffff] size 0x00001000 gran 0x0c mem64
  1241. [DEBUG] PCI: 00:00:1e.0 18 <- [0x00000000805d0000 - 0x00000000805d0fff] size 0x00001000 gran 0x0c mem64
  1242. [DEBUG] PCI: 00:00:1e.2 10 <- [0x00000000805d1000 - 0x00000000805d1fff] size 0x00001000 gran 0x0c mem64
  1243. [DEBUG] PCI: 00:00:1e.3 10 <- [0x00000000805d2000 - 0x00000000805d2fff] size 0x00001000 gran 0x0c mem64
  1244. [SPEW ] PCI: 00:00:1e.3 assign_resources, segment group 0 bus 2
  1245. [SPEW ] PCI: 00:00:1e.3 assign_resources, segment group 0 bus 2 done
  1246. [DEBUG] PCI: 00:00:1f.3 10 <- [0x00000000805c4000 - 0x00000000805c7fff] size 0x00004000 gran 0x0e mem64
  1247. [DEBUG] PCI: 00:00:1f.3 20 <- [0x0000000080400000 - 0x00000000804fffff] size 0x00100000 gran 0x14 mem64
  1248. [DEBUG] PCI: 00:00:1f.4 10 <- [0x00000000805d4000 - 0x00000000805d40ff] size 0x00000100 gran 0x08 mem64
  1249. [DEBUG] PCI: 00:00:1f.5 10 <- [0x00000000805d3000 - 0x00000000805d3fff] size 0x00001000 gran 0x0c mem
  1250. [SPEW ] DOMAIN: 00000000 assign_resources, segment group 0 bus 0 done
  1251. [SPEW ] Root Device assign_resources, segment group 0 bus 0 done
  1252. [INFO ] Done setting resources.
  1253. [SPEW ] Show resources in subtree (Root Device)...After assigning values.
  1254. [DEBUG] Root Device child on link 0 CPU_CLUSTER: 0
  1255. [DEBUG] CPU_CLUSTER: 0 child on link 0 APIC: 00
  1256. [DEBUG] APIC: 00
  1257. [DEBUG] APIC: 1a
  1258. [DEBUG] APIC: 1c
  1259. [DEBUG] APIC: 1e
  1260. [DEBUG] APIC: 18
  1261. [DEBUG] APIC: 09
  1262. [DEBUG] APIC: 01
  1263. [DEBUG] APIC: 08
  1264. [DEBUG] DOMAIN: 00000000 child on link 0 GPIO: 0
  1265. [SPEW ] DOMAIN: 00000000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  1266. [SPEW ] DOMAIN: 00000000 resource base 77000000 size 0 align 0 gran 0 limit dfffffff flags 40040200 index 10000100
  1267. [SPEW ] DOMAIN: 00000000 resource base 100000000 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000200
  1268. [DEBUG] GPIO: 0
  1269. [DEBUG] PCI: 00:00:00.0
  1270. [SPEW ] PCI: 00:00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
  1271. [SPEW ] PCI: 00:00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
  1272. [SPEW ] PCI: 00:00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
  1273. [SPEW ] PCI: 00:00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
  1274. [SPEW ] PCI: 00:00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
  1275. [SPEW ] PCI: 00:00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
  1276. [SPEW ] PCI: 00:00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
  1277. [SPEW ] PCI: 00:00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
  1278. [SPEW ] PCI: 00:00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
  1279. [SPEW ] PCI: 00:00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
  1280. [SPEW ] PCI: 00:00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
  1281. [SPEW ] PCI: 00:00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
  1282. [SPEW ] PCI: 00:00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
  1283. [SPEW ] PCI: 00:00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
  1284. [SPEW ] PCI: 00:00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
  1285. [SPEW ] PCI: 00:00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
  1286. [SPEW ] PCI: 00:00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
  1287. [SPEW ] PCI: 00:00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
  1288. [SPEW ] PCI: 00:00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
  1289. [SPEW ] PCI: 00:00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
  1290. [SPEW ] PCI: 00:00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
  1291. [SPEW ] PCI: 00:00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
  1292. [SPEW ] PCI: 00:00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
  1293. [SPEW ] PCI: 00:00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
  1294. [SPEW ] PCI: 00:00:00.0 resource base 100000000 size 37fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
  1295. [SPEW ] PCI: 00:00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
  1296. [SPEW ] PCI: 00:00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
  1297. [DEBUG] PCI: 00:00:02.0
  1298. [SPEW ] PCI: 00:00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
  1299. [SPEW ] PCI: 00:00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
  1300. [SPEW ] PCI: 00:00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
  1301. [DEBUG] PCI: 00:00:04.0 child on link 0 GENERIC: 0.0
  1302. [SPEW ] PCI: 00:00:04.0 resource base 80580000 size 20000 align 17 gran 17 limit 8059ffff flags 60000201 index 10
  1303. [DEBUG] GENERIC: 0.0
  1304. [DEBUG] PCI: 00:00:06.0
  1305. [SPEW ] PCI: 00:00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
  1306. [SPEW ] PCI: 00:00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
  1307. [SPEW ] PCI: 00:00:06.0 resource base ffffffff size 0 align 20 gran 20 limit ffffffff flags 20080202 index 20
  1308. [DEBUG] PCI: 00:00:0d.0 child on link 0 USB0 port 0
  1309. [SPEW ] PCI: 00:00:0d.0 resource base 805a0000 size 10000 align 16 gran 16 limit 805affff flags 60000201 index 10
  1310. [DEBUG] USB0 port 0 child on link 0 USB3 port 0
  1311. [DEBUG] USB3 port 0
  1312. [DEBUG] USB3 port 1
  1313. [DEBUG] USB3 port 2
  1314. [DEBUG] USB3 port 3
  1315. [DEBUG] PCI: 00:00:0d.2
  1316. [SPEW ] PCI: 00:00:0d.2 resource base 80500000 size 40000 align 18 gran 18 limit 8053ffff flags 60000201 index 10
  1317. [SPEW ] PCI: 00:00:0d.2 resource base 805c8000 size 1000 align 12 gran 12 limit 805c8fff flags 60000201 index 18
  1318. [DEBUG] PCI: 00:00:0d.3
  1319. [SPEW ] PCI: 00:00:0d.3 resource base 80540000 size 40000 align 18 gran 18 limit 8057ffff flags 60000201 index 10
  1320. [SPEW ] PCI: 00:00:0d.3 resource base 805c9000 size 1000 align 12 gran 12 limit 805c9fff flags 60000201 index 18
  1321. [DEBUG] PCI: 00:00:14.0 child on link 0 USB0 port 0
  1322. [SPEW ] PCI: 00:00:14.0 resource base 805b0000 size 10000 align 16 gran 16 limit 805bffff flags 60000201 index 10
  1323. [DEBUG] USB0 port 0 child on link 0 USB2 port 0
  1324. [DEBUG] USB2 port 0
  1325. [DEBUG] USB2 port 1
  1326. [DEBUG] USB2 port 2
  1327. [DEBUG] USB2 port 3
  1328. [DEBUG] USB2 port 4
  1329. [DEBUG] USB2 port 5
  1330. [DEBUG] USB2 port 6
  1331. [DEBUG] USB2 port 7
  1332. [DEBUG] USB2 port 8
  1333. [DEBUG] USB2 port 9
  1334. [DEBUG] USB3 port 0
  1335. [DEBUG] USB3 port 1
  1336. [DEBUG] USB3 port 2
  1337. [DEBUG] USB3 port 3
  1338. [DEBUG] PCI: 00:00:14.2
  1339. [DEBUG] PCI: 00:00:14.3 child on link 0 GENERIC: 0.0
  1340. [SPEW ] PCI: 00:00:14.3 resource base 805c0000 size 4000 align 14 gran 14 limit 805c3fff flags 60000201 index 10
  1341. [DEBUG] GENERIC: 0.0
  1342. [DEBUG] PCI: 00:00:15.0
  1343. [SPEW ] PCI: 00:00:15.0 resource base 805ca000 size 1000 align 12 gran 12 limit 805cafff flags 60000201 index 10
  1344. [DEBUG] PCI: 00:00:15.1
  1345. [SPEW ] PCI: 00:00:15.1 resource base 805cb000 size 1000 align 12 gran 12 limit 805cbfff flags 60000201 index 10
  1346. [DEBUG] PCI: 00:00:15.2
  1347. [SPEW ] PCI: 00:00:15.2 resource base 805cc000 size 1000 align 12 gran 12 limit 805ccfff flags 60000201 index 10
  1348. [DEBUG] PCI: 00:00:15.3
  1349. [SPEW ] PCI: 00:00:15.3 resource base 805cd000 size 1000 align 12 gran 12 limit 805cdfff flags 60000201 index 10
  1350. [DEBUG] PCI: 00:00:16.0
  1351. [SPEW ] PCI: 00:00:16.0 resource base 805ce000 size 1000 align 12 gran 12 limit 805cefff flags 60000201 index 10
  1352. [DEBUG] PCI: 00:00:19.0
  1353. [DEBUG] PCI: 00:00:19.1
  1354. [DEBUG] PCI: 00:00:1e.0
  1355. [SPEW ] PCI: 00:00:1e.0 resource base 805cf000 size 1000 align 12 gran 12 limit 805cffff flags 60000201 index 10
  1356. [SPEW ] PCI: 00:00:1e.0 resource base 805d0000 size 1000 align 12 gran 12 limit 805d0fff flags 60000201 index 18
  1357. [DEBUG] PCI: 00:00:1e.2
  1358. [SPEW ] PCI: 00:00:1e.2 resource base 805d1000 size 1000 align 12 gran 12 limit 805d1fff flags 60000201 index 10
  1359. [DEBUG] PCI: 00:00:1e.3 child on link 0 SPI: 00
  1360. [SPEW ] PCI: 00:00:1e.3 resource base 805d2000 size 1000 align 12 gran 12 limit 805d2fff flags 60000201 index 10
  1361. [DEBUG] SPI: 00
  1362. [DEBUG] PCI: 00:00:1f.0
  1363. [SPEW ] PCI: 00:00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
  1364. [SPEW ] PCI: 00:00:1f.0 resource base 800 size 100 align 0 gran 0 limit 0 flags c0000100 index 84
  1365. [SPEW ] PCI: 00:00:1f.0 resource base 200 size 10 align 0 gran 0 limit 0 flags c0000100 index 88
  1366. [SPEW ] PCI: 00:00:1f.0 resource base 900 size 100 align 0 gran 0 limit 0 flags c0000100 index 8c
  1367. [SPEW ] PCI: 00:00:1f.0 resource base 80 size 10 align 0 gran 0 limit 0 flags c0000100 index 90
  1368. [SPEW ] PCI: 00:00:1f.0 resource base fe0b0000 size 10000 align 0 gran 0 limit 0 flags d0000200 index 98
  1369. [DEBUG] PCI: 00:00:1f.2
  1370. [SPEW ] PCI: 00:00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 10
  1371. [SPEW ] PCI: 00:00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
  1372. [DEBUG] PCI: 00:00:1f.3
  1373. [SPEW ] PCI: 00:00:1f.3 resource base 805c4000 size 4000 align 14 gran 14 limit 805c7fff flags 60000201 index 10
  1374. [SPEW ] PCI: 00:00:1f.3 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60000201 index 20
  1375. [DEBUG] PCI: 00:00:1f.4
  1376. [SPEW ] PCI: 00:00:1f.4 resource base 805d4000 size 100 align 12 gran 8 limit 805d40ff flags 60000201 index 10
  1377. [SPEW ] PCI: 00:00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
  1378. [DEBUG] PCI: 00:00:1f.5
  1379. [SPEW ] PCI: 00:00:1f.5 resource base 805d3000 size 1000 align 12 gran 12 limit 805d3fff flags 60000200 index 10
  1380. [SPEW ] PCI: 00:00:1f.5 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags f0000200 index 0
  1381. [SPEW ] PCI: 00:00:1f.5 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1
  1382. [DEBUG] PCI: 00:00:1c.4
  1383. [DEBUG] PCI: 00:00:1c.6
  1384. [DEBUG] PCI: 00:00:1c.5
  1385. [DEBUG] PCI: 00:00:1c.7
  1386. [DEBUG] PCI: 00:00:1d.0
  1387. [DEBUG] PCI: 00:00:1d.2
  1388. [INFO ] Done allocating resources.
  1389. [DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 3 / 3401 ms
  1390. [INFO ] coreboot skipped calling FSP notify phase: 00000020.
  1391. [DEBUG] BS: BS_DEV_ENABLE entry times (exec / console): 0 / 6 ms
  1392. [INFO ] POST: 0x74
  1393. [INFO ] Enabling resources...
  1394. [DEBUG] PCI: 00:00:00.0 subsystem <- 8086/4609
  1395. [DEBUG] PCI: 00:00:00.0 cmd <- 06
  1396. [DEBUG] PCI: 00:00:02.0 subsystem <- 8086/46b3
  1397. [DEBUG] PCI: 00:00:02.0 cmd <- 03
  1398. [DEBUG] PCI: 00:00:04.0 subsystem <- 8086/461d
  1399. [DEBUG] PCI: 00:00:04.0 cmd <- 02
  1400. [DEBUG] PCI: 00:00:06.0 bridge ctrl <- 0013
  1401. [DEBUG] PCI: 00:00:06.0 subsystem <- 8086/464d
  1402. [DEBUG] PCI: 00:00:06.0 cmd <- 100
  1403. [DEBUG] PCI: 00:00:0d.0 subsystem <- 8086/461e
  1404. [DEBUG] PCI: 00:00:0d.0 cmd <- 02
  1405. [DEBUG] PCI: 00:00:0d.2 subsystem <- 8086/463e
  1406. [DEBUG] PCI: 00:00:0d.2 cmd <- 02
  1407. [DEBUG] PCI: 00:00:0d.3 subsystem <- 8086/466d
  1408. [DEBUG] PCI: 00:00:0d.3 cmd <- 02
  1409. [DEBUG] PCI: 00:00:14.0 subsystem <- 8086/51ed
  1410. [DEBUG] PCI: 00:00:14.0 cmd <- 02
  1411. [DEBUG] PCI: 00:00:14.3 subsystem <- 8086/51f0
  1412. [DEBUG] PCI: 00:00:14.3 cmd <- 02
  1413. [DEBUG] PCI: 00:00:15.0 subsystem <- 8086/51e8
  1414. [DEBUG] PCI: 00:00:15.0 cmd <- 02
  1415. [DEBUG] PCI: 00:00:15.1 subsystem <- 8086/51e9
  1416. [DEBUG] PCI: 00:00:15.1 cmd <- 02
  1417. [DEBUG] PCI: 00:00:15.2 subsystem <- 8086/51ea
  1418. [DEBUG] PCI: 00:00:15.2 cmd <- 02
  1419. [DEBUG] PCI: 00:00:15.3 subsystem <- 8086/51eb
  1420. [DEBUG] PCI: 00:00:15.3 cmd <- 02
  1421. [DEBUG] PCI: 00:00:16.0 subsystem <- 8086/51e0
  1422. [DEBUG] PCI: 00:00:16.0 cmd <- 06
  1423. [DEBUG] PCI: 00:00:1e.0 subsystem <- 8086/51a8
  1424. [DEBUG] PCI: 00:00:1e.0 cmd <- 02
  1425. [DEBUG] PCI: 00:00:1e.2 subsystem <- 8086/51aa
  1426. [DEBUG] PCI: 00:00:1e.2 cmd <- 06
  1427. [DEBUG] PCI: 00:00:1e.3 subsystem <- 8086/51ab
  1428. [DEBUG] PCI: 00:00:1e.3 cmd <- 06
  1429. [DEBUG] PCI: 00:00:1f.0 subsystem <- 8086/5182
  1430. [DEBUG] PCI: 00:00:1f.0 cmd <- 407
  1431. [DEBUG] PCI: 00:00:1f.3 subsystem <- 8086/51c8
  1432. [DEBUG] PCI: 00:00:1f.3 cmd <- 02
  1433. [DEBUG] PCI: 00:00:1f.4 subsystem <- 8086/51a3
  1434. [DEBUG] PCI: 00:00:1f.4 cmd <- 03
  1435. [DEBUG] PCI: 00:00:1f.5 subsystem <- 8086/51a4
  1436. [DEBUG] PCI: 00:00:1f.5 cmd <- 406
  1437. [INFO ] done.
  1438. [DEBUG] BS: BS_DEV_ENABLE run times (exec / console): 1 / 194 ms
  1439. [INFO ] POST: 0x00
  1440. [DEBUG] ME: Version: 16.1.30.2307
  1441. [DEBUG] BS: BS_DEV_ENABLE exit times (exec / console): 6 / 6 ms
  1442. [INFO ] POST: 0x75
  1443. [INFO ] Initializing devices...
  1444. [INFO ] POST: 0x75
  1445. [INFO ] POST: 0x75
  1446. [INFO ] POST: 0x75
  1447. [INFO ] POST: 0x75
  1448. [INFO ] POST: 0x75
  1449. [INFO ] POST: 0x75
  1450. [INFO ] POST: 0x75
  1451. [INFO ] POST: 0x75
  1452. [INFO ] POST: 0x75
  1453. [INFO ] POST: 0x75
  1454. [INFO ] POST: 0x75
  1455. [INFO ] POST: 0x75
  1456. [INFO ] POST: 0x75
  1457. [INFO ] POST: 0x75
  1458. [INFO ] POST: 0x75
  1459. [INFO ] POST: 0x75
  1460. [INFO ] POST: 0x75
  1461. [INFO ] POST: 0x75
  1462. [DEBUG] PCI: 00:00:00.0 init
  1463. [INFO ] CPU TDP = 15 Watts
  1464. [INFO ] CPU PL1 = 15 Watts
  1465. [INFO ] CPU PL2 = 55 Watts
  1466. [INFO ] CPU PL4 = 123 Watts
  1467. [DEBUG] PCI: 00:00:00.0 init finished in 12 msecs
  1468. [INFO ] POST: 0x75
  1469. [DEBUG] PCI: 00:00:02.0 init
  1470. [INFO ] GMA: Found VBT in CBFS
  1471. [INFO ] GMA: Found valid VBT in CBFS
  1472. [INFO ] framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
  1473. [INFO ] x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
  1474. [DEBUG] PCI: 00:00:02.0 init finished in 22 msecs
  1475. [INFO ] POST: 0x75
  1476. [INFO ] POST: 0x75
  1477. [DEBUG] PCI: 00:00:06.0 init
  1478. [DEBUG] Initializing PCH PCIe bridge.
  1479. [DEBUG] PCI: 00:00:06.0 init finished in 4 msecs
  1480. [INFO ] POST: 0x75
  1481. [INFO ] POST: 0x75
  1482. [INFO ] POST: 0x75
  1483. [INFO ] POST: 0x75
  1484. [DEBUG] PCI: 00:00:14.0 init
  1485. [DEBUG] PCI: 00:00:14.0 init finished in 0 msecs
  1486. [INFO ] POST: 0x75
  1487. [INFO ] POST: 0x75
  1488. [INFO ] POST: 0x75
  1489. [DEBUG] PCI: 00:00:15.0 init
  1490. [DEBUG] I2C bus 0 version 0x3230302a
  1491. [INFO ] DW I2C bus 0 at 0x805ca000 (400 KHz)
  1492. [DEBUG] PCI: 00:00:15.0 init finished in 8 msecs
  1493. [INFO ] POST: 0x75
  1494. [DEBUG] PCI: 00:00:15.1 init
  1495. [DEBUG] I2C bus 1 version 0x3230302a
  1496. [INFO ] DW I2C bus 1 at 0x805cb000 (400 KHz)
  1497. [DEBUG] PCI: 00:00:15.1 init finished in 8 msecs
  1498. [INFO ] POST: 0x75
  1499. [DEBUG] PCI: 00:00:15.2 init
  1500. [DEBUG] I2C bus 2 version 0x3230302a
  1501. [INFO ] DW I2C bus 2 at 0x805cc000 (400 KHz)
  1502. [DEBUG] PCI: 00:00:15.2 init finished in 8 msecs
  1503. [INFO ] POST: 0x75
  1504. [DEBUG] PCI: 00:00:15.3 init
  1505. [DEBUG] I2C bus 3 version 0x3230302a
  1506. [INFO ] DW I2C bus 3 at 0x805cd000 (400 KHz)
  1507. [DEBUG] PCI: 00:00:15.3 init finished in 8 msecs
  1508. [INFO ] POST: 0x75
  1509. [DEBUG] PCI: 00:00:16.0 init
  1510. [DEBUG] PCI: 00:00:16.0 init finished in 0 msecs
  1511. [INFO ] POST: 0x75
  1512. [INFO ] POST: 0x75
  1513. [INFO ] POST: 0x75
  1514. [INFO ] POST: 0x75
  1515. [INFO ] POST: 0x75
  1516. [INFO ] POST: 0x75
  1517. [DEBUG] PCI: 00:00:1f.0 init
  1518. [DEBUG] IOAPIC: Initializing IOAPIC at fec00000
  1519. [DEBUG] IOAPIC: ID = 0x00
  1520. [SPEW ] IOAPIC: Dumping registers
  1521. [SPEW ] reg 0x0000: 0x00000000
  1522. [SPEW ] reg 0x0001: 0x00770020
  1523. [SPEW ] reg 0x0002: 0x00000000
  1524. [DEBUG] IOAPIC: 120 interrupts
  1525. [DEBUG] IOAPIC: Clearing IOAPIC at fec00000
  1526. [SPEW ] IOAPIC: vector 0x00 value 0x00000000 0x00010000
  1527. [SPEW ] IOAPIC: vector 0x01 value 0x00000000 0x00010000
  1528. [SPEW ] IOAPIC: vector 0x02 value 0x00000000 0x00010000
  1529. [SPEW ] IOAPIC: vector 0x03 value 0x00000000 0x00010000
  1530. [SPEW ] IOAPIC: vector 0x04 value 0x00000000 0x00010000
  1531. [SPEW ] IOAPIC: vector 0x05 value 0x00000000 0x00010000
  1532. [SPEW ] IOAPIC: vector 0x06 value 0x00000000 0x00010000
  1533. [SPEW ] IOAPIC: vector 0x07 value 0x00000000 0x00010000
  1534. [SPEW ] IOAPIC: vector 0x08 value 0x00000000 0x00010000
  1535. [SPEW ] IOAPIC: vector 0x09 value 0x00000000 0x00010000
  1536. [SPEW ] IOAPIC: vector 0x0a value 0x00000000 0x00010000
  1537. [SPEW ] IOAPIC: vector 0x0b value 0x00000000 0x00010000
  1538. [SPEW ] IOAPIC: vector 0x0c value 0x00000000 0x00010000
  1539. [SPEW ] IOAPIC: vector 0x0d value 0x00000000 0x00010000
  1540. [SPEW ] IOAPIC: vector 0x0e value 0x00000000 0x00010000
  1541. [SPEW ] IOAPIC: vector 0x0f value 0x00000000 0x00010000
  1542. [SPEW ] IOAPIC: vector 0x10 value 0x00000000 0x00010000
  1543. [SPEW ] IOAPIC: vector 0x11 value 0x00000000 0x00010000
  1544. [SPEW ] IOAPIC: vector 0x12 value 0x00000000 0x00010000
  1545. [SPEW ] IOAPIC: vector 0x13 value 0x00000000 0x00010000
  1546. [SPEW ] IOAPIC: vector 0x14 value 0x00000000 0x00010000
  1547. [SPEW ] IOAPIC: vector 0x15 value 0x00000000 0x00010000
  1548. [SPEW ] IOAPIC: vector 0x16 value 0x00000000 0x00010000
  1549. [SPEW ] IOAPIC: vector 0x17 value 0x00000000 0x00010000
  1550. [SPEW ] IOAPIC: vector 0x18 value 0x00000000 0x00010000
  1551. [SPEW ] IOAPIC: vector 0x19 value 0x00000000 0x00010000
  1552. [SPEW ] IOAPIC: vector 0x1a value 0x00000000 0x00010000
  1553. [SPEW ] IOAPIC: vector 0x1b value 0x00000000 0x00010000
  1554. [SPEW ] IOAPIC: vector 0x1c value 0x00000000 0x00010000
  1555. [SPEW ] IOAPIC: vector 0x1d value 0x00000000 0x00010000
  1556. [SPEW ] IOAPIC: vector 0x1e value 0x00000000 0x00010000
  1557. [SPEW ] IOAPIC: vector 0x1f value 0x00000000 0x00010000
  1558. [SPEW ] IOAPIC: vector 0x20 value 0x00000000 0x00010000
  1559. [SPEW ] IOAPIC: vector 0x21 value 0x00000000 0x00010000
  1560. [SPEW ] IOAPIC: vector 0x22 value 0x00000000 0x00010000
  1561. [SPEW ] IOAPIC: vector 0x23 value 0x00000000 0x00010000
  1562. [SPEW ] IOAPIC: vector 0x24 value 0x00000000 0x00010000
  1563. [SPEW ] IOAPIC: vector 0x25 value 0x00000000 0x00010000
  1564. [SPEW ] IOAPIC: vector 0x26 value 0x00000000 0x00010000
  1565. [SPEW ] IOAPIC: vector 0x27 value 0x00000000 0x00010000
  1566. [SPEW ] IOAPIC: vector 0x28 value 0x00000000 0x00010000
  1567. [SPEW ] IOAPIC: vector 0x29 value 0x00000000 0x00010000
  1568. [SPEW ] IOAPIC: vector 0x2a value 0x00000000 0x00010000
  1569. [SPEW ] IOAPIC: vector 0x2b value 0x00000000 0x00010000
  1570. [SPEW ] IOAPIC: vector 0x2c value 0x00000000 0x00010000
  1571. [SPEW ] IOAPIC: vector 0x2d value 0x00000000 0x00010000
  1572. [SPEW ] IOAPIC: vector 0x2e value 0x00000000 0x00010000
  1573. [SPEW ] IOAPIC: vector 0x2f value 0x00000000 0x00010000
  1574. [SPEW ] IOAPIC: vector 0x30 value 0x00000000 0x00010000
  1575. [SPEW ] IOAPIC: vector 0x31 value 0x00000000 0x00010000
  1576. [SPEW ] IOAPIC: vector 0x32 value 0x00000000 0x00010000
  1577. [SPEW ] IOAPIC: vector 0x33 value 0x00000000 0x00010000
  1578. [SPEW ] IOAPIC: vector 0x34 value 0x00000000 0x00010000
  1579. [SPEW ] IOAPIC: vector 0x35 value 0x00000000 0x00010000
  1580. [SPEW ] IOAPIC: vector 0x36 value 0x00000000 0x00010000
  1581. [SPEW ] IOAPIC: vector 0x37 value 0x00000000 0x00010000
  1582. [SPEW ] IOAPIC: vector 0x38 value 0x00000000 0x00010000
  1583. [SPEW ] IOAPIC: vector 0x39 value 0x00000000 0x00010000
  1584. [SPEW ] IOAPIC: vector 0x3a value 0x00000000 0x00010000
  1585. [SPEW ] IOAPIC: vector 0x3b value 0x00000000 0x00010000
  1586. [SPEW ] IOAPIC: vector 0x3c value 0x00000000 0x00010000
  1587. [SPEW ] IOAPIC: vector 0x3d value 0x00000000 0x00010000
  1588. [SPEW ] IOAPIC: vector 0x3e value 0x00000000 0x00010000
  1589. [SPEW ] IOAPIC: vector 0x3f value 0x00000000 0x00010000
  1590. [SPEW ] IOAPIC: vector 0x40 value 0x00000000 0x00010000
  1591. [SPEW ] IOAPIC: vector 0x41 value 0x00000000 0x00010000
  1592. [SPEW ] IOAPIC: vector 0x42 value 0x00000000 0x00010000
  1593. [SPEW ] IOAPIC: vector 0x43 value 0x00000000 0x00010000
  1594. [SPEW ] IOAPIC: vector 0x44 value 0x00000000 0x00010000
  1595. [SPEW ] IOAPIC: vector 0x45 value 0x00000000 0x00010000
  1596. [SPEW ] IOAPIC: vector 0x46 value 0x00000000 0x00010000
  1597. [SPEW ] IOAPIC: vector 0x47 value 0x00000000 0x00010000
  1598. [SPEW ] IOAPIC: vector 0x48 value 0x00000000 0x00010000
  1599. [SPEW ] IOAPIC: vector 0x49 value 0x00000000 0x00010000
  1600. [SPEW ] IOAPIC: vector 0x4a value 0x00000000 0x00010000
  1601. [SPEW ] IOAPIC: vector 0x4b value 0x00000000 0x00010000
  1602. [SPEW ] IOAPIC: vector 0x4c value 0x00000000 0x00010000
  1603. [SPEW ] IOAPIC: vector 0x4d value 0x00000000 0x00010000
  1604. [SPEW ] IOAPIC: vector 0x4e value 0x00000000 0x00010000
  1605. [SPEW ] IOAPIC: vector 0x4f value 0x00000000 0x00010000
  1606. [SPEW ] IOAPIC: vector 0x50 value 0x00000000 0x00010000
  1607. [SPEW ] IOAPIC: vector 0x51 value 0x00000000 0x00010000
  1608. [SPEW ] IOAPIC: vector 0x52 value 0x00000000 0x00010000
  1609. [SPEW ] IOAPIC: vector 0x53 value 0x00000000 0x00010000
  1610. [SPEW ] IOAPIC: vector 0x54 value 0x00000000 0x00010000
  1611. [SPEW ] IOAPIC: vector 0x55 value 0x00000000 0x00010000
  1612. [SPEW ] IOAPIC: vector 0x56 value 0x00000000 0x00010000
  1613. [SPEW ] IOAPIC: vector 0x57 value 0x00000000 0x00010000
  1614. [SPEW ] IOAPIC: vector 0x58 value 0x00000000 0x00010000
  1615. [SPEW ] IOAPIC: vector 0x59 value 0x00000000 0x00010000
  1616. [SPEW ] IOAPIC: vector 0x5a value 0x00000000 0x00010000
  1617. [SPEW ] IOAPIC: vector 0x5b value 0x00000000 0x00010000
  1618. [SPEW ] IOAPIC: vector 0x5c value 0x00000000 0x00010000
  1619. [SPEW ] IOAPIC: vector 0x5d value 0x00000000 0x00010000
  1620. [SPEW ] IOAPIC: vector 0x5e value 0x00000000 0x00010000
  1621. [SPEW ] IOAPIC: vector 0x5f value 0x00000000 0x00010000
  1622. [SPEW ] IOAPIC: vector 0x60 value 0x00000000 0x00010000
  1623. [SPEW ] IOAPIC: vector 0x61 value 0x00000000 0x00010000
  1624. [SPEW ] IOAPIC: vector 0x62 value 0x00000000 0x00010000
  1625. [SPEW ] IOAPIC: vector 0x63 value 0x00000000 0x00010000
  1626. [SPEW ] IOAPIC: vector 0x64 value 0x00000000 0x00010000
  1627. [SPEW ] IOAPIC: vector 0x65 value 0x00000000 0x00010000
  1628. [SPEW ] IOAPIC: vector 0x66 value 0x00000000 0x00010000
  1629. [SPEW ] IOAPIC: vector 0x67 value 0x00000000 0x00010000
  1630. [SPEW ] IOAPIC: vector 0x68 value 0x00000000 0x00010000
  1631. [SPEW ] IOAPIC: vector 0x69 value 0x00000000 0x00010000
  1632. [SPEW ] IOAPIC: vector 0x6a value 0x00000000 0x00010000
  1633. [SPEW ] IOAPIC: vector 0x6b value 0x00000000 0x00010000
  1634. [SPEW ] IOAPIC: vector 0x6c value 0x00000000 0x00010000
  1635. [SPEW ] IOAPIC: vector 0x6d value 0x00000000 0x00010000
  1636. [SPEW ] IOAPIC: vector 0x6e value 0x00000000 0x00010000
  1637. [SPEW ] IOAPIC: vector 0x6f value 0x00000000 0x00010000
  1638. [SPEW ] IOAPIC: vector 0x70 value 0x00000000 0x00010000
  1639. [SPEW ] IOAPIC: vector 0x71 value 0x00000000 0x00010000
  1640. [SPEW ] IOAPIC: vector 0x72 value 0x00000000 0x00010000
  1641. [SPEW ] IOAPIC: vector 0x73 value 0x00000000 0x00010000
  1642. [SPEW ] IOAPIC: vector 0x74 value 0x00000000 0x00010000
  1643. [SPEW ] IOAPIC: vector 0x75 value 0x00000000 0x00010000
  1644. [SPEW ] IOAPIC: vector 0x76 value 0x00000000 0x00010000
  1645. [SPEW ] IOAPIC: vector 0x77 value 0x00000000 0x00010000
  1646. [DEBUG] IOAPIC: Bootstrap Processor Local APIC = 0x00
  1647. [SPEW ] IOAPIC: vector 0x00 value 0x00000000 0x00000700
  1648. [DEBUG] PCI: 00:00:1f.0 init finished in 721 msecs
  1649. [INFO ] POST: 0x75
  1650. [DEBUG] PCI: 00:00:1f.2 init
  1651. [DEBUG] apm_control: Disabling ACPI.
  1652. [DEBUG] APMC done.
  1653. [DEBUG] PCI: 00:00:1f.2 init finished in 6 msecs
  1654. [INFO ] POST: 0x75
  1655. [DEBUG] PCI: 00:00:1f.3 init
  1656. [DEBUG] azalia_audio: base = 0x805c4000
  1657. [DEBUG] azalia_audio: codec_mask = 01
  1658. [DEBUG] azalia_audio: Initializing codec #0
  1659. [DEBUG] azalia_audio: codec viddid: 10ec0256
  1660. [DEBUG] azalia_audio: verb_size: 148
  1661. [DEBUG] azalia_audio: verb loaded.
  1662. [DEBUG] PCI: 00:00:1f.3 init finished in 35 msecs
  1663. [INFO ] POST: 0x75
  1664. [DEBUG] PCI: 00:00:1f.4 init
  1665. [DEBUG] PCI: 00:00:1f.4 init finished in 0 msecs
  1666. [INFO ] POST: 0x75
  1667. [INFO ] POST: 0x75
  1668. [INFO ] POST: 0x75
  1669. [INFO ] POST: 0x75
  1670. [INFO ] POST: 0x75
  1671. [INFO ] POST: 0x75
  1672. [INFO ] POST: 0x75
  1673. [INFO ] POST: 0x75
  1674. [INFO ] POST: 0x75
  1675. [INFO ] POST: 0x75
  1676. [INFO ] POST: 0x75
  1677. [INFO ] POST: 0x75
  1678. [INFO ] POST: 0x75
  1679. [INFO ] POST: 0x75
  1680. [INFO ] POST: 0x75
  1681. [INFO ] POST: 0x75
  1682. [INFO ] POST: 0x75
  1683. [INFO ] POST: 0x75
  1684. [INFO ] POST: 0x75
  1685. [INFO ] POST: 0x75
  1686. [INFO ] POST: 0x75
  1687. [INFO ] POST: 0x75
  1688. [INFO ] POST: 0x75
  1689. [INFO ] POST: 0x75
  1690. [INFO ] Devices initialized
  1691. [SPEW ] Show all devs... After init.
  1692. [SPEW ] Root Device: enabled 1
  1693. [SPEW ] CPU_CLUSTER: 0: enabled 1
  1694. [SPEW ] DOMAIN: 00000000: enabled 1
  1695. [SPEW ] PCI: 00:00:1c.4: enabled 1
  1696. [SPEW ] PCI: 00:00:1c.6: enabled 1
  1697. [SPEW ] PCI: 00:00:1c.5: enabled 1
  1698. [SPEW ] PCI: 00:00:1c.7: enabled 1
  1699. [SPEW ] PCI: 00:00:1d.0: enabled 1
  1700. [SPEW ] PCI: 00:00:1d.2: enabled 1
  1701. [SPEW ] GPIO: 0: enabled 1
  1702. [SPEW ] PCI: 00:00:00.0: enabled 1
  1703. [SPEW ] PCI: 00:00:01.0: enabled 0
  1704. [SPEW ] PCI: 00:00:01.1: enabled 0
  1705. [SPEW ] PCI: 00:00:02.0: enabled 1
  1706. [SPEW ] PCI: 00:00:04.0: enabled 1
  1707. [SPEW ] PCI: 00:00:05.0: enabled 0
  1708. [SPEW ] PCI: 00:00:06.0: enabled 1
  1709. [SPEW ] PCI: 00:00:06.2: enabled 0
  1710. [SPEW ] PCI: 00:00:07.0: enabled 0
  1711. [SPEW ] PCI: 00:00:07.1: enabled 0
  1712. [SPEW ] PCI: 00:00:07.2: enabled 0
  1713. [SPEW ] PCI: 00:00:07.3: enabled 0
  1714. [SPEW ] PCI: 00:00:08.0: enabled 0
  1715. [SPEW ] PCI: 00:00:09.0: enabled 0
  1716. [SPEW ] PCI: 00:00:0a.0: enabled 0
  1717. [SPEW ] PCI: 00:00:0d.0: enabled 1
  1718. [SPEW ] PCI: 00:00:0d.1: enabled 0
  1719. [SPEW ] PCI: 00:00:0d.2: enabled 1
  1720. [SPEW ] PCI: 00:00:0d.3: enabled 1
  1721. [SPEW ] PCI: 00:00:0e.0: enabled 0
  1722. [SPEW ] PCI: 00:00:10.0: enabled 0
  1723. [SPEW ] PCI: 00:00:10.1: enabled 0
  1724. [SPEW ] PCI: 00:00:10.6: enabled 0
  1725. [SPEW ] PCI: 00:00:10.7: enabled 0
  1726. [SPEW ] PCI: 00:00:12.0: enabled 0
  1727. [SPEW ] PCI: 00:00:12.6: enabled 0
  1728. [SPEW ] PCI: 00:00:12.7: enabled 0
  1729. [SPEW ] PCI: 00:00:13.0: enabled 0
  1730. [SPEW ] PCI: 00:00:14.0: enabled 1
  1731. [SPEW ] PCI: 00:00:14.1: enabled 0
  1732. [SPEW ] PCI: 00:00:14.2: enabled 0
  1733. [SPEW ] PCI: 00:00:14.3: enabled 1
  1734. [SPEW ] PCI: 00:00:15.0: enabled 1
  1735. [SPEW ] PCI: 00:00:15.1: enabled 1
  1736. [SPEW ] PCI: 00:00:15.2: enabled 1
  1737. [SPEW ] PCI: 00:00:15.3: enabled 1
  1738. [SPEW ] PCI: 00:00:16.0: enabled 1
  1739. [SPEW ] PCI: 00:00:16.1: enabled 0
  1740. [SPEW ] PCI: 00:00:16.2: enabled 0
  1741. [SPEW ] PCI: 00:00:16.3: enabled 0
  1742. [SPEW ] PCI: 00:00:16.4: enabled 0
  1743. [SPEW ] PCI: 00:00:16.5: enabled 0
  1744. [SPEW ] PCI: 00:00:17.0: enabled 0
  1745. [SPEW ] PCI: 00:00:19.0: enabled 0
  1746. [SPEW ] PCI: 00:00:19.1: enabled 0
  1747. [SPEW ] PCI: 00:00:19.2: enabled 0
  1748. [SPEW ] PCI: 00:00:1a.0: enabled 0
  1749. [SPEW ] PCI: 00:00:1c.0: enabled 0
  1750. [SPEW ] PCI: 00:00:1c.1: enabled 0
  1751. [SPEW ] PCI: 00:00:1c.2: enabled 0
  1752. [SPEW ] PCI: 00:00:1c.3: enabled 0
  1753. [SPEW ] PCI: 00:00:1c.4: enabled 0
  1754. [SPEW ] PCI: 00:00:1c.5: enabled 0
  1755. [SPEW ] PCI: 00:00:1c.6: enabled 0
  1756. [SPEW ] PCI: 00:00:1c.7: enabled 0
  1757. [SPEW ] PCI: 00:00:1d.0: enabled 0
  1758. [SPEW ] PCI: 00:00:1d.1: enabled 0
  1759. [SPEW ] PCI: 00:00:1d.2: enabled 0
  1760. [SPEW ] PCI: 00:00:1d.3: enabled 0
  1761. [SPEW ] PCI: 00:00:1e.0: enabled 1
  1762. [SPEW ] PCI: 00:00:1e.1: enabled 0
  1763. [SPEW ] PCI: 00:00:1e.2: enabled 1
  1764. [SPEW ] PCI: 00:00:1e.3: enabled 1
  1765. [SPEW ] PCI: 00:00:1f.0: enabled 1
  1766. [SPEW ] PCI: 00:00:1f.1: enabled 0
  1767. [SPEW ] PCI: 00:00:1f.2: enabled 1
  1768. [SPEW ] PCI: 00:00:1f.3: enabled 1
  1769. [SPEW ] PCI: 00:00:1f.4: enabled 1
  1770. [SPEW ] PCI: 00:00:1f.5: enabled 1
  1771. [SPEW ] PCI: 00:00:1f.6: enabled 0
  1772. [SPEW ] PCI: 00:00:1f.7: enabled 0
  1773. [SPEW ] GENERIC: 0.0: enabled 1
  1774. [SPEW ] GENERIC: 0.0: enabled 1
  1775. [SPEW ] GENERIC: 1.0: enabled 1
  1776. [SPEW ] GENERIC: 0.0: enabled 1
  1777. [SPEW ] GENERIC: 1.0: enabled 1
  1778. [SPEW ] USB0 port 0: enabled 0
  1779. [SPEW ] USB0 port 0: enabled 1
  1780. [SPEW ] GENERIC: 0.0: enabled 1
  1781. [SPEW ] SPI: 00: enabled 1
  1782. [SPEW ] USB3 port 0: enabled 0
  1783. [SPEW ] USB3 port 1: enabled 0
  1784. [SPEW ] USB3 port 2: enabled 0
  1785. [SPEW ] USB3 port 3: enabled 0
  1786. [SPEW ] USB2 port 0: enabled 0
  1787. [SPEW ] USB2 port 1: enabled 0
  1788. [SPEW ] USB2 port 2: enabled 0
  1789. [SPEW ] USB2 port 3: enabled 0
  1790. [SPEW ] USB2 port 4: enabled 0
  1791. [SPEW ] USB2 port 5: enabled 0
  1792. [SPEW ] USB2 port 6: enabled 0
  1793. [SPEW ] USB2 port 7: enabled 0
  1794. [SPEW ] USB2 port 8: enabled 0
  1795. [SPEW ] USB2 port 9: enabled 1
  1796. [SPEW ] USB3 port 0: enabled 0
  1797. [SPEW ] USB3 port 1: enabled 0
  1798. [SPEW ] USB3 port 2: enabled 0
  1799. [SPEW ] USB3 port 3: enabled 0
  1800. [SPEW ] APIC: 00: enabled 1
  1801. [SPEW ] APIC: 1a: enabled 1
  1802. [SPEW ] APIC: 1c: enabled 1
  1803. [SPEW ] APIC: 1e: enabled 1
  1804. [SPEW ] APIC: 18: enabled 1
  1805. [SPEW ] APIC: 09: enabled 1
  1806. [SPEW ] APIC: 01: enabled 1
  1807. [SPEW ] APIC: 08: enabled 1
  1808. [DEBUG] BS: BS_DEV_INIT run times (exec / console): 11 / 1543 ms
  1809. [DEBUG] FMAP: area SMMSTORE found @ 1a10000 (262144 bytes)
  1810. [INFO ] SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
  1811. [DEBUG] smm store: 4 # blocks with size 0x10000
  1812. [INFO ] SMMSTORE: Setting up SMI handler
  1813. [DEBUG] BS: BS_DEV_INIT exit times (exec / console): 0 / 22 ms
  1814. [INFO ] POST: 0x76
  1815. [INFO ] Finalize devices...
  1816. [DEBUG] PCI: 00:00:02.0 final
  1817. [DEBUG] PCI: 00:00:16.0 final
  1818. [DEBUG] PCI: 00:00:1f.2 final
  1819. [DEBUG] PCI: 00:00:1f.4 final
  1820. [INFO ] Devices finalized
  1821. [DEBUG] BS: BS_POST_DEVICE run times (exec / console): 1 / 22 ms
  1822. [INFO ] POST: 0x77
  1823. [DEBUG] BS: BS_OS_RESUME_CHECK run times (exec / console): 0 / 2 ms
  1824. [DEBUG] ME: HFSTS1 : 0x90000255
  1825. [DEBUG] ME: HFSTS2 : 0x32850106
  1826. [DEBUG] ME: HFSTS3 : 0x00000020
  1827. [DEBUG] ME: HFSTS4 : 0x00004000
  1828. [DEBUG] ME: HFSTS5 : 0x00000000
  1829. [DEBUG] ME: HFSTS6 : 0x00000002
  1830. [DEBUG] ME: Manufacturing Mode : YES
  1831. [DEBUG] ME: SPI Protection Mode Enabled : NO
  1832. [DEBUG] ME: FW Partition Table : OK
  1833. [DEBUG] ME: Bringup Loader Failure : NO
  1834. [DEBUG] ME: Firmware Init Complete : YES
  1835. [DEBUG] ME: Boot Options Present : NO
  1836. [DEBUG] ME: Update In Progress : NO
  1837. [DEBUG] ME: D0i3 Support : YES
  1838. [DEBUG] ME: Low Power State Enabled : NO
  1839. [DEBUG] ME: CPU Replaced : NO
  1840. [DEBUG] ME: CPU Replacement Valid : YES
  1841. [DEBUG] ME: Current Working State : 5
  1842. [DEBUG] ME: Current Operation State : 1
  1843. [DEBUG] ME: Current Operation Mode : 0
  1844. [DEBUG] ME: Error Code : 0
  1845. [DEBUG] ME: FPFs Committed : NO
  1846. [DEBUG] ME: Enhanced Debug Mode : NO
  1847. [DEBUG] ME: CPU Debug Disabled : YES
  1848. [DEBUG] ME: TXT Support : NO
  1849. [DEBUG] ME: Manufacturing Vars Locked : NO
  1850. [DEBUG] BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 127 ms
  1851. [INFO ] POST: 0x79
  1852. [INFO ] POST: 0x9c
  1853. [INFO ] CBFS: Found 'fallback/dsdt.aml' @0xc1a00 size 0x3f32 in mcache @0x76abd1f8
  1854. [WARN ] CBFS: 'fallback/slic' not found.
  1855. [INFO ] ACPI: Writing ACPI tables at 76890000.
  1856. [DEBUG] ACPI: * FACS
  1857. [DEBUG] SCI is IRQ 9, GSI 9
  1858. [DEBUG] ACPI: * FACP
  1859. [DEBUG] ACPI: added table 1/32, length now 44
  1860. [DEBUG] Found 1 CPU(s) with 6/8 physical/logical core(s) each.
  1861. [DEBUG] PCI space above 4GB MMIO is at 0x47fc00000, len = 0x7b80400000
  1862. [WARN ] Unknown min d_state for PCI: 00:1f.4
  1863. [WARN ] Unknown min d_state for PCI: 00:1f.4
  1864. [INFO ] \_SB.PCI0.PEPD: Intel Power Engine Plug-in
  1865. [INFO ] \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:00:1f.2
  1866. [INFO ] \_SB.DPTF: Intel DPTF at GENERIC: 0.0
  1867. [INFO ] \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
  1868. [INFO ] \_SB.PCI0.SPI1.S002: SPI Device at SPI: 00
  1869. [INFO ] \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
  1870. [DEBUG] ACPI: * SSDT
  1871. [DEBUG] ACPI: added table 2/32, length now 52
  1872. [DEBUG] ACPI: * MCFG
  1873. [DEBUG] ACPI: added table 3/32, length now 60
  1874. [DEBUG] ACPI: * LPIT
  1875. [DEBUG] ACPI: added table 4/32, length now 68
  1876. [DEBUG] IOAPIC: 120 interrupts
  1877. [DEBUG] SCI is IRQ 9, GSI 9
  1878. [DEBUG] ACPI: * APIC
  1879. [DEBUG] ACPI: added table 5/32, length now 76
  1880. [DEBUG] ACPI: * SPCR
  1881. [DEBUG] ACPI: added table 6/32, length now 84
  1882. [DEBUG] current = 76896790
  1883. [DEBUG] ACPI: * DMAR
  1884. [DEBUG] ACPI: added table 7/32, length now 92
  1885. [DEBUG] acpi_write_dbg2_pci_uart: Device not found
  1886. [DEBUG] ACPI: * HPET
  1887. [DEBUG] ACPI: added table 8/32, length now 100
  1888. [INFO ] ACPI: done.
  1889. [DEBUG] ACPI tables: 26720 bytes.
  1890. [DEBUG] smbios_write_tables: 76888000
  1891. [DEBUG] SMBIOS firmware version is set to coreboot_version: '24.02-92-gcce6dfbf4906-dirty'
  1892. [SPEW ] Data from EC: 0x08
  1893. [SPEW ] Data from EC: 0x14
  1894. [INFO ] Create SMBIOS type 16
  1895. [INFO ] Create SMBIOS type 17
  1896. [INFO ] Create SMBIOS type 20
  1897. [INFO ] GENERIC: 0.0 (WIFI Device)
  1898. [DEBUG] SMBIOS tables: 1086 bytes.
  1899. [DEBUG] Writing table forward entry at 0x00000500
  1900. [DEBUG] Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 4953
  1901. [DEBUG] Writing coreboot table at 0x768b4000
  1902. [DEBUG] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
  1903. [DEBUG] 1. 0000000000001000-000000000009ffff: RAM
  1904. [DEBUG] 2. 00000000000a0000-00000000000fffff: RESERVED
  1905. [DEBUG] 3. 0000000000100000-0000000076887fff: RAM
  1906. [DEBUG] 4. 0000000076888000-0000000076940fff: CONFIGURATION TABLES
  1907. [DEBUG] 5. 0000000076941000-0000000076aadfff: RAMSTAGE
  1908. [DEBUG] 6. 0000000076aae000-0000000076ffffff: CONFIGURATION TABLES
  1909. [DEBUG] 7. 0000000077000000-00000000803fffff: RESERVED
  1910. [DEBUG] 8. 00000000c0000000-00000000cfffffff: RESERVED
  1911. [DEBUG] 9. 00000000f8000000-00000000f9ffffff: RESERVED
  1912. [DEBUG] 10. 00000000fb000000-00000000fb000fff: RESERVED
  1913. [DEBUG] 11. 00000000fc800000-00000000fe7fffff: RESERVED
  1914. [DEBUG] 12. 00000000feb00000-00000000feb7ffff: RESERVED
  1915. [DEBUG] 13. 00000000fec00000-00000000fecfffff: RESERVED
  1916. [DEBUG] 14. 00000000fed40000-00000000fed6ffff: RESERVED
  1917. [DEBUG] 15. 00000000fed80000-00000000fed87fff: RESERVED
  1918. [DEBUG] 16. 00000000fed90000-00000000fed92fff: RESERVED
  1919. [DEBUG] 17. 00000000feda0000-00000000feda1fff: RESERVED
  1920. [DEBUG] 18. 00000000fedc0000-00000000feddffff: RESERVED
  1921. [DEBUG] 19. 00000000ff000000-00000000ffffffff: RESERVED
  1922. [DEBUG] 20. 0000000100000000-000000047fbfffff: RAM
  1923. [INFO ] Setting up bootsplash in 1920x1080@32
  1924. [WARN ] CBFS: 'bootsplash.jpg' not found.
  1925. [ERROR] Could not find bootsplash.jpg
  1926. [DEBUG] Wrote coreboot table at: 0x768b4000, 0x574 bytes, checksum 3eb9
  1927. [DEBUG] coreboot table: 1420 bytes.
  1928. [DEBUG] IMD ROOT 0. 0x76fff000 0x00001000
  1929. [DEBUG] IMD SMALL 1. 0x76ffe000 0x00001000
  1930. [DEBUG] FSP MEMORY 2. 0x76afe000 0x00500000
  1931. [DEBUG] CONSOLE 3. 0x76abe000 0x00040000
  1932. [DEBUG] RO MCACHE 4. 0x76abd000 0x0000037c
  1933. [DEBUG] TIME STAMP 5. 0x76abc000 0x00000910
  1934. [DEBUG] MEM INFO 6. 0x76abb000 0x00000f48
  1935. [DEBUG] AFTER CAR 7. 0x76aae000 0x0000d000
  1936. [DEBUG] RAMSTAGE 8. 0x76940000 0x0016e000
  1937. [DEBUG] REFCODE 9. 0x768e1000 0x0005f000
  1938. [DEBUG] SMM BACKUP 10. 0x768d1000 0x00010000
  1939. [DEBUG] IGD OPREGION11. 0x768cc000 0x00004203
  1940. [DEBUG] SMM COMBUFFER12. 0x768bc000 0x00010000
  1941. [DEBUG] COREBOOT 13. 0x768b4000 0x00008000
  1942. [DEBUG] ACPI 14. 0x76890000 0x00024000
  1943. [DEBUG] SMBIOS 15. 0x76888000 0x00008000
  1944. [DEBUG] IMD small region:
  1945. [DEBUG] IMD ROOT 0. 0x76ffec00 0x00000400
  1946. [DEBUG] FSP RUNTIME 1. 0x76ffebe0 0x00000004
  1947. [DEBUG] FMAP 2. 0x76ffea00 0x000001dc
  1948. [DEBUG] POWER STATE 3. 0x76ffe9a0 0x00000044
  1949. [DEBUG] FSPM VERSION 4. 0x76ffe980 0x00000004
  1950. [DEBUG] ROMSTAGE 5. 0x76ffe960 0x00000004
  1951. [DEBUG] ROMSTG STCK 6. 0x76ffe8a0 0x000000a8
  1952. [DEBUG] ACPI GNVS 7. 0x76ffe860 0x00000038
  1953. [DEBUG] BS: BS_WRITE_TABLES run times (exec / console): 5 / 483 ms
  1954. [INFO ] LAPIC 0x0 in XAPIC mode.
  1955. [DEBUG] MTRR: Physical address space:
  1956. [DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
  1957. [DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
  1958. [DEBUG] 0x00000000000c0000 - 0x0000000076ffffff size 0x76f40000 type 6
  1959. [DEBUG] 0x0000000077000000 - 0x000000008fffffff size 0x19000000 type 0
  1960. [DEBUG] 0x0000000090000000 - 0x000000009fffffff size 0x10000000 type 1
  1961. [DEBUG] 0x00000000a0000000 - 0x00000000ffffffff size 0x60000000 type 0
  1962. [DEBUG] 0x0000000100000000 - 0x000000047fbfffff size 0x37fc00000 type 6
  1963. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606
  1964. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606
  1965. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000
  1966. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606
  1967. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606
  1968. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606
  1969. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606
  1970. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606
  1971. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606
  1972. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606
  1973. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606
  1974. [SPEW ] apic_id 0x0 call enable_fixed_mtrr()
  1975. [DEBUG] apic_id 0x0 setup mtrr for CPU physical address size: 39 bits
  1976. [DEBUG] MTRR: default type WB/UC MTRR counts: 6/7.
  1977. [DEBUG] MTRR: WB selected as default type.
  1978. [DEBUG] MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
  1979. [DEBUG] MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
  1980. [DEBUG] MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 0
  1981. [DEBUG] MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
  1982. [DEBUG] MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
  1983. [DEBUG] MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
  1984. [INFO ] LAPIC 0x1 in XAPIC mode.
  1985. [INFO ] LAPIC 0x1c in XAPIC mode.
  1986. [INFO ] LAPIC 0x1e in XAPIC mode.
  1987. [INFO ] LAPIC 0x18 in XAPIC mode.
  1988. [INFO ] LAPIC 0x1a in XAPIC mode.
  1989. [DEBUG] apic_id 0x1c: MTRR: Fixed MSR 0x250 0x0606060606060606
  1990. [DEBUG] apic_id 0x1c: MTRR: Fixed MSR 0x258 0x0606060606060606
  1991. [DEBUG] apic_id 0x1c: MTRR: Fixed MSR 0x259 0x0000000000000000
  1992. [DEBUG] apic_id 0x1c: MTRR: Fixed MSR 0x268 0x0606060606060606
  1993. [DEBUG] apic_id 0x1c: MTRR: Fixed MSR 0x269 0x0606060606060606
  1994. [DEBUG] apic_id 0x1c: MTRR: Fixed MSR 0x26a 0x0606060606060606
  1995. [DEBUG] apic_id 0x1c: MTRR: Fixed MSR 0x26b 0x0606060606060606
  1996. [DEBUG] apic_id 0x1c: MTRR: Fixed MSR 0x26c 0x0606060606060606
  1997. [DEBUG] apic_id 0x1c: MTRR: Fixed MSR 0x26d 0x0606060606060606
  1998. [DEBUG] apic_id 0x1c: MTRR: Fixed MSR 0x26e 0x0606060606060606
  1999. [DEBUG] apic_id 0x1c: MTRR: Fixed MSR 0x26f 0x0606060606060606
  2000. [DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x250 0x0606060606060606
  2001. [DEBUG] apic_id 0x1a: MTRR: Fixed MSR 0x250 0x0606060606060606
  2002. [DEBUG] apic_id 0x1a: MTRR: Fixed MSR 0x258 0x0606060606060606
  2003. [DEBUG] apic_id 0x1a: MTRR: Fixed MSR 0x259 0x0000000000000000
  2004. [DEBUG] apic_id 0x1a: MTRR: Fixed MSR 0x268 0x0606060606060606
  2005. [DEBUG] apic_id 0x1a: MTRR: Fixed MSR 0x269 0x0606060606060606
  2006. [DEBUG] apic_id 0x1a: MTRR: Fixed MSR 0x26a 0x0606060606060606
  2007. [DEBUG] apic_id 0x1a: MTRR: Fixed MSR 0x26b 0x0606060606060606
  2008. [DEBUG] apic_id 0x1a: MTRR: Fixed MSR 0x26c 0x0606060606060606
  2009. [DEBUG] apic_id 0x1a: MTRR: Fixed MSR 0x26d 0x0606060606060606
  2010. [DEBUG] apic_id 0x1a: MTRR: Fixed MSR 0x26e 0x0606060606060606
  2011. [DEBUG] apic_id 0x1a: MTRR: Fixed MSR 0x26f 0x0606060606060606
  2012. [SPEW ] apic_id 0x1c call enable_fixed_mtrr()
  2013. [DEBUG] apic_id 0x1e: MTRR: Fixed MSR 0x250 0x0606060606060606
  2014. [DEBUG] apic_id 0x18: MTRR: Fixed MSR 0x250 0x0606060606060606
  2015. [DEBUG] apic_id 0x18: MTRR: Fixed MSR 0x258 0x0606060606060606
  2016. [DEBUG] apic_id 0x18: MTRR: Fixed MSR 0x259 0x0000000000000000
  2017. [DEBUG] apic_id 0x18: MTRR: Fixed MSR 0x268 0x0606060606060606
  2018. [DEBUG] apic_id 0x18: MTRR: Fixed MSR 0x269 0x0606060606060606
  2019. [DEBUG] apic_id 0x18: MTRR: Fixed MSR 0x26a 0x0606060606060606
  2020. [DEBUG] apic_id 0x18: MTRR: Fixed MSR 0x26b 0x0606060606060606
  2021. [DEBUG] apic_id 0x18: MTRR: Fixed MSR 0x26c 0x0606060606060606
  2022. [DEBUG] apic_id 0x18: MTRR: Fixed MSR 0x26d 0x0606060606060606
  2023. [DEBUG] apic_id 0x18: MTRR: Fixed MSR 0x26e 0x0606060606060606
  2024. [DEBUG] apic_id 0x18: MTRR: Fixed MSR 0x26f 0x0606060606060606
  2025. [DEBUG] apic_id 0x1e: MTRR: Fixed MSR 0x258 0x0606060606060606
  2026. [SPEW ] apic_id 0x18 call enable_fixed_mtrr()
  2027. [SPEW ] apic_id 0x1a call enable_fixed_mtrr()
  2028. [DEBUG] apic_id 0x1e: MTRR: Fixed MSR 0x259 0x0000000000000000
  2029. [DEBUG] apic_id 0x1e: MTRR: Fixed MSR 0x268 0x0606060606060606
  2030. [DEBUG] apic_id 0x1e: MTRR: Fixed MSR 0x269 0x0606060606060606
  2031. [DEBUG] apic_id 0x1e: MTRR: Fixed MSR 0x26a 0x0606060606060606
  2032. [DEBUG] apic_id 0x1e: MTRR: Fixed MSR 0x26b 0x0606060606060606
  2033. [DEBUG] apic_id 0x1e: MTRR: Fixed MSR 0x26c 0x0606060606060606
  2034. [DEBUG] apic_id 0x1e: MTRR: Fixed MSR 0x26d 0x0606060606060606
  2035. [DEBUG] apic_id 0x1e: MTRR: Fixed MSR 0x26e 0x0606060606060606
  2036. [DEBUG] apic_id 0x1e: MTRR: Fixed MSR 0x26f 0x0606060606060606
  2037. [DEBUG] apic_id 0x1a setup mtrr for CPU physical address size: 39 bits
  2038. [DEBUG] apic_id 0x1c setup mtrr for CPU physical address size: 39 bits
  2039. [DEBUG] apic_id 0x18 setup mtrr for CPU physical address size: 39 bits
  2040. [SPEW ] apic_id 0x1e call enable_fixed_mtrr()
  2041. [INFO ] LAPIC 0x8 in XAPIC mode.
  2042. [INFO ] LAPIC 0x9 in XAPIC mode.
  2043. [DEBUG] apic_id 0x1e setup mtrr for CPU physical address size: 39 bits
  2044. [DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x258 0x0606060606060606
  2045. [DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x259 0x0000000000000000
  2046. [DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x268 0x0606060606060606
  2047. [DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x269 0x0606060606060606
  2048. [DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x26a 0x0606060606060606
  2049. [DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x26b 0x0606060606060606
  2050. [DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x26c 0x0606060606060606
  2051. [DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x26d 0x0606060606060606
  2052. [DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x26e 0x0606060606060606
  2053. [DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x26f 0x0606060606060606
  2054. [DEBUG] apic_id 0x9: MTRR: Fixed MSR 0x250 0x0606060606060606
  2055. [DEBUG] apic_id 0x8: MTRR: Fixed MSR 0x250 0x0606060606060606
  2056. [DEBUG] apic_id 0x8: MTRR: Fixed MSR 0x258 0x0606060606060606
  2057. [DEBUG] apic_id 0x8: MTRR: Fixed MSR 0x259 0x0000000000000000
  2058. [DEBUG] apic_id 0x8: MTRR: Fixed MSR 0x268 0x0606060606060606
  2059. [DEBUG] apic_id 0x8: MTRR: Fixed MSR 0x269 0x0606060606060606
  2060. [DEBUG] apic_id 0x8: MTRR: Fixed MSR 0x26a 0x0606060606060606
  2061. [DEBUG] apic_id 0x8: MTRR: Fixed MSR 0x26b 0x0606060606060606
  2062. [DEBUG] apic_id 0x8: MTRR: Fixed MSR 0x26c 0x0606060606060606
  2063. [DEBUG] apic_id 0x8: MTRR: Fixed MSR 0x26d 0x0606060606060606
  2064. [DEBUG] apic_id 0x8: MTRR: Fixed MSR 0x26e 0x0606060606060606
  2065. [DEBUG] apic_id 0x8: MTRR: Fixed MSR 0x26f 0x0606060606060606
  2066. [SPEW ] apic_id 0x1 call enable_fixed_mtrr()
  2067. [SPEW ] apic_id 0x8 call enable_fixed_mtrr()
  2068. [DEBUG] apic_id 0x1 setup mtrr for CPU physical address size: 39 bits
  2069. [DEBUG] apic_id 0x8 setup mtrr for CPU physical address size: 39 bits
  2070. [DEBUG] apic_id 0x9: MTRR: Fixed MSR 0x258 0x0606060606060606
  2071. [DEBUG] apic_id 0x9: MTRR: Fixed MSR 0x259 0x0000000000000000
  2072. [DEBUG] apic_id 0x9: MTRR: Fixed MSR 0x268 0x0606060606060606
  2073. [DEBUG] apic_id 0x9: MTRR: Fixed MSR 0x269 0x0606060606060606
  2074. [DEBUG] apic_id 0x9: MTRR: Fixed MSR 0x26a 0x0606060606060606
  2075. [DEBUG] apic_id 0x9: MTRR: Fixed MSR 0x26b 0x0606060606060606
  2076. [DEBUG] apic_id 0x9: MTRR: Fixed MSR 0x26c 0x0606060606060606
  2077. [DEBUG] apic_id 0x9: MTRR: Fixed MSR 0x26d 0x0606060606060606
  2078. [DEBUG] apic_id 0x9: MTRR: Fixed MSR 0x26e 0x0606060606060606
  2079. [DEBUG] apic_id 0x9: MTRR: Fixed MSR 0x26f 0x0606060606060606
  2080. [SPEW ] apic_id 0x9 call enable_fixed_mtrr()
  2081. [DEBUG] apic_id 0x9 setup mtrr for CPU physical address size: 39 bits
  2082. [DEBUG] MTRR: TEMPORARY Physical address space:
  2083. [DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
  2084. [DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
  2085. [DEBUG] 0x00000000000c0000 - 0x0000000076ffffff size 0x76f40000 type 6
  2086. [DEBUG] 0x0000000077000000 - 0x00000000feffffff size 0x88000000 type 0
  2087. [DEBUG] 0x00000000ff000000 - 0x00000000ffffffff size 0x01000000 type 5
  2088. [DEBUG] 0x0000000100000000 - 0x000000047fbfffff size 0x37fc00000 type 6
  2089. [DEBUG] MTRR: default type WB/UC MTRR counts: 10/7.
  2090. [DEBUG] MTRR: UC selected as default type.
  2091. [DEBUG] MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
  2092. [DEBUG] MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
  2093. [DEBUG] MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
  2094. [DEBUG] MTRR: 3 base 0x00000000ff000000 mask 0x0000007fff000000 type 5
  2095. [DEBUG] MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
  2096. [DEBUG] MTRR: 5 base 0x0000000200000000 mask 0x0000007e00000000 type 6
  2097. [DEBUG] MTRR: 6 base 0x0000000400000000 mask 0x0000007f80000000 type 6
  2098.  
  2099. [DEBUG] MTRR check
  2100. [DEBUG] Fixed MTRRs : Enabled
  2101. [DEBUG] Variable MTRRs: Enabled
  2102.  
  2103. [INFO ] POST: 0x93
  2104. [DEBUG] BS: BS_WRITE_TABLES exit times (exec / console): 423 / 306 ms
  2105. [INFO ] POST: 0x7a
  2106. [INFO ] CBFS: Found 'fallback/payload' @0x1d4640 size 0x17ea91 in mcache @0x76abd30c
  2107. [DEBUG] Checking segment from ROM address 0xffc2486c
  2108. [DEBUG] Checking segment from ROM address 0xffc24888
  2109. [DEBUG] Loading segment from ROM address 0xffc2486c
  2110. [DEBUG] code (compression=1)
  2111. [DEBUG] New segment dstaddr 0x00800000 memsize 0x1000000 srcaddr 0xffc248a4 filesize 0x17ea59
  2112. [DEBUG] Loading Segment: addr: 0x00800000 memsz: 0x0000000001000000 filesz: 0x000000000017ea59
  2113. [DEBUG] using LZMA
  2114. [SPEW ] [ 0x00800000, 01800000, 0x01800000) <- ffc248a4
  2115. [DEBUG] Loading segment from ROM address 0xffc24888
  2116. [DEBUG] Entry Point 0x008035e9
  2117. [SPEW ] Loaded segments
  2118. [DEBUG] BS: BS_PAYLOAD_LOAD run times (exec / console): 307 / 68 ms
  2119. [INFO ] coreboot skipped calling FSP notify phase: 00000040.
  2120. [INFO ] coreboot skipped calling FSP notify phase: 000000f0.
  2121. [DEBUG] BS: BS_PAYLOAD_LOAD exit times (exec / console): 0 / 12 ms
  2122. [DEBUG] Finalizing chipset.
  2123. [DEBUG] apm_control: Finalizing SMM.
  2124. [DEBUG] APMC done.
  2125. [INFO ] POST: 0xfe
  2126. [INFO ] HECI: Sending End-of-Post
  2127. [INFO ] CSE: EOP requested action: continue boot
  2128. [WARN ] HECI: CSE device 16.1 is disabled
  2129. [WARN ] HECI: CSE device 16.2 is disabled
  2130. [WARN ] HECI: CSE device 16.3 is disabled
  2131. [WARN ] HECI: CSE device 16.4 is disabled
  2132. [WARN ] HECI: CSE device 16.5 is disabled
  2133. [DEBUG] BS: BS_PAYLOAD_BOOT entry times (exec / console): 3 / 44 ms
  2134. [INFO ] POST: 0x7b
  2135. [DEBUG] mp_park_aps done after 0 msecs.
  2136. [DEBUG] Jumping to boot code at 0x008035e9(0x768b4000)
  2137. [INFO ] POST: 0xf8
  2138. [SPEW ] CPU0: stack: 0x769918c0 - 0x769938c0, lowest used address 0x7699332c, stack used: 1428 bytes
Tags: coreboot lan
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