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  1. // SPDX-License-Identifier: BSD-3-Clause
  2. /*
  3. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. * Copyright (c) 2024, Xilin Wu <[email protected]>
  5. */
  6.  
  7. /dts-v1/;
  8.  
  9. #include <dt-bindings/gpio/gpio.h>
  10. #include <dt-bindings/input/gpio-keys.h>
  11. #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
  12. #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
  13.  
  14. #include "x1e80100.dtsi"
  15. #include "x1e80100-pmics.dtsi"
  16.  
  17. / {
  18. model = "ASUS Vivobook S 15";
  19. compatible = "asus,vivobook-s15", "qcom,x1e80100";
  20. chassis-type = "laptop";
  21.  
  22. aliases {
  23. serial1 = &uart14;
  24. };
  25.  
  26. gpio-keys {
  27. compatible = "gpio-keys";
  28. pinctrl-0 = <&hall_int_n_default>;
  29. pinctrl-names = "default";
  30.  
  31. switch-lid {
  32. gpios = <&tlmm 92 GPIO_ACTIVE_LOW>;
  33. linux,input-type = <EV_SW>;
  34. linux,code = <SW_LID>;
  35. wakeup-source;
  36. wakeup-event-action = <EV_ACT_DEASSERTED>;
  37. };
  38. };
  39.  
  40. pmic-glink {
  41. compatible = "qcom,x1e80100-pmic-glink",
  42. "qcom,sm8550-pmic-glink",
  43. "qcom,pmic-glink";
  44. orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>,
  45. <&tlmm 123 GPIO_ACTIVE_HIGH>;
  46. #address-cells = <1>;
  47. #size-cells = <0>;
  48.  
  49. /* Left-side port, closer to the screen */
  50. connector@0 {
  51. compatible = "usb-c-connector";
  52. reg = <0>;
  53. power-role = "dual";
  54. data-role = "dual";
  55.  
  56. ports {
  57. #address-cells = <1>;
  58. #size-cells = <0>;
  59.  
  60. port@0 {
  61. reg = <0>;
  62.  
  63. pmic_glink_ss0_hs_in: endpoint {
  64. remote-endpoint = <&usb_1_ss0_dwc3_hs>;
  65. };
  66. };
  67.  
  68. port@1 {
  69. reg = <1>;
  70.  
  71. pmic_glink_ss0_ss_in: endpoint {
  72. remote-endpoint = <&usb_1_ss0_qmpphy_out>;
  73. };
  74. };
  75. };
  76. };
  77.  
  78. /* Left-side port, farther from the screen */
  79. connector@1 {
  80. compatible = "usb-c-connector";
  81. reg = <1>;
  82. power-role = "dual";
  83. data-role = "dual";
  84.  
  85. ports {
  86. #address-cells = <1>;
  87. #size-cells = <0>;
  88.  
  89. port@0 {
  90. reg = <0>;
  91.  
  92. pmic_glink_ss1_hs_in: endpoint {
  93. remote-endpoint = <&usb_1_ss1_dwc3_hs>;
  94. };
  95. };
  96.  
  97. port@1 {
  98. reg = <1>;
  99.  
  100. pmic_glink_ss1_ss_in: endpoint {
  101. remote-endpoint = <&usb_1_ss1_qmpphy_out>;
  102. };
  103. };
  104. };
  105. };
  106. };
  107.  
  108. reserved-memory {
  109. linux,cma {
  110. compatible = "shared-dma-pool";
  111. size = <0x0 0x8000000>;
  112. reusable;
  113. linux,cma-default;
  114. };
  115. };
  116.  
  117. vreg_edp_3p3: regulator-edp-3p3 {
  118. compatible = "regulator-fixed";
  119.  
  120. regulator-name = "VREG_EDP_3P3";
  121. regulator-min-microvolt = <3300000>;
  122. regulator-max-microvolt = <3300000>;
  123.  
  124. gpio = <&tlmm 70 GPIO_ACTIVE_HIGH>;
  125. enable-active-high;
  126.  
  127. pinctrl-0 = <&edp_reg_en>;
  128. pinctrl-names = "default";
  129.  
  130. regulator-always-on;
  131. regulator-boot-on;
  132. };
  133.  
  134. vreg_nvme: regulator-nvme {
  135. compatible = "regulator-fixed";
  136.  
  137. regulator-name = "VREG_NVME_3P3";
  138. regulator-min-microvolt = <3300000>;
  139. regulator-max-microvolt = <3300000>;
  140.  
  141. gpio = <&tlmm 18 GPIO_ACTIVE_HIGH>;
  142. enable-active-high;
  143.  
  144. pinctrl-0 = <&nvme_reg_en>;
  145. pinctrl-names = "default";
  146.  
  147. regulator-boot-on;
  148. };
  149.  
  150. vph_pwr: regulator-vph-pwr {
  151. compatible = "regulator-fixed";
  152.  
  153. regulator-name = "vph_pwr";
  154. regulator-min-microvolt = <3700000>;
  155. regulator-max-microvolt = <3700000>;
  156.  
  157. regulator-always-on;
  158. regulator-boot-on;
  159. };
  160.  
  161. vreg_wcn_0p95: regulator-wcn-0p95 {
  162. compatible = "regulator-fixed";
  163.  
  164. regulator-name = "VREG_WCN_0P95";
  165. regulator-min-microvolt = <950000>;
  166. regulator-max-microvolt = <950000>;
  167.  
  168. vin-supply = <&vreg_wcn_3p3>;
  169. };
  170.  
  171. vreg_wcn_1p9: regulator-wcn-1p9 {
  172. compatible = "regulator-fixed";
  173.  
  174. regulator-name = "VREG_WCN_1P9";
  175. regulator-min-microvolt = <1900000>;
  176. regulator-max-microvolt = <1900000>;
  177.  
  178. vin-supply = <&vreg_wcn_3p3>;
  179. };
  180.  
  181. vreg_wcn_3p3: regulator-wcn-3p3 {
  182. compatible = "regulator-fixed";
  183.  
  184. regulator-name = "VREG_WCN_3P3";
  185. regulator-min-microvolt = <3300000>;
  186. regulator-max-microvolt = <3300000>;
  187.  
  188. gpio = <&tlmm 214 GPIO_ACTIVE_HIGH>;
  189. enable-active-high;
  190.  
  191. pinctrl-0 = <&wcn_sw_en>;
  192. pinctrl-names = "default";
  193.  
  194. regulator-boot-on;
  195. };
  196.  
  197. wcn7850-pmu {
  198. compatible = "qcom,wcn7850-pmu";
  199.  
  200. vdd-supply = <&vreg_wcn_0p95>;
  201. vddio-supply = <&vreg_l15b_1p8>;
  202. vddaon-supply = <&vreg_wcn_0p95>;
  203. vdddig-supply = <&vreg_wcn_0p95>;
  204. vddrfa1p2-supply = <&vreg_wcn_1p9>;
  205. vddrfa1p8-supply = <&vreg_wcn_1p9>;
  206.  
  207. wlan-enable-gpios = <&tlmm 117 GPIO_ACTIVE_HIGH>;
  208. bt-enable-gpios = <&tlmm 116 GPIO_ACTIVE_HIGH>;
  209.  
  210. pinctrl-0 = <&wcn_wlan_en>, <&wcn_bt_en>;
  211. pinctrl-names = "default";
  212.  
  213. regulators {
  214. vreg_pmu_rfa_cmn: ldo0 {
  215. regulator-name = "vreg_pmu_rfa_cmn";
  216. };
  217.  
  218. vreg_pmu_aon_0p59: ldo1 {
  219. regulator-name = "vreg_pmu_aon_0p59";
  220. };
  221.  
  222. vreg_pmu_wlcx_0p8: ldo2 {
  223. regulator-name = "vreg_pmu_wlcx_0p8";
  224. };
  225.  
  226. vreg_pmu_wlmx_0p85: ldo3 {
  227. regulator-name = "vreg_pmu_wlmx_0p85";
  228. };
  229.  
  230. vreg_pmu_btcmx_0p85: ldo4 {
  231. regulator-name = "vreg_pmu_btcmx_0p85";
  232. };
  233.  
  234. vreg_pmu_rfa_0p8: ldo5 {
  235. regulator-name = "vreg_pmu_rfa_0p8";
  236. };
  237.  
  238. vreg_pmu_rfa_1p2: ldo6 {
  239. regulator-name = "vreg_pmu_rfa_1p2";
  240. };
  241.  
  242. vreg_pmu_rfa_1p8: ldo7 {
  243. regulator-name = "vreg_pmu_rfa_1p8";
  244. };
  245.  
  246. vreg_pmu_pcie_0p9: ldo8 {
  247. regulator-name = "vreg_pmu_pcie_0p9";
  248. };
  249.  
  250. vreg_pmu_pcie_1p8: ldo9 {
  251. regulator-name = "vreg_pmu_pcie_1p8";
  252. };
  253. };
  254. };
  255. };
  256.  
  257. &apps_rsc {
  258. regulators-0 {
  259. compatible = "qcom,pm8550-rpmh-regulators";
  260. qcom,pmic-id = "b";
  261.  
  262. vdd-bob1-supply = <&vph_pwr>;
  263. vdd-bob2-supply = <&vph_pwr>;
  264. vdd-l1-l4-l10-supply = <&vreg_s4c_1p8>;
  265. vdd-l2-l13-l14-supply = <&vreg_bob1>;
  266. vdd-l5-l16-supply = <&vreg_bob1>;
  267. vdd-l6-l7-supply = <&vreg_bob2>;
  268. vdd-l8-l9-supply = <&vreg_bob1>;
  269. vdd-l12-supply = <&vreg_s5j_1p2>;
  270. vdd-l15-supply = <&vreg_s4c_1p8>;
  271. vdd-l17-supply = <&vreg_bob2>;
  272.  
  273. vreg_bob1: bob1 {
  274. regulator-name = "vreg_bob1";
  275. regulator-min-microvolt = <3008000>;
  276. regulator-max-microvolt = <3960000>;
  277. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  278. };
  279.  
  280. vreg_bob2: bob2 {
  281. regulator-name = "vreg_bob2";
  282. regulator-min-microvolt = <2504000>;
  283. regulator-max-microvolt = <3008000>;
  284. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  285. };
  286.  
  287. vreg_l2b_3p0: ldo2 {
  288. regulator-name = "vreg_l2b_3p0";
  289. regulator-min-microvolt = <3072000>;
  290. regulator-max-microvolt = <3100000>;
  291. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  292. };
  293.  
  294. vreg_l4b_1p8: ldo4 {
  295. regulator-name = "vreg_l4b_1p8";
  296. regulator-min-microvolt = <1800000>;
  297. regulator-max-microvolt = <1800000>;
  298. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  299. };
  300.  
  301. vreg_l13b_3p0: ldo13 {
  302. regulator-name = "vreg_l13b_3p0";
  303. regulator-min-microvolt = <3072000>;
  304. regulator-max-microvolt = <3072000>;
  305. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  306. };
  307.  
  308. vreg_l14b_3p0: ldo14 {
  309. regulator-name = "vreg_l14b_3p0";
  310. regulator-min-microvolt = <3072000>;
  311. regulator-max-microvolt = <3072000>;
  312. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  313. };
  314.  
  315. vreg_l15b_1p8: ldo15 {
  316. regulator-name = "vreg_l15b_1p8";
  317. regulator-min-microvolt = <1800000>;
  318. regulator-max-microvolt = <1800000>;
  319. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  320. };
  321. };
  322.  
  323. regulators-1 {
  324. compatible = "qcom,pm8550ve-rpmh-regulators";
  325. qcom,pmic-id = "c";
  326.  
  327. vdd-l1-supply = <&vreg_s5j_1p2>;
  328. vdd-l2-supply = <&vreg_s1f_0p7>;
  329. vdd-l3-supply = <&vreg_s1f_0p7>;
  330. vdd-s4-supply = <&vph_pwr>;
  331.  
  332. vreg_s4c_1p8: smps4 {
  333. regulator-name = "vreg_s4c_1p8";
  334. regulator-min-microvolt = <1856000>;
  335. regulator-max-microvolt = <2000000>;
  336. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  337. };
  338.  
  339. vreg_l3c_0p8: ldo3 {
  340. regulator-name = "vreg_l3c_0p8";
  341. regulator-min-microvolt = <912000>;
  342. regulator-max-microvolt = <912000>;
  343. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  344. };
  345. };
  346.  
  347. regulators-2 {
  348. compatible = "qcom,pmc8380-rpmh-regulators";
  349. qcom,pmic-id = "d";
  350.  
  351. vdd-l1-supply = <&vreg_s1f_0p7>;
  352. vdd-l2-supply = <&vreg_s1f_0p7>;
  353. vdd-l3-supply = <&vreg_s4c_1p8>;
  354. vdd-s1-supply = <&vph_pwr>;
  355.  
  356. vreg_l1d_0p8: ldo1 {
  357. regulator-name = "vreg_l1d_0p8";
  358. regulator-min-microvolt = <880000>;
  359. regulator-max-microvolt = <920000>;
  360. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  361. };
  362.  
  363. vreg_l2d_0p9: ldo2 {
  364. regulator-name = "vreg_l2d_0p9";
  365. regulator-min-microvolt = <912000>;
  366. regulator-max-microvolt = <920000>;
  367. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  368. };
  369.  
  370. vreg_l3d_1p8: ldo3 {
  371. regulator-name = "vreg_l3d_1p8";
  372. regulator-min-microvolt = <1800000>;
  373. regulator-max-microvolt = <1800000>;
  374. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  375. };
  376. };
  377.  
  378. regulators-3 {
  379. compatible = "qcom,pmc8380-rpmh-regulators";
  380. qcom,pmic-id = "e";
  381.  
  382. vdd-l2-supply = <&vreg_s1f_0p7>;
  383. vdd-l3-supply = <&vreg_s5j_1p2>;
  384.  
  385. vreg_l2e_0p8: ldo2 {
  386. regulator-name = "vreg_l2e_0p8";
  387. regulator-min-microvolt = <880000>;
  388. regulator-max-microvolt = <920000>;
  389. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  390. };
  391.  
  392. vreg_l3e_1p2: ldo3 {
  393. regulator-name = "vreg_l3e_1p2";
  394. regulator-min-microvolt = <1200000>;
  395. regulator-max-microvolt = <1200000>;
  396. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  397. };
  398. };
  399.  
  400. regulators-4 {
  401. compatible = "qcom,pmc8380-rpmh-regulators";
  402. qcom,pmic-id = "f";
  403.  
  404. vdd-l1-supply = <&vreg_s5j_1p2>;
  405. vdd-l2-supply = <&vreg_s5j_1p2>;
  406. vdd-l3-supply = <&vreg_s5j_1p2>;
  407. vdd-s1-supply = <&vph_pwr>;
  408.  
  409. vreg_s1f_0p7: smps1 {
  410. regulator-name = "vreg_s1f_0p7";
  411. regulator-min-microvolt = <700000>;
  412. regulator-max-microvolt = <1100000>;
  413. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  414. };
  415. };
  416.  
  417. regulators-6 {
  418. compatible = "qcom,pm8550ve-rpmh-regulators";
  419. qcom,pmic-id = "i";
  420.  
  421. vdd-l1-supply = <&vreg_s4c_1p8>;
  422. vdd-l2-supply = <&vreg_s5j_1p2>;
  423. vdd-l3-supply = <&vreg_s1f_0p7>;
  424. vdd-s1-supply = <&vph_pwr>;
  425. vdd-s2-supply = <&vph_pwr>;
  426.  
  427. vreg_l3i_0p8: ldo3 {
  428. regulator-name = "vreg_l3i_0p8";
  429. regulator-min-microvolt = <880000>;
  430. regulator-max-microvolt = <920000>;
  431. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  432. };
  433. };
  434.  
  435. regulators-7 {
  436. compatible = "qcom,pm8550ve-rpmh-regulators";
  437. qcom,pmic-id = "j";
  438.  
  439. vdd-l1-supply = <&vreg_s1f_0p7>;
  440. vdd-l2-supply = <&vreg_s5j_1p2>;
  441. vdd-l3-supply = <&vreg_s1f_0p7>;
  442. vdd-s5-supply = <&vph_pwr>;
  443.  
  444. vreg_s5j_1p2: smps5 {
  445. regulator-name = "vreg_s5j_1p2";
  446. regulator-min-microvolt = <1256000>;
  447. regulator-max-microvolt = <1304000>;
  448. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  449. };
  450.  
  451. vreg_l1j_0p8: ldo1 {
  452. regulator-name = "vreg_l1j_0p8";
  453. regulator-min-microvolt = <880000>;
  454. regulator-max-microvolt = <920000>;
  455. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  456. };
  457.  
  458. vreg_l2j_1p2: ldo2 {
  459. regulator-name = "vreg_l2j_1p2";
  460. regulator-min-microvolt = <1200000>;
  461. regulator-max-microvolt = <1200000>;
  462. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  463. };
  464.  
  465. vreg_l3j_0p8: ldo3 {
  466. regulator-name = "vreg_l3j_0p8";
  467. regulator-min-microvolt = <880000>;
  468. regulator-max-microvolt = <920000>;
  469. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  470. };
  471. };
  472. };
  473.  
  474. &gpu {
  475. status = "okay";
  476.  
  477. zap-shader {
  478. firmware-name = "qcom/x1e80100/ASUSTeK/vivobook-s15/qcdxkmsuc8380.mbn";
  479. };
  480. };
  481.  
  482. &i2c0 {
  483. clock-frequency = <400000>;
  484. status = "okay";
  485.  
  486. touchpad@15 {
  487. compatible = "hid-over-i2c";
  488. reg = <0x15>;
  489.  
  490. hid-descr-addr = <0x1>;
  491. interrupts-extended = <&tlmm 3 IRQ_TYPE_LEVEL_LOW>;
  492.  
  493. pinctrl-0 = <&tpad_default>;
  494. pinctrl-names = "default";
  495.  
  496. wakeup-source;
  497. };
  498. };
  499.  
  500. &i2c1 {
  501. clock-frequency = <400000>;
  502. status = "okay";
  503.  
  504. /* PS8830 USB4 Retimer? @ 0x8 */
  505. };
  506.  
  507. &i2c3 {
  508. clock-frequency = <400000>;
  509. status = "okay";
  510.  
  511. /* PS8830 USB4 Retimer? @ 0x8 */
  512. };
  513.  
  514. &i2c5 {
  515. clock-frequency = <400000>;
  516. status = "okay";
  517.  
  518. keyboard@3a {
  519. compatible = "hid-over-i2c";
  520. reg = <0x3a>;
  521.  
  522. hid-descr-addr = <0x1>;
  523. interrupts-extended = <&tlmm 67 IRQ_TYPE_LEVEL_LOW>;
  524.  
  525. pinctrl-0 = <&kybd_default>;
  526. pinctrl-names = "default";
  527.  
  528. wakeup-source;
  529. };
  530.  
  531. eusb3_repeater: redriver@47 {
  532. compatible = "nxp,ptn3222";
  533. reg = <0x47>;
  534. #phy-cells = <0>;
  535.  
  536. vdd3v3-supply = <&vreg_l13b_3p0>;
  537. vdd1v8-supply = <&vreg_l4b_1p8>;
  538.  
  539. reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
  540.  
  541. pinctrl-0 = <&eusb3_reset_n>;
  542. pinctrl-names = "default";
  543. };
  544.  
  545. eusb6_repeater: redriver@4f {
  546. compatible = "nxp,ptn3222";
  547. reg = <0x4f>;
  548. #phy-cells = <0>;
  549.  
  550. vdd3v3-supply = <&vreg_l13b_3p0>;
  551. vdd1v8-supply = <&vreg_l4b_1p8>;
  552.  
  553. reset-gpios = <&tlmm 184 GPIO_ACTIVE_LOW>;
  554.  
  555. pinctrl-0 = <&eusb6_reset_n>;
  556. pinctrl-names = "default";
  557. };
  558.  
  559. /* EC @ 0x76 */
  560. };
  561.  
  562. &i2c7 {
  563. clock-frequency = <400000>;
  564. status = "okay";
  565.  
  566. /* PS8830 USB4 Retimer? @ 0x8 */
  567. };
  568.  
  569. &mdss {
  570. status = "okay";
  571. };
  572.  
  573. &mdss_dp3 {
  574. compatible = "qcom,x1e80100-dp";
  575. /delete-property/ #sound-dai-cells;
  576.  
  577. status = "okay";
  578.  
  579. aux-bus {
  580. panel {
  581. compatible = "samsung,atna56ac03", "samsung,atna33xc20";
  582. enable-gpios = <&pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH>;
  583. power-supply = <&vreg_edp_3p3>;
  584.  
  585. pinctrl-0 = <&edp_bl_en>;
  586. pinctrl-names = "default";
  587.  
  588. port {
  589. edp_panel_in: endpoint {
  590. remote-endpoint = <&mdss_dp3_out>;
  591. };
  592. };
  593. };
  594. };
  595.  
  596. ports {
  597. port@1 {
  598. reg = <1>;
  599.  
  600. mdss_dp3_out: endpoint {
  601. data-lanes = <0 1 2 3>;
  602. link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
  603.  
  604. remote-endpoint = <&edp_panel_in>;
  605. };
  606. };
  607. };
  608. };
  609.  
  610. &mdss_dp3_phy {
  611. vdda-phy-supply = <&vreg_l3j_0p8>;
  612. vdda-pll-supply = <&vreg_l2j_1p2>;
  613.  
  614. status = "okay";
  615. };
  616.  
  617. &pcie4 {
  618. perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
  619. wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
  620.  
  621. pinctrl-0 = <&pcie4_default>;
  622. pinctrl-names = "default";
  623.  
  624. status = "okay";
  625. };
  626.  
  627. &pcie4_phy {
  628. vdda-phy-supply = <&vreg_l3i_0p8>;
  629. vdda-pll-supply = <&vreg_l3e_1p2>;
  630.  
  631. status = "okay";
  632. };
  633.  
  634. &pcie4_port0 {
  635. wifi@0 {
  636. compatible = "pci17cb,1107";
  637. reg = <0x10000 0x0 0x0 0x0 0x0>;
  638.  
  639. vddaon-supply = <&vreg_pmu_aon_0p59>;
  640. vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
  641. vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
  642. vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
  643. vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
  644. vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
  645. vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
  646. vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>;
  647. vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>;
  648. };
  649. };
  650.  
  651. &pcie6a {
  652. perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
  653. wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
  654.  
  655. vddpe-3v3-supply = <&vreg_nvme>;
  656.  
  657. pinctrl-0 = <&pcie6a_default>;
  658. pinctrl-names = "default";
  659.  
  660. status = "okay";
  661. };
  662.  
  663. &pcie6a_phy {
  664. vdda-phy-supply = <&vreg_l1d_0p8>;
  665. vdda-pll-supply = <&vreg_l2j_1p2>;
  666.  
  667. status = "okay";
  668. };
  669.  
  670. &pmc8380_3_gpios {
  671. edp_bl_en: edp-bl-en-state {
  672. pins = "gpio4";
  673. function = "normal";
  674. power-source = <1>; /* 1.8 V */
  675. qcom,drive-strength = <PMIC_GPIO_STRENGTH_MED>;
  676. bias-pull-down;
  677. input-disable;
  678. output-enable;
  679. };
  680. };
  681.  
  682. &qupv3_0 {
  683. status = "okay";
  684. };
  685.  
  686. &qupv3_1 {
  687. status = "okay";
  688. };
  689.  
  690. &qupv3_2 {
  691. status = "okay";
  692. };
  693.  
  694. &remoteproc_adsp {
  695. firmware-name = "qcom/x1e80100/ASUSTeK/vivobook-s15/qcadsp8380.mbn",
  696. "qcom/x1e80100/ASUSTeK/vivobook-s15/adsp_dtbs.elf";
  697.  
  698. status = "okay";
  699. };
  700.  
  701. &remoteproc_cdsp {
  702. firmware-name = "qcom/x1e80100/ASUSTeK/vivobook-s15/qccdsp8380.mbn",
  703. "qcom/x1e80100/ASUSTeK/vivobook-s15/cdsp_dtbs.elf";
  704.  
  705. status = "okay";
  706. };
  707.  
  708. &smb2360_0_eusb2_repeater {
  709. vdd18-supply = <&vreg_l3d_1p8>;
  710. vdd3-supply = <&vreg_l2b_3p0>;
  711. };
  712.  
  713. &smb2360_1_eusb2_repeater {
  714. vdd18-supply = <&vreg_l3d_1p8>;
  715. vdd3-supply = <&vreg_l14b_3p0>;
  716. };
  717.  
  718. &tlmm {
  719. gpio-reserved-ranges = <34 2>, /* Unused */
  720. <44 4>, /* SPI (TPM) */
  721. <238 1>; /* UFS Reset */
  722.  
  723. edp_reg_en: edp-reg-en-state {
  724. pins = "gpio70";
  725. function = "gpio";
  726. drive-strength = <16>;
  727. bias-disable;
  728. };
  729.  
  730. eusb3_reset_n: eusb3-reset-n-state {
  731. pins = "gpio6";
  732. function = "gpio";
  733. drive-strength = <2>;
  734. bias-disable;
  735. output-low;
  736. };
  737.  
  738. eusb6_reset_n: eusb6-reset-n-state {
  739. pins = "gpio184";
  740. function = "gpio";
  741. drive-strength = <2>;
  742. bias-disable;
  743. output-low;
  744. };
  745.  
  746. hall_int_n_default: hall-int-n-state {
  747. pins = "gpio92";
  748. function = "gpio";
  749. bias-disable;
  750. };
  751.  
  752. kybd_default: kybd-default-state {
  753. pins = "gpio67";
  754. function = "gpio";
  755. bias-disable;
  756. };
  757.  
  758. nvme_reg_en: nvme-reg-en-state {
  759. pins = "gpio18";
  760. function = "gpio";
  761. drive-strength = <2>;
  762. bias-disable;
  763. };
  764.  
  765. pcie4_default: pcie4-default-state {
  766. clkreq-n-pins {
  767. pins = "gpio147";
  768. function = "pcie4_clk";
  769. drive-strength = <2>;
  770. bias-pull-up;
  771. };
  772.  
  773. perst-n-pins {
  774. pins = "gpio146";
  775. function = "gpio";
  776. drive-strength = <2>;
  777. bias-disable;
  778. };
  779.  
  780. wake-n-pins {
  781. pins = "gpio148";
  782. function = "gpio";
  783. drive-strength = <2>;
  784. bias-pull-up;
  785. };
  786. };
  787.  
  788. pcie6a_default: pcie6a-default-state {
  789. clkreq-n-pins {
  790. pins = "gpio153";
  791. function = "pcie6a_clk";
  792. drive-strength = <2>;
  793. bias-pull-up;
  794. };
  795.  
  796. perst-n-pins {
  797. pins = "gpio152";
  798. function = "gpio";
  799. drive-strength = <2>;
  800. bias-disable;
  801. };
  802.  
  803. wake-n-pins {
  804. pins = "gpio154";
  805. function = "gpio";
  806. drive-strength = <2>;
  807. bias-pull-up;
  808. };
  809. };
  810.  
  811. tpad_default: tpad-default-state {
  812. pins = "gpio3";
  813. function = "gpio";
  814. bias-disable;
  815. };
  816.  
  817. wcn_bt_en: wcn-bt-en-state {
  818. pins = "gpio116";
  819. function = "gpio";
  820. drive-strength = <16>;
  821. bias-pull-down;
  822. };
  823.  
  824. wcn_sw_en: wcn-sw-en-state {
  825. pins = "gpio214";
  826. function = "gpio";
  827. drive-strength = <16>;
  828. bias-disable;
  829. };
  830.  
  831. wcn_wlan_en: wcn-wlan-en-state {
  832. pins = "gpio117";
  833. function = "gpio";
  834. drive-strength = <16>;
  835. bias-disable;
  836. };
  837. };
  838.  
  839. &uart14 {
  840. status = "okay";
  841.  
  842. bluetooth {
  843. compatible = "qcom,wcn7850-bt";
  844. max-speed = <3200000>;
  845.  
  846. vddaon-supply = <&vreg_pmu_aon_0p59>;
  847. vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
  848. vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
  849. vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
  850. vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
  851. vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
  852. vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
  853. };
  854. };
  855.  
  856. &usb_1_ss0_hsphy {
  857. vdd-supply = <&vreg_l3j_0p8>;
  858. vdda12-supply = <&vreg_l2j_1p2>;
  859.  
  860. phys = <&smb2360_0_eusb2_repeater>;
  861.  
  862. status = "okay";
  863. };
  864.  
  865. &usb_1_ss0_qmpphy {
  866. vdda-phy-supply = <&vreg_l3e_1p2>;
  867. vdda-pll-supply = <&vreg_l1j_0p8>;
  868.  
  869. status = "okay";
  870. };
  871.  
  872. &usb_1_ss0 {
  873. status = "okay";
  874. };
  875.  
  876. &usb_1_ss0_dwc3 {
  877. dr_mode = "host";
  878. };
  879.  
  880. &usb_1_ss0_dwc3_hs {
  881. remote-endpoint = <&pmic_glink_ss0_hs_in>;
  882. };
  883.  
  884. &usb_1_ss0_qmpphy_out {
  885. remote-endpoint = <&pmic_glink_ss0_ss_in>;
  886. };
  887.  
  888. &usb_1_ss1_hsphy {
  889. vdd-supply = <&vreg_l3j_0p8>;
  890. vdda12-supply = <&vreg_l2j_1p2>;
  891.  
  892. phys = <&smb2360_1_eusb2_repeater>;
  893.  
  894. status = "okay";
  895. };
  896.  
  897. &usb_1_ss1_qmpphy {
  898. vdda-phy-supply = <&vreg_l3e_1p2>;
  899. vdda-pll-supply = <&vreg_l2d_0p9>;
  900.  
  901. status = "okay";
  902. };
  903.  
  904. &usb_1_ss1 {
  905. status = "okay";
  906. };
  907.  
  908. &usb_1_ss1_dwc3 {
  909. dr_mode = "host";
  910. };
  911.  
  912. &usb_1_ss1_dwc3_hs {
  913. remote-endpoint = <&pmic_glink_ss1_hs_in>;
  914. };
  915.  
  916. &usb_1_ss1_qmpphy_out {
  917. remote-endpoint = <&pmic_glink_ss1_ss_in>;
  918. };
  919.  
  920. &usb_mp {
  921. status = "okay";
  922. };
  923.  
  924. &usb_mp_hsphy0 {
  925. vdd-supply = <&vreg_l2e_0p8>;
  926. vdda12-supply = <&vreg_l3e_1p2>;
  927.  
  928. phy = <&eusb6_repeater>;
  929.  
  930. status = "okay";
  931. };
  932.  
  933. &usb_mp_hsphy1 {
  934. vdd-supply = <&vreg_l2e_0p8>;
  935. vdda12-supply = <&vreg_l3e_1p2>;
  936.  
  937. phy = <&eusb3_repeater>;
  938.  
  939. status = "okay";
  940. };
  941.  
  942. &usb_mp_qmpphy0 {
  943. vdda-phy-supply = <&vreg_l3e_1p2>;
  944. vdda-pll-supply = <&vreg_l3c_0p8>;
  945.  
  946. status = "okay";
  947. };
  948.  
  949. &usb_mp_qmpphy1 {
  950. vdda-phy-supply = <&vreg_l3e_1p2>;
  951. vdda-pll-supply = <&vreg_l3c_0p8>;
  952.  
  953. status = "okay";
  954. };
  955.  
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