vim3 4.9_arm64_EMMC_V20190813 minihd

G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:F;RCY:0;EMMC:0;READ:0;0.
bl2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0000 - pwm id 0x01
bl2_stage_init 0xc1
bl2_stage_init 0x02

L0:00000000
L1:20000703
L2:00008067
L3:14000000
B2:00402000
B1:e0f83180

TE: 119181

BL2 Built : 19:22:01, Jul 31 2019. g12b ge9a9000 - zhiguang.ouyang@droid07-sz

Board ID = 6
Set A53 clk to 24M
Set A73 clk to 24M
Set clk81 to 24M
A53 clk: 1200 MHz
A73 clk: 1200 MHz
CLK81: 166.6M
smccc: 00021b78
eMMC boot @ 0
sw8 s
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Jul 31 2019 19:21:56
board id: 6
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
fw parse done
Load ddrfw from eMMC, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0
Load ddrfw from eMMC, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0
PIEI prepare done
fastboot data load
00000000
emmc switch 1 ok
ddr saved addr:00016000
Load ddr parameter from eMMC, src: 0x02c00000, des: 0xfffd0000, size: 0x00001000, part: 0
00000000
emmc switch 0 ok
fastboot data verify
verify result: 265
Cfg max: 4, cur: 1. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 1608MHz
Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part: 0

dmc_version 0001
Check phy result
INFO : ERROR : Training has failed!
1D training failed
Cfg max: 4, cur: 2. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 1608MHz
Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part: 0

dmc_version 0001
Check phy result
INFO : End of CA training
INFO : End of initialization
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : End of Write leveling coarse delay
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read dq deskew training
INFO : End of MPR read delay center optimization
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency training
INFO : Training has run successfully!
1D training succeed
Load ddrfw from eMMC, src: 0x00048200, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : Training has run successfully!

channel==0
RxClkDly_Margin_A0==77 ps 8
TxDqDly_Margin_A0==126 ps 13
RxClkDly_Margin_A1==0 ps 0
TxDqDly_Margin_A1==0 ps 0
TrainedVREFDQ_A0==74
TrainedVREFDQ_A1==0
VrefDac_Margin_A0==29
DeviceVref_Margin_A0==40
VrefDac_Margin_A1==0
DeviceVref_Margin_A1==0


channel==1
RxClkDly_Margin_A0==97 ps 10
TxDqDly_Margin_A0==126 ps 13
RxClkDly_Margin_A1==0 ps 0
TxDqDly_Margin_A1==0 ps 0
TrainedVREFDQ_A0==74
TrainedVREFDQ_A1==0
VrefDac_Margin_A0==27
DeviceVref_Margin_A0==40
VrefDac_Margin_A1==0
DeviceVref_Margin_A1==0

 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004

soc_vref_reg_value 0x 00000022 00000022 00000022 00000023 00000023 00000023 00000023 00000021 00000022 00000023 00000021 00000021 00000021 00000023 00000022 00000021 00000020 00000021 0000001f 00000021 0000001e 00000021 00000020 00000021 00000022 00000021 00000022 00000021 00000021 00000020 00000021 00000020 dram_vref_reg_value 0x 00000048
2D training succeed
aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Jul 31 2019 19:22:05
auto size-- 65535DDR cs0 size: 2048MB
DDR cs1 size: 0MB
DMC_DDR_CTRL: 00c0002cDDR size: 2048MB
cs0 DataBus test pass
cs0 AddrBus test pass

100bdlr_step_size ps== 457
result report
boot times 0Enable ddr reg access
00000000
emmc switch 3 ok
Authentication key not yet programmed
get rpmb counter error 0x00000007
00000000
emmc switch 0 ok
Load FIP HDR from eMMC, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0
Load BL3X from eMMC, src: 0x00078200, des: 0x01768000, size: 0x000c3800, part: 0
0.0;M3 CHK:0;cm4_sp_mode 0
MVN_1=0x00000000
MVN_2=0x00000000
[Image: g12b_v1.1.3389-92241b5 2019-07-02 17:23:01 luan.yuan@droid15-sz]
OPS=0x10
ring efuse init
chipver efuse init
29 0b 10 00 01 24 21 00 00 03 37 30 4e 42 4e 50
[0.018960 Inits done]
secure task start!
high task start!
low task start!
run into bl31
NOTICE:  BL31: v1.3(release):4fc40b1
NOTICE:  BL31: Built : 15:58:17, May 22 2019
NOTICE:  BL31: G12A normal boot!
NOTICE:  BL31: BL33 decompress pass
ERROR:   Error initializing runtime service opteed_fast


U-Boot 2015.01 (Aug 13 2019 - 14:57:46)

DRAM:  2 GiB
Relocation Offset is: 76e56000
spi_post_bind(spifc): req_seq = 0
register usb cfg[0][1] = 0000000077f3bac8
aml_i2c_init_port init regs for 0
MMC:   aml_priv->desc_buf = 0x0000000073e46a70
aml_priv->desc_buf = 0x0000000073e48db0
SDIO Port B: 0, SDIO Port C: 1
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
emmc/sd response timeout, cmd8, status=0x3ff2800
emmc/sd response timeout, cmd55, status=0x3ff2800
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x1, tx-dly 0, clock 40000000
aml_sd_retry_refix[983]:delay = 0x0,gadjust =0x12000
[mmc_startup] mmc refix success
init_part() 297: PART_TYPE_AML
[mmc_init] mmc init success
start dts,buffer=0000000073e4b620,dt_addr=0000000073e4b620
get_partition_from_dts() 91: ret 0
parts: 3
00:      logo	0000000000800000 1
01:   ramdisk	0000000002000000 1
02:    rootfs	ffffffffffffffff 4
init_part() 297: PART_TYPE_AML
eMMC/TSD partition table have been checked OK!
crc32_s:0x1577dad == storage crc_pattern:0x1577dad!!!
crc32_s:0xee152b83 == storage crc_pattern:0xee152b83!!!
crc32_s:0x79f50f07 == storage crc_pattern:0x79f50f07!!!
mmc env offset: 0x6c00000
In:    serial
Out:   serial
Err:   serial
reboot_mode=cold_boot
[store]To run cmd[emmc dtb_read 0x1000000 0x40000]
_verify_dtb_checksum()-3406: calc 8bf72748, store 8bf72748
_verify_dtb_checksum()-3406: calc 8bf72748, store 8bf72748
dtb_read()-3623: total valid 2
update_old_dtb()-3604: do nothing
aml_i2c_init_port init regs for 0
fusb302_init: Device ID: 0x91
CC connected in 1 as UFP
fusb302 detect chip.port_num = 0

amlkey_init() enter!
[EFUSE_ERR]f(efuse_usr_api_init_dtb)L68:not find /efusekey node [FDT_ERR_NOTFOUND].
[KM]Error:f[keymanage_efuse_init]L47:efuse init failed
[KM]Error:f[key_unify_init]L194:Device[1] init failed, err=48
vpu: clk_level in dts: 7
vpu: vpu_power_on
vpu: set clk: 666667000Hz, readback: 666666667Hz(0x100)
vpu: vpu_module_init_config
vpp: vpp_init
vpp: vpp osd2 matrix rgb2yuv..............
cvbs: cpuid:0x29
LCD_RESET PIN: 0
lcd: detect mode: tablet, key_valid: 0
lcd: failed to get lcd_cpu_gpio_names
lcd: load config from dts
lcd: pinctrl_version: 2
lcd: use panel_type=lcd_0
lcd: bl: pinctrl_version: 2
lcd: bl: name: backlight_pwm, method: 1
lcd: bl: aml_bl_power_ctrl: 0
Net:   dwmac.ff3f0000
amlkey_init() enter!
amlkey_init() 71: already init!
[EFUSE_ERR]f(efuse_usr_api_init_dtb)L68:not find /efusekey node [FDT_ERR_NOTFOUND].
[KM]Error:f[keymanage_efuse_init]L47:efuse init failed
[KM]Error:f[key_unify_init]L194:Device[1] init failed, err=48
MACADDR:02:00:00:21:24:01(from chipid)

saradc: 0x1ff, hw_ver: 0x31 (VIM3.V11)
Product checking: pass! Hardware version: VIM3.V11
upgrade_step=0
reboot_mode=cold_boot
reboot_mode:::: cold_boot

amlkey_init() enter!
amlkey_init() 71: already init!
[EFUSE_ERR]f(efuse_usr_api_init_dtb)L68:not find /efusekey node [FDT_ERR_NOTFOUND].
[KM]Error:f[keymanage_efuse_init]L47:efuse init failed
[KM]Error:f[key_unify_init]L194:Device[1] init failed, err=48
lcd: error: outputmode[1080p60hz] is not support
hpd_state=1
edid preferred_mode is 1080p60hz[16]
hdr mode is 0
dv  mode is ver:0  len: 0
hdr10+ mode is 0
[OSD]load fb addr from dts:/meson-fb
[OSD]set initrd_high: 0x7f800000
[OSD]fb_addr for logo: 0x7f800000
[OSD]load fb addr from dts:/meson-fb
[OSD]fb_addr for logo: 0x7f800000
[OSD]VPP_OFIFO_SIZE:0xfff01fff
[CANVAS]canvas init
[CANVAS]addr=0x7f800000 width=3840, height=2160
[OSD]osd_hw.free_dst_data: 0,1919,0,1079
[OSD]osd1_update_disp_freescale_enable
cvbs: outputmode[1080p60hz] is invalid
vpp: vpp_matrix_update: 2
set hdmitx VIC = 16
config HPLL = 5940000 frac_rate = 1
HPLL: 0x3b3a04f7
HPLL: 0x1b3a04f7
HPLLv1: 0xdb3a04f7
config HPLL done
j = 6  vid_clk_div = 1
hdmitx phy setting done
hdmitx: set enc for VIC: 16
enc_vpu_bridge_reset[1251]
rx version is 1.4 or below  div=10
vpp: sdr_mode = 2
vpp: Rx hdr_info.hdr_sup_eotf_smpte_st_2084 = 0

amlkey_init() enter!
amlkey_init() 71: already init!
[EFUSE_ERR]f(efuse_usr_api_init_dtb)L68:not find /efusekey node [FDT_ERR_NOTFOUND].
[KM]Error:f[keymanage_efuse_init]L47:efuse init failed
[KM]Error:f[key_unify_init]L194:Device[1] init failed, err=48
gpio: pin GPIOAO_7 (gpio 7) value is 1
normal power on
boot wol: disable
port mode is pcie