Some Q&As about IBM Telum

(source: HC33.slack.com)

[Q3] Silent Data Corruption has been showing up at hyperscale and Cloud-scale deployments lately. IBM has a storied history of doing checking, not just parity/ECC in memory, but also to protect logic. Does Talum include that kind of checking or correction? Can you tell us about what's done, please.
	> ...

[Q4] What functions does the intelligent data mover and prefetcher perform in the AI accelerator?
	> The intelligent data mover and prefetcher makes sure that data needed during a AI operation is loaded into the scratchpad of the accelerator ahead of time. It also prepare then the data (shifting, duplicating, …) and distribute it to the execution engines in time for processing, so that the execution engines are not stalled waiting for data, reducing the variability and improving performance.

	[Q4-1] can you share how the exception model works for these cisc instructions?
		> The cisc instruction for the AI functions runs on the Z core and as such the Z core will detect [access and other] exceptions and handle them just like any other cisc instruction would do.

[Q8] How is memory ordering preserved between core and accelerator? Smells like some fun transaction fun underneath
	> Indeed. And lot’s of cycle counting.

[Q11] Who manages the scratchpad? is it software-transparent?
	> It is managed by the firmware and fully software-transparent

[Q14] It seems the slides has been pruned. "Security" and "RAIM" are mentioned but no detail is disclosed. Can you share the full story?
	> There are many enhancements in other areas that we didn’t have time to talk about at HotChips, I mentioned the RAIM design in one of the answers, but there are other areas as well. We’ll disclose more of those innovations as time goes on.

[Q16] Do all the other accelerators operate the same way as the AI accelerator i.e. use the data from L2s? Is there any QoS on the ring for the cores vs. accelerators?
	> It depends. Some of the core internal accelerators like crypto and sort operate directly on the L1 caches, but apply prefetching to make sure the data is in the L1 when needed. For the chip wide accelerators like Deflate-Compression and AI, we use essentially the same approach that I described. There are QOS heuristics to make sure no core / accelerator can starve other components connected to the ring.
	> Sorting is a central component of any data processing, so that’s why we built a sort accelerator, which we first introduced on the z15 generation.

[Q18] What is the TDP for Telum?
	> For normal workloads it’s about 400W per socket.

[Q19] What are the compression algorithms supported by Telum? Is the performance data for the various accelerators published?
	> The Telum chip supports the same compression algorithms as the z15 chip.  There is a deflate (gzip) compression accelerator that is shared by 8 cores. Each core also has a compression engine that supports a proprietary dictionary based compression algorithm called CMPSC compression that has been supported since the 90s in hardware.

[Q20] Does ibm z still support transactional memory and the guaranteed forward progress mode?
	> Yes, Telum supports Transactional Memory including the version of guaranteed transactions.

[Q21] Historically IBM z chips are write-through (store-through) until the data is written into DRAM. Is that true here?
	> All recent Z processors had a combination of store-through / write-back cache. For as long as I can remember we didn’t write back all the way to the DRAM, but we did write back to the L3 cache (with a very large store gathering buffer at the L2 level). For Telum, we store-through to the L2 cache (with a very large gathering buffer between the L1 and L2), and then keep dirty data in the L2 until it gets either “snooped away” or written back to memoru.

[Q22] How does Telum protect containers from malicious OS/admins?
	> Hi, take a look at this overview: https://www.ibm.com/downloads/cas/O158MBWG
Telum improves the performance of the Trusted Execution Environment through a number of enhancements, like better interrupt handling.

[Q23] What kinds of workload or application the sort accelerator is used for?
	> https://blog.share.org/Technology-Article/peeking-under-the-hood-of-sort-acceleration-on-z15