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Nov 21st, 2017
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  1. x y
  2. 1 14
  3. 2 45
  4. 3 67
  5. 4 32
  6. 5 12
  7. 6 64
  8. 7 89
  9. 8 34
  10. 9 54
  11. 10 22
  12.  
  13. case address is
  14. when 1 => result <= 14;
  15. when 2 => result <= 45;
  16. when 3 => result <= 67;
  17. when 4 => result <= 32;
  18. when 5 => result <= 12;
  19. when 6 => result <= 64;
  20. ...
  21. when others => result <= 0; -- Default
  22. end case;
  23.  
  24. Memory_Initialization_Radix=16;
  25. Memory_Initialization_Vector=
  26. 0E,2D,43,20,0C,40,59,22,36,16;
  27.  
  28. entity cgrom is
  29. port (clkin : in std_logic;
  30. adr : in std_logic_vector(13 downto 0);
  31. data:out std_logic_vector(3 downto 0));
  32. end cgrom;
  33.  
  34. architecture a_cgrom of cgrom is
  35.  
  36. attribute INIT_00 :string;attribute INIT_01 :string;attribute INIT_02 :string;attribute INIT_03 :string;
  37. attribute INIT_04 :string;attribute INIT_05 :string;attribute INIT_06 :string;attribute INIT_07 :string;
  38.  
  39. attribute INIT_00 of chargen0: label is "0000000000000000000000000000000000000000000000000000000000000000";
  40. attribute INIT_01 of chargen0: label is "00000000000000E000E00060000000200040006000E000E000E000E000E00000";
  41. attribute INIT_02 of chargen0: label is "00000000000000000000000000000000000000000000011C011C011C011C0000";
  42. attribute INIT_03 of chargen0: label is "0000000000000048007C005C00CC01D800B800B801B007FC0330017007700260";
  43. attribute INIT_04 of chargen0: label is "00000020002000DC03FC01080120035000F0005C0028030C01FC035800200000";
  44. attribute INIT_05 of chargen0: label is "00000000000001800600006002C0039C0384038C0398006A0076003600300000";
  45. attribute INIT_06 of chargen0: label is "00000000002002F803BA059E03CC03E60654007800700030001C00F800F80020";
  46. attribute INIT_07 of chargen0: label is "0000000000000000000000000000000000000000000000600060006000600000";
  47.  
  48. subtype nybble is std_logic_vector(3 downto 0);
  49. subtype byte is std_logic_vector(7 downto 0);
  50.  
  51. signal romClock : std_logic;
  52. signal romAddress : nybble;
  53. signal romResult : byte;
  54.  
  55. myROM: process(romClock,romAddress) is
  56. begin
  57. if (rising_edge(romClock)) then
  58. case romAddress is
  59. when x"1" => romResult <= x"0E"; -- 14
  60. when x"2" => romResult <= x"2D"; -- 45
  61. when x"3" => romResult <= x"43"; -- 67
  62. when x"4" => romResult <= x"20"; -- 32
  63. when x"5" => romResult <= x"0C"; -- 12
  64. when x"6" => romResult <= x"40"; -- 64
  65. when others => romResult <= x"00"; -- 0
  66. end case;
  67. end if;
  68. end process myROM;
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