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- +Emulation thread started
- Detected cpu features : MMX SSE1 SSE2 SSE3
- PowerVR plugins :
- * Found Chankast's video(Aug 20 2008) v0.2.5
- * Found nullPVR -- Direct3D HAL built : Aug 20 2008 v1.0.0
- GDRom plugins :
- * Found Image Reader plugin by drk||Raziel & GiGaHeRz [Aug 20 2008] v1.0.0
- Aica plugins :
- * Found Chankast's AICA (Aug 20 2008) v0.2.5
- * Found Elsemi's AICA (Aug 20 2008) v1.0.0
- * Found Empty Aica Plugin [no sound/reduced compat] (Aug 20 2008) v0.0.0
- * Found nullAICA , built :Aug 20 2008 v0.1.0
- Maple plugins :
- * Found nullDC Maple Devices (Aug 20 2008) v1.0.0
- ExtDevice plugins :
- * Found nullExtDev (Aug 20 2008) v1.0.0
- Loaded nullPVR -- Direct3D HAL built : Aug 20 2008[nullPVR_Win32.dll]
- Loaded Image Reader plugin by drk||Raziel & GiGaHeRz [Aug 20 2008][nullGDR_Win32.dll]
- Loaded nullAICA , built :Aug 20 2008[nullAICA_Win32.dll]
- Loaded nullExtDev (Aug 20 2008)[nullExtDev_Win32.dll]
- Loaded nullDC Maple Devices (Aug 20 2008)[drkMapleDevices_Win32.dll]
- Using Recompiler
- --GD toc info start--
- Last Sector : 20554
- Session count : 2
- Session 0:
- Track Count: 1
- Session start FAD: 150
- track 0:
- Type : 0
- Start FAD : 150
- SectorSize : 2352
- File Offset : 352800
- Session 1:
- Track Count: 1
- Session start FAD: 11852
- track 0:
- Type : 2
- Start FAD : 11852
- SectorSize : 2336
- File Offset : 1413504
- --GD toc info end--
- Using NRG/MDS/MDF reader
- Mapped 0x00600000 to 0x007FFFFF to ram
- Mapped 0x00400000 to 0x005FFFFF to ram
- Mapped 0x00200000 to 0x003FFFFF to ram
- Mapped 0x00000000 to 0x001FFFFF to ram
- Mapped 0x00800000 to 0x00810000 to register funcions
- DSOUND V2 : Using 16 chunks of 4096 size
- Device caps... VS : FFFE0300 ; PS : FFFF0300
- Will use Z Scale mode 2 (D24S8)
- Will use Vertex Shaders
- drkpvr: Initialising windowed AA:0x0
- Using Vertex Shaders/vs_3_0
- Using Pixel Shaders/ps_3_0
- shil generation status : 81% cpu done[149 of 182] , 100% fpu done[31 of 31]
- Sh4 Init
- Dynarec cache : 1*32768KB small buffers , 1*1024KB big buffers , for a total of 33792KB dynarec cache
- recSh4 Init
- Sh4 Reset
- recSh4 Reset
- LoadFileToSh4Bootrom: loaded file "C:\nullDC\data\dc_boot.bin" ,size : 2097152 bytes
- LoadFileToSh4Flashrom: loaded file "C:\nullDC\data\dc_flash_wb.bin" ,size : 131072 bytes
- LoadFileToSh4Mem: can't load file "C:\nullDC\data\syscalls.bin" to memory , file not found
- LoadFileToSh4Mem: can't load file "C:\nullDC\data\IP.bin" to memory , file not found
- Error in .\dc\mem\sh4_internal_reg.cpp:WriteMem_area7:732 -> Write to Area7 not implemented , addr=1f940190,data=90
- )Error in .\dc\mem\sh4_internal_reg.cpp:WriteMem_area7:732 -> Write to Area7 not implemented , addr=1f940190,data=90
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f74e4,data=1fffff
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f68a4,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f68ac,data=0
- )Invalid GD-DMA start, SB_GDEN=0.Ingoring it.
- Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78a0,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78a4,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78a8,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78ac,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78b0,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78b4,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78b8,data=0
- )VREG = 03
- VREG = 03
- VREG = 03
- CE: Block will be demoted to manual for the CE pass
- SPI : unkown ? [0x71]
- Error in .\dc\mem\sh4_internal_reg.cpp:RegSRead:84 -> Read from internal Regs , not implemented , offset=c
- )DIV32S matched 1% @ 0x8C00CF78
- DIV32S matched 100% @ 0x8C00CF7E
- DIV32S matched 1% @ 0x8C00CF78
- DIV32S matched 100% @ 0x8C00CF7E
- div32s 1/0/3
- Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f68a4,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f68ac,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78a0,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78a4,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78a8,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78ac,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78b0,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78b4,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78b8,data=0
- )Invalid GD-DMA start, SB_GDEN=0.Ingoring it.
- VREG = 03
- DIV32S matched 1% @ 0x8C091086
- DIV32S matched 100% @ 0x8C09108C
- DIV32S matched 1% @ 0x8C091086
- DIV32S matched 100% @ 0x8C09108C
- div32s 1/0/3
- DIV32S matched 1% @ 0x8C0911E4
- DIV32S matched 100% @ 0x8C0911EC
- DIV32S matched 1% @ 0x8C09126E
- DIV32S matched 1% @ 0x8C0911E4
- DIV32S matched 100% @ 0x8C0911EC
- div32s 1/0/3
- DIV32S matched 1% @ 0x8C09126E
- DIV32S matched 1% @ 0x8C091278
- DIV32S matched 1% @ 0x8C091278
- VREG = 03
- VREG = 03
- VREG = 03
- ThreadEnd
- Device caps... VS : FFFE0300 ; PS : FFFF0300
- Will use Z Scale mode 2 (D24S8)
- Will use Vertex Shaders
- drkpvr: Initialising windowed AA:0x0
- Using Vertex Shaders/vs_3_0
- Using Pixel Shaders/ps_3_0
- SPI : unkown ? [0x71]
- CE: Block will be demoted to manual for the CE pass
- DIV32S matched 1% @ 0x8C00D0D6
- DIV32S matched 100% @ 0x8C00D0DE
- DIV32S matched 1% @ 0x8C00D160
- DIV32S matched 1% @ 0x8C00D0D6
- DIV32S matched 100% @ 0x8C00D0DE
- div32s 1/0/3
- DIV32S matched 1% @ 0x8C00D160
- DIV32S matched 1% @ 0x8C00D16A
- DIV32S matched 1% @ 0x8C00D16A
- VREG = 03
- DIV32S matched 1% @ 0x8C0098D8
- DIV32S matched 100% @ 0x8C0098DE
- DIV32S matched 1% @ 0x8C0098D8
- DIV32S matched 100% @ 0x8C0098DE
- div32s 1/0/3
- DIV32S matched 1% @ 0x8C009A36
- DIV32S matched 100% @ 0x8C009A3E
- DIV32S matched 1% @ 0x8C009AC0
- DIV32S matched 1% @ 0x8C009A36
- DIV32S matched 100% @ 0x8C009A3E
- div32s 1/0/3
- DIV32S matched 1% @ 0x8C009AC0
- DIV32S matched 1% @ 0x8C009ACA
- DIV32S matched 1% @ 0x8C009ACA
- Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f74e4,data=42fe
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f74e4,data=1fffff
- )VREG = 03
- VREG = 03
- VREG = 03
- SPI : unkown ? [0x71]
- SB/HOLLY : System reset requested
- Fast Link possible
- Sh4 Reset
- recSh4 Reset
- Error in .\dc\mem\sh4_internal_reg.cpp:WriteMem_area7:732 -> Write to Area7 not implemented , addr=1f940190,data=90
- )Error in .\dc\mem\sh4_internal_reg.cpp:WriteMem_area7:732 -> Write to Area7 not implemented , addr=1f940190,data=90
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f74e4,data=1fffff
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f68a4,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f68ac,data=0
- )Invalid GD-DMA start, SB_GDEN=0.Ingoring it.
- Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78a0,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78a4,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78a8,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78ac,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78b0,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78b4,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78b8,data=0
- )VREG = 03
- VREG = 03
- VREG = 03
- CE: Block will be demoted to manual for the CE pass
- SPI : unkown ? [0x71]
- Error in .\dc\mem\sh4_internal_reg.cpp:RegSRead:84 -> Read from internal Regs , not implemented , offset=c
- )DIV32S matched 1% @ 0x8C00CF78
- DIV32S matched 100% @ 0x8C00CF7E
- DIV32S matched 1% @ 0x8C00CF78
- DIV32S matched 100% @ 0x8C00CF7E
- div32s 1/0/3
- Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f68a4,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f68ac,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78a0,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78a4,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78a8,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78ac,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78b0,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78b4,data=0
- )Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not implemented , addr=5f78b8,data=0
- )Invalid GD-DMA start, SB_GDEN=0.Ingoring it.
- VREG = 03
- DIV32S matched 1% @ 0x8C091086
- DIV32S matched 100% @ 0x8C09108C
- DIV32S matched 1% @ 0x8C091086
- DIV32S matched 100% @ 0x8C09108C
- div32s 1/0/3
- DIV32S matched 1% @ 0x8C0911E4
- DIV32S matched 100% @ 0x8C0911EC
- DIV32S matched 1% @ 0x8C09126E
- DIV32S matched 1% @ 0x8C0911E4
- DIV32S matched 100% @ 0x8C0911EC
- div32s 1/0/3
- DIV32S matched 1% @ 0x8C09126E
- DIV32S matched 1% @ 0x8C091278
- DIV32S matched 1% @ 0x8C091278
- VREG = 03
- VREG = 03
- VREG = 03
- SaveSh4FlashromToFile: Saved flash file "C:\nullDC\data\dc_flash_wb.bin"
- Sh4 Term
- recSh4 Term
- ThreadEnd
- -Emulation thread stoped
- Unloaded nullDC Maple Devices (Aug 20 2008)[drkMapleDevices_Win32.dll]
- Unloaded nullExtDev (Aug 20 2008)[nullExtDev_Win32.dll]
- Unloaded nullAICA , built :Aug 20 2008[nullAICA_Win32.dll]
- Unloaded Image Reader plugin by drk||Raziel & GiGaHeRz [Aug 20 2008][nullGDR_Win32.dll]
- Unloaded nullPVR -- Direct3D HAL built : Aug 20 2008[nullPVR_Win32.dll]
- Invalid data in <C:\scummvmdc-1.4.0-A-Q\scumm140.nrg>. It is not an MDF/MDS file.
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