Advertisement
Not a member of Pastebin yet?
Sign Up,
it unlocks many cool features!
- Search or jump to…
- Pull requests
- Issues
- Marketplace
- Explore
- @yoshio99
- OrangeRoof
- /
- not-m153a
- Private
- 1
- 00
- Code Pull requests 0 Actions Security Insights
- not-m153a/lab3/clk_div_2.v
- @yoshio99 yoshio99 new clock divider
- 9cbe7b8 1 minute ago
- 92 lines (79 sloc) 1.8 KB
- `timescale 1ns / 1ps
- //////////////////////////////////////////////////////////////////////////////////
- // Company:
- // Engineer:
- //
- // Create Date: 21:04:30 02/24/2020
- // Design Name:
- // Module Name: clk_div_2
- // Project Name:
- // Target Devices:
- // Tool versions:
- // Description:
- //
- // Dependencies:
- //
- // Revision:
- // Revision 0.01 - File Created
- // Additional Comments:
- //
- //////////////////////////////////////////////////////////////////////////////////
- module clk_div_2(CLK, FAST_CLK, FOUR_CLK, ONETWENTY_CLK, BLINK_CLK, ONE_CLK
- );
- input CLK;
- output reg FOUR_CLK;
- output reg ONETWENTY_CLK;
- output reg ONE_CLK;
- output reg BLINK_CLK;
- output reg FAST_CLK;
- parameter constant1 = 12500000;
- parameter constant2 = 416666;
- parameter constant3 = 50000000;
- parameter constant4 = 25000000;
- reg [31:0] count1;
- reg [31:0] count2;
- reg [31:0] count3;
- reg [31:0] count4;
- always @ (posedge CLK)
- begin
- if (count1 == constant1 - 1)
- count1 <= 32'b0;
- else
- count1 <= count1 + 1;
- if (count2 == constant2 - 1)
- count2 <= 32'b0;
- else
- count2 <= count2 + 1;
- if (count3 == constant3 - 1)
- count3 <= 32'b0;
- else
- count3 <= count3 + 1;
- if (count4 == constant4 - 1)
- count4 <= 32'b0;
- else
- count4 <= count4 + 1;
- end
- always @ (posedge CLK)
- begin
- if (count1 == constant1 - 1)
- FOUR_CLK <= ~FOUR_CLK;
- else
- FOUR_CLK <= FOUR_CLK;
- if (count2 == constant2 - 1)
- ONETWENTY_CLK <= ~ONETWENTY_CLK;
- else
- ONETWENTY_CLK <= ONETWENTY_CLK;
- if (count2 == constant2 - 1)
- FAST_CLK <= ~FAST_CLK;
- else
- FAST_CLK <= FAST_CLK;
- if (count3 == constant3 - 1)
- ONE_CLK <= ~ONE_CLK;
- else
- ONE_CLK <= ONE_CLK;
- if (count4 == constant4 - 1)
- BLINK_CLK <= ~BLINK_CLK;
- else
- BLINK_CLK <= BLINK_CLK;
- end
- endmodule
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement