Advertisement
Guest User

Untitled

a guest
Feb 9th, 2023
54
0
Never
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
text 1.07 KB | None | 0 0
  1. # SPDX-License-Identifier: GPL-2.0-or-later
  2. # QuickLogic EOS S3
  3. # https://www.quicklogic.com/products/soc/eos-s3-microcontroller/
  4.  
  5. source [find target/swj-dp.tcl]
  6.  
  7. if { [info exists CHIPNAME] } {
  8. set _CHIPNAME $CHIPNAME
  9. } else {
  10. set _CHIPNAME eos_s3
  11. }
  12.  
  13. if { [info exists WORKAREASIZE] } {
  14. set _WORKAREASIZE $WORKAREASIZE
  15. } else {
  16. set _WORKAREASIZE 0x80000
  17. }
  18.  
  19. if { [info exists CPUTAPID] } {
  20. set _CPUTAPID $CPUTAPID
  21. } else {
  22. if { [using_jtag] } {
  23. set _CPUTAPID 0x4ba00477
  24. } {
  25. set _CPUTAPID 0x2ba01477
  26. }
  27. }
  28.  
  29. swj_newdap $_CHIPNAME cpu -irlen 4 -irmask 0xf -expected-id $_CPUTAPID
  30. dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
  31.  
  32. set _TARGETNAME $_CHIPNAME.cpu
  33. target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
  34.  
  35. # For now we use SRAM only for software upload
  36. $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  37.  
  38. adapter speed 4000
  39.  
  40. if {![using_hla]} {
  41. # if srst is not fitted use SYSRESETREQ to
  42. # perform a soft reset
  43. cortex_m reset_config sysresetreq
  44. }
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement