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  1. [USB]addr: 0x6E, value after: 7
  2. [USB]addr: 0x22, value: 0
  3. [USB]addr: 0x22, value after: 2
  4. [USB]addr: 0x68, value: 8
  5. [USB]addr: 0x68, value after: 8
  6. [USB]addr: 0x6A, value: 4
  7. [USB]addr: 0x6A, value after: 4
  8. [USB]addr: 0x110020B0 (UART1), value: 0
  9. [USB]addr: 0x110020B0 (UART1), value after: 1
  10. [PWRAP] pwrap_init_preloader
  11. [PWRAP] pwrap_init
  12. [PWRAP] start reset wrapper
  13. [PWRAP] the reset register =80
  14. [PWRAP] PMIC_WRAP_STAUPD_GRPEN =0x0,it should be equal to 0xc
  15. [PWRAP] _pwrap_init_reg_clock
  16. [PWRAP] have cipher
  17. [PWRAP] _pwrap_init_signature
  18. [PWRAP] mt_pwrap_init PMIC_WRAP_STAUPD_GRPEN(3D)
  19. [PWRAP] ERROR,line=1190 PMIC_WRAP_ADC_RDATA_ADDR=E40
  20. [PWRAP] mt_pwrap_init-- use D1 or D3
  21. [PWRAP] mt_pwrap_init---- debug15,FFFFFBF9
  22. [PWRAP] after MT6328 pwrap_write
  23. [PWRAP] write MT6328 Test pass
  24. [PWRAP] Read 6328 Test pass,return_value=0
  25. [PMIC_WRAP]wrap_init pass,the return value=0.
  26. [pmic_init] Preloader Start,MT6328 CHIP Code = 0x2820
  27. just_rst = 0
  28. bat is exist
  29. [6328]e-data[0x0]=0x0
  30. [6328]e-data[0x1]=0x124C
  31. [6328]e-data[0x2]=0x8208
  32. [6328]e-data[0x3]=0x20
  33. [6328]e-data[0x4]=0x0
  34. [6328]e-data[0x5]=0x3C0
  35. [6328]e-data[0x6]=0x803C
  36. [6328]e-data[0x7]=0x3FFB
  37. [6328]e-data[0x8]=0xA034
  38. [6328]e-data[0x9]=0x648B
  39. [6328]e-data[0xA]=0x0
  40. [6328]e-data[0xB]=0x0
  41. [6328]e-data[0xC]=0x4600
  42. [6328]e-data[0xD]=0x56
  43. [6328]e-data[0xE]=0x0
  44. [6328]e-data[0xF]=0x0
  45. [6328]e-data[0x10]=0xF000
  46. [6328]e-data[0x11]=0x3
  47. [6328]e-data[0x12]=0x0
  48. [6328]e-data[0x13]=0x0
  49. [6328]e-data[0x14]=0x0
  50. [6328]e-data[0x15]=0x0
  51. [6328]e-data[0x16]=0x0
  52. [6328]e-data[0x17]=0xCB0
  53. [6328]e-data[0x18]=0xF0A5
  54. [6328]e-data[0x19]=0x5EB5
  55. [6328]e-data[0x1A]=0x7522
  56. [6328]e-data[0x1B]=0x9FA9
  57. [6328]e-data[0x1C]=0x0
  58. [6328]e-data[0x1D]=0x0
  59. [6328]e-data[0x1E]=0x0
  60. [6328]e-data[0x1F]=0x0
  61. [pmic_6328_efuse_management]4.27 efuse_data[0x11]:0x3
  62. [pmic_6328_efuse_management]4.27 data32_448_org:0xB data32_472_org:0xB
  63. [pmic_6328_efuse_management]4.27 data32_448:0xA data32_472:0xA
  64. [I2C-PL] 687: invalid para: i2c->id=4
  65. [I2C-PL] 331: id=4,addr: 6B, transfer error
  66. [I2C-PL] 335: I2C_HS_NACKERR
  67. [I2C-PL] 337: I2C_ACKERR
  68. [I2C-PL] 207: I2C structure:
  69. [I2C-PL] Clk=13600,Id=4,Mode=1,St_rs=0,Dma_en=0,Op=3,Poll_en=1,Irq_stat=FFFE
  70. [I2C-PL] Trans_len=1,Trans_num=2,Trans_auxlen=1,Data_size=FFFF,speed=100
  71. [I2C-PL] 210: base address 0x0
  72. [I2C-PL] 230: I2C register:
  73. [I2C-PL] SLAVE_ADDR=EAFFFFFE,INTR_MASK=EAFFFFFE,INTR_STAT=EAFFFFFE,CONTROL=EAFFFFFE,TRANSFER_LEN=EAFFFFFE
  74. [I2C-PL] TRANSAC_LEN=EAFFFFFE,DELAY_LEN=EAFFFFFE,TIMING=BBBBBBBB,START=10200038,FIFO_STAT=E3A02000
  75. [I2C-PL] IO_CONFIG=E3A06000,HS=E3A08000,DCM_EN=E3A0B000,DEBUGSTAT=EB002E7D,EXT_CONF=E3A00000,TRANSFER_LEN_AUX=E3A010C0
  76. [I2C-PL] 842: write_read 0x10001 bytes fails,ret=-121.
  77. 0[I2C-PL] 687: invalid para: i2c->id=4
  78. [I2C-PL] 331: id=4,addr: 6B, transfer error
  79. [I2C-PL] 335: I2C_HS_NACKERR
  80. [I2C-PL] 337: I2C_ACKERR
  81. [I2C-PL] 207: I2C structure:
  82. [I2C-PL] Clk=13600,Id=4,Mode=1,St_rs=0,Dma_en=0,Op=3,Poll_en=1,Irq_stat=FFFE
  83. [I2C-PL] Trans_len=1,Trans_num=2,Trans_auxlen=1,Data_size=FFFF,speed=100
  84. [I2C-PL] 210: base address 0x0
  85. [I2C-PL] 230: I2C register:
  86. [I2C-PL] SLAVE_ADDR=EAFFFFFE,INTR_MASK=EAFFFFFE,INTR_STAT=EAFFFFFE,CONTROL=EAFFFFFE,TRANSFER_LEN=EAFFFFFE
  87. [I2C-PL] TRANSAC_LEN=EAFFFFFE,DELAY_LEN=EAFFFFFE,TIMING=BBBBBBBB,START=10200038,FIFO_STAT=E3A02000
  88. [I2C-PL] IO_CONFIG=E3A06000,HS=E3A08000,DCM_EN=E3A0B000,DEBUGSTAT=EB002E7D,EXT_CONF=E3A00000,TRANSFER_LEN_AUX=E3A010C0
  89. [I2C-PL] 842: write_read 0x10001 bytes fails,ret=-121.
  90. 0[update_mt6311_chip_id] id_l=0x0, id_r=0x1, id=0x1
  91. [mt6311_get_chip_id] g_mt6311_cid=0x1
  92. [mt6311_get_chip_id] g_mt6311_cid=0x1
  93. [mt6311_get_chip_id] g_mt6311_cid=0x1
  94. [mt6311_hw_component_detect] exist=0
  95. [mt6311_driver_probe] PL mt6311 is not exist
  96. [mt6311_driver_probe] PL g_mt6311_hw_exist=0, g_mt6311_driver_ready=1
  97. [mt6311_driver_probe] PL I2C_EXT_BUCK_CHANNEL=3.
  98. [mt6311_driver_probe] PL No GPIO_EXT_BUCK_VSEL_PIN (0x0)
  99. bat is exist
  100. VBAT=4170 mV with 3300 mV, VCHR 4484 mV ,VCHR_HV=6500
  101. [pmic_init] Done...................
  102. [mmc_init]: msdc0 start mmc_init_host() in PL...
  103. [msdc_init]: msdc0 Host controller intialization start
  104. [MSDC]config VEMC to 3V in preloader
  105. [SD0] Pins mode(1), none(0), down(1), up(2), keep(3)
  106. [SD0] Pins mode(2), none(0), down(1), up(2), keep(3)
  107. [MSDC]config VEMC to 3V in preloader
  108. [info][msdc_set_startbit 1242] read data start bit at rising edge
  109. [info][msdc_config_clksrc] input clock is 400000kHz
  110. [SD0] Bus Width: 1
  111. [info][msdc_config_clksrc] input clock is 400000kHz
  112. [info][msdc_set_startbit 1242] read data start bit at rising edge
  113. [SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(0) DDR(0) DIV(385) DS(0) RS(0)
  114. [msdc_init]: msdc0 Host controller intialization done
  115. [mmc_init]: msdc0 start mmc_init_card() in PL...
  116. [mmc_init_card]: start
  117. [info][msdc_config_clksrc] input clock is 400000kHz
  118. [info][msdc_set_startbit 1242] read data start bit at rising edge
  119. [SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(0) DDR(0) DIV(385) DS(0) RS(0)
  120. [SD0] Bus Width: 8
  121. [SD0] Switch to High-Speed mode!
  122. [SD0] Size: 15032 MB, Max.Speed: 52000 kHz, blklen(512), nblks(30785536), ro(0)
  123. [mmc_init_mem_card 3149][SD0] Initialized, eMMC50
  124. before host->cur_bus_clk(259740)
  125. [info][msdc_config_clksrc] input clock is 400000kHz
  126. [info][msdc_set_startbit 1242] read data start bit at rising edge
  127. [SD0] SET_CLK(52000kHz): SCLK(50000kHz) MODE(0) DDR(0) DIV(2) DS(0) RS(0)
  128. host->cur_bus_clk(50000000)
  129. [mmc_init_card]: finish successfully
  130. [EMI] mcp_dram_num:2,discrete_dram_num:0,enable_combo_dis:0
  131. [EMI] index(0) emmc id match failed
  132. found:1,i:1,mdl_number:1
  133. before mt_mempll_cali, wdt_mode = 0x14, wdt_dbg_ctrl = 0x200F3
  134. mt_pll_post_init: mt_get_mem_freq = 319998Khz
  135. [PLFM] Init PWRAP: OK(0)
  136. [PLFM] Init PMIC: OK(0)
  137. [PLFM] chip_code[321]
  138. [PLFM] chip_ver[0]
  139. [PTP] >> ptp_init()
  140. [PTP] >> get_devinfo()
  141. [PTP] << get_devinfo():322
  142. [PTP] >> ptp_init_det()
  143. [PTP] VCORE voltage bin to 1.05V
  144. [PTP] << ptp_init_det():466
  145. [PTP] PTP set volt: 0x00000048
  146. [PTP] 0x00000057
  147. [PTP] 0x00000056
  148. [PTP] 0x00000055
  149. [PTP] 0x00000054
  150. [PTP] 0x00000053
  151. [PTP] 0x00000052
  152. [PTP] 0x00000051
  153. [PTP] 0x00000050
  154. [PTP] 0x0000004F
  155. [PTP] 0x0000004E
  156. [PTP] 0x0000004D
  157. [PTP] 0x0000004C
  158. [PTP] 0x0000004B
  159. [PTP] 0x0000004A
  160. [PTP] 0x00000049
  161. [PTP] 0x00000048
  162. [PTP] M_HW_RES0 = 0x12B0462A
  163. [PTP] M_HW_RES1 = 0x005C0000
  164. [PTP] M_HW_RES2 = 0x0000001A
  165. [PTP] M_HW_RES3 = 0x007D86DE
  166. [PTP] M_HW_RES4 = 0x00000000
  167. [PTP] M_HW_RES5 = 0x00000003
  168. [PTP] << ptp_init():1056
  169. [BLDR] Build Time: 20181016-191303
  170. [DDR Reserve] ddr reserve mode not be enabled yet
  171. ==== Dump RGU Reg ========
  172. RGU MODE: 14
  173. RGU LENGTH: FFE0
  174. RGU STA: 40000000
  175. RGU INTERVAL: FFF
  176. RGU SWSYSRST: 8000
  177. ==== Dump RGU Reg End ====
  178. RGU RESET_DEGLITCH_KEY: 67D2A357
  179. RGU: g_rgu_satus:2
  180. mtk_wdt_mode_config mode value=10, tmp:22000010
  181. PL RGU RST: ??
  182. SW reset with bypass power key flag
  183. Find bypass powerkey flag
  184. mtk_wdt_mode_config mode value=5D, tmp:2200005D
  185. WDT NONRST=0x20000000
  186. WDT IRQ_EN=0x340000
  187. WDT REQ_EN=0x3C0002
  188. RGU mtk_wdt_init:MTK_WDT_DEBUG_CTL(590200F3)
  189. Enter mtk_kpd_gpio_set!
  190. after set KP enable: KP_SEL = 0x0 !
  191. [RTC] get_frequency_meter: input=0x0, ouput=5
  192. [RTC] get_frequency_meter: input=0x0, ouput=3968
  193. [RTC] get_frequency_meter: input=0x0, ouput=5
  194. [RTC] get_frequency_meter: input=0x0, ouput=0
  195. [RTC] get_frequency_meter: input=0x0, ouput=0
  196. [RTC] bbpu = 0xD, con = 0x4A6, osc32con = 0x7B00, sec = 0x21B9, yea = 0x2
  197. [RTC] powerkey1 = 0xA357, powerkey2 = 0x67D2
  198. Writeif_unlock
  199. [RTC] RTC_SPAR0=0x40
  200. rtc_2sec_reboot_check 0x21B9
  201. rtc_2sec_stat_clear
  202. [RTC] irqsta = 0x0, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0x40, spar1 = 0x800
  203. [RTC] new_spare0 = 0x0, new_spare1 = 0x1, new_spare2 = 0x1, new_spare3 = 0x1
  204. [RTC] bbpu = 0xD, con = 0x4A6, cali = 0x21B9
  205. SW reset with bypass power key flag
  206. SW reset with bypass power key flag
  207. [PLFM] WDT reboot bypass power key!
  208. [RTC] rtc_bbpu_power_on done
  209. mt_get_dram_type() 0x3
  210. [EMI] LPDDR3
  211. [Check]mt_get_mdl_number 0x1
  212. [EMI] eMMC/NAND ID = 90,1,4A,48,41,47,32,65,5,7,57,86,5D,D3,33,35
  213. [EMI] MDL number = 1
  214. [EMI] emi_set eMMC/NAND ID = 90,1,4A,48,41,47,32,65,5,0,0,0,0,0,0,0
  215. Start REXTDN SW calibration...
  216. enable P drive (initial settings), 0x0644:27Dh
  217. 2.1. DRVP 0x00c0[15:12]:0h
  218. 2.2. CMPOP 0x03dc[31]:0h
  219. 2.1. DRVP 0x00c0[15:12]:1000h
  220. 2.2. CMPOP 0x03dc[31]:0h
  221. 2.1. DRVP 0x00c0[15:12]:2000h
  222. 2.2. CMPOP 0x03dc[31]:0h
  223. 2.1. DRVP 0x00c0[15:12]:3000h
  224. 2.2. CMPOP 0x03dc[31]:0h
  225. 2.1. DRVP 0x00c0[15:12]:4000h
  226. 2.2. CMPOP 0x03dc[31]:0h
  227. 2.1. DRVP 0x00c0[15:12]:5000h
  228. 2.2. CMPOP 0x03dc[31]:0h
  229. 2.1. DRVP 0x00c0[15:12]:6000h
  230. 2.2. CMPOP 0x03dc[31]:0h
  231. 2.1. DRVP 0x00c0[15:12]:7000h
  232. 2.2. CMPOP 0x03dc[31]:0h
  233. 2.1. DRVP 0x00c0[15:12]:8000h
  234. 2.2. CMPOP 0x03dc[31]:0h
  235. 2.1. DRVP 0x00c0[15:12]:9000h
  236. 2.2. CMPOP 0x03dc[31]:0h
  237. 2.1. DRVP 0x00c0[15:12]:A000h
  238. 2.2. CMPOP 0x03dc[31]:80000000h
  239. P drive:10
  240. enable N drive (initial settings), 0x0644:17Dh
  241. 4.1. DRVN 0x00c0[11:8]:A000h
  242. 4.2.CMPON 0x3dc[30]:0h
  243. 4.1. DRVN 0x00c0[11:8]:A100h
  244. 4.2.CMPON 0x3dc[30]:0h
  245. 4.1. DRVN 0x00c0[11:8]:A200h
  246. 4.2.CMPON 0x3dc[30]:0h
  247. 4.1. DRVN 0x00c0[11:8]:A300h
  248. 4.2.CMPON 0x3dc[30]:0h
  249. 4.1. DRVN 0x00c0[11:8]:A400h
  250. 4.2.CMPON 0x3dc[30]:0h
  251. 4.1. DRVN 0x00c0[11:8]:A500h
  252. 4.2.CMPON 0x3dc[30]:0h
  253. 4.1. DRVN 0x00c0[11:8]:A600h
  254. 4.2.CMPON 0x3dc[30]:0h
  255. 4.1. DRVN 0x00c0[11:8]:A700h
  256. 4.2.CMPON 0x3dc[30]:0h
  257. 4.1. DRVN 0x00c0[11:8]:A800h
  258. 4.2.CMPON 0x3dc[30]:0h
  259. 4.1. DRVN 0x00c0[11:8]:A900h
  260. 4.2.CMPON 0x3dc[30]:0h
  261. 4.1. DRVN 0x00c0[11:8]:AA00h
  262. 4.2.CMPON 0x3dc[30]:40000000h
  263. N drive:9
  264. drvp=10,drvn=9
  265. =============================================
  266. X-axis: DQS Gating Window Delay (Fine Scale)
  267. Y-axis: DQS Gating Window Delay (Coarse Scale)
  268. =============================================
  269. 0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120
  270. --------------------------------------------------------------------------------
  271. 0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  272. 0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  273. 0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  274. 0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  275. 0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  276. 0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  277. 0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  278. 0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  279. 0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  280. 0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  281. 000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  282. 000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  283. 000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  284. 000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  285. 000E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  286. 000F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  287. 0010:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  288. 0011:| 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1
  289. 0012:| 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1
  290. 0013:| 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0
  291. 0014:| 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
  292. 0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  293. 0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  294. 0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  295. 0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  296. 0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  297. 001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  298. 001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  299. 001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  300. first_bit_idx=14, fine_idx=112, CenterDiff=44, MinCenterDiff=127, FineTuneKPt=68
  301. first_bit_idx=11, fine_idx=88, CenterDiff=20, MinCenterDiff=44, FineTuneKPt=68
  302. first_bit_idx=6, fine_idx=48, CenterDiff=20, MinCenterDiff=20, FineTuneKPt=68
  303. Rank 0 coarse tune value selection : 18, 18
  304. [fcGATING_SAME_MCK]rank0 gating record N-1, coarse = 17, fine = 112
  305. [New Gating with FineTune Limit] opt_coarse_idx=17/18, first_bit_idx=13/7, opt_fine_idx=13/11
  306. rank 0 coarse = 18
  307. rank 0 fine = 88
  308. ==============================================================
  309. NEW DATLAT calibration
  310. ==============================================================
  311. DATLAT Default value = 0x8
  312. RX Scan: DQS delay 32
  313. TAP=3, err_value=0xFFFFFFFF, begin=0, first=255, sum=0
  314. RX Scan: DQS delay 32
  315. TAP=4, err_value=0xFFFFFFFF, begin=0, first=255, sum=0
  316. RX Scan: DQS delay 32
  317. TAP=5, err_value=0xFFFFFFFF, begin=0, first=255, sum=0
  318. RX Scan: DQS delay 32
  319. TAP=6, err_value=0xFFFFFFFF, begin=0, first=255, sum=0
  320. RX Scan: DQS delay 6
  321. TAP=7, err_value=0x0, begin=1, first=7, sum=1
  322. RX Scan: DQS delay 6
  323. TAP=8, err_value=0x0, begin=1, first=7, sum=2
  324. New DATLAT with RX scan. Early Break!!
  325. first_step=7 total pass=2 best_step=8
  326. =============================================
  327. X-axis: DQS Gating Window Delay (Fine Scale)
  328. Y-axis: DQS Gating Window Delay (Coarse Scale)
  329. =============================================
  330. 0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120
  331. --------------------------------------------------------------------------------
  332. 0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  333. 0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  334. 0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  335. 0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  336. 0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  337. 0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  338. 0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  339. 0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  340. 0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  341. 0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  342. 000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  343. 000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  344. 000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  345. 000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  346. 000E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  347. 000F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  348. 0010:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  349. 0011:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1
  350. 0012:| 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
  351. 0013:| 0 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0
  352. 0014:| 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0
  353. 0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  354. 0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  355. 0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  356. 0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  357. 0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  358. 001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  359. 001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  360. 001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  361. first_bit_idx=15, fine_idx=120, CenterDiff=52, MinCenterDiff=127, FineTuneKPt=68
  362. first_bit_idx=12, fine_idx=96, CenterDiff=28, MinCenterDiff=52, FineTuneKPt=68
  363. first_bit_idx=7, fine_idx=56, CenterDiff=12, MinCenterDiff=28, FineTuneKPt=68
  364. first_bit_idx=3, fine_idx=24, CenterDiff=44, MinCenterDiff=12, FineTuneKPt=68
  365. Rank 1 coarse tune value selection : 19, 19
  366. [fcGATING_SAME_MCK]rank1 gating record N-1, coarse = 18, fine = 96
  367. [New Gating with FineTune Limit] opt_coarse_idx=18/19, first_bit_idx=8/1, opt_fine_idx=8/7
  368. rank 1 coarse = 19
  369. rank 1 fine = 56
  370. ==============================================================
  371. NEW DATLAT calibration
  372. ==============================================================
  373. DATLAT Default value = 0x8
  374. RX Scan: DQS delay 32
  375. TAP=3, err_value=0xFFFFFFFF, begin=0, first=255, sum=0
  376. RX Scan: DQS delay 32
  377. TAP=4, err_value=0xFFFFFFFF, begin=0, first=255, sum=0
  378. RX Scan: DQS delay 32
  379. TAP=5, err_value=0xFFFFFFFF, begin=0, first=255, sum=0
  380. RX Scan: DQS delay 32
  381. TAP=6, err_value=0xFFFFFFFF, begin=0, first=255, sum=0
  382. RX Scan: DQS delay 6
  383. TAP=7, err_value=0x0, begin=1, first=7, sum=1
  384. RX Scan: DQS delay 6
  385. TAP=8, err_value=0x0, begin=1, first=7, sum=2
  386. New DATLAT with RX scan. Early Break!!
  387. first_step=7 total pass=2 best_step=8
  388. DQS loop = 15, cmp_err_1 = DFFF40DF
  389. DQS loop = 14, cmp_err_1 = 8DF0016
  390. DQS loop = 13, cmp_err_1 = DE0004
  391. DQS loop = 12, cmp_err_1 = D60000
  392. DQS loop = 11, cmp_err_1 = 860000
  393. DQS loop = 10, cmp_err_1 = 40000
  394. DQS loop = 9, cmp_err_1 = 0
  395. DQS loop = 8, cmp_err_1 = 0
  396. DQS loop = 7, cmp_err_1 = 0
  397. DQS loop = 6, cmp_err_1 = 0
  398. DQS loop = 5, cmp_err_1 = 0
  399. DQS loop = 4, cmp_err_1 = 0
  400. DQS loop = 3, cmp_err_1 = 0
  401. DQS loop = 2, cmp_err_1 = 0
  402. DQS loop = 1, cmp_err_1 = 0
  403. DQS loop = 0, cmp_err_1 = 0
  404. DQ loop=15, cmp_err_1 = 0
  405. DQ loop=14, cmp_err_1 = 0
  406. DQ loop=13, cmp_err_1 = 0
  407. DQ loop=12, cmp_err_1 = 0
  408. DQ loop=11, cmp_err_1 = 0
  409. DQ loop=10, cmp_err_1 = 0
  410. DQ loop=9, cmp_err_1 = 0
  411. DQ loop=8, cmp_err_1 = 0
  412. DQ loop=7, cmp_err_1 = 0
  413. DQ loop=6, cmp_err_1 = 0
  414. DQ loop=5, cmp_err_1 = 0
  415. DQ loop=4, cmp_err_1 = 0
  416. DQ loop=3, cmp_err_1 = 0
  417. DQ loop=2, cmp_err_1 = 0
  418. DQ loop=1, cmp_err_1 = 0
  419. DQ loop=0, cmp_err_1 = 0
  420. byte:0, (DQS,DQ)=(0,1)
  421. byte:1, (DQS,DQ)=(0,0)
  422. byte:2, (DQS,DQ)=(0,3)
  423. byte:3, (DQS,DQ)=(0,1)
  424. [fcGATING_SAME_MCK]Rand 0/1 MCK coarse tune are the same!!
  425. [EMI] DRAMC calibration passed
  426. [DRAM] DFS rank0 coarse fine : 18 88, rank1 coarse fine :19 56
  427. DFS could be enable
  428. [MEM] complex R/W mem test pass
  429. RGU rgu_dram_reserved:MTK_WDT_MODE(2200005D)
  430. [Dram_Buffer] dram_buf_t size: 0x1DC6C0
  431. [Dram_Buffer] part_hdr_t size: 0x200
  432. [Dram_Buffer] sizeof(boot_arg_t): 0x178
  433. [Dram_Buffer] g_dram_buf start addr: 0x42000000
  434. [Dram_Buffer] g_dram_buf->msdc_gpd_pool start addr: 0x4219C600
  435. [Dram_Buffer] g_dram_buf->msdc_bd_pool start addr: 0x4219C640
  436. RAM_CONSOLE sram(0x10DC00) sig (0x35455D28) mismatch
  437. RAM_CONSOLE start: 0x43F00000, size: 0x10000, sig: 0x43474244
  438. RAM_CONSOLE preloader last status: 0x0 0x0 0x0 0x0 0x0 0x0
  439. RAM_CONSOLE wdt status (0x43F00040)=0x2
  440. [PLFM] Init Boot Device: OK(0)
  441. Enter mtk_kpd_gpio_set!
  442. mtk detect key function pmic_detect_homekey MTK_PMIC_RST_KEY = 17
  443. pl pmic FCHRKEY Release
  444. 0:dram_rank_size:40000000
  445. 1:dram_rank_size:40000000
  446. 0:dram_rank_size:40000000
  447. 1:dram_rank_size:40000000
  448. orig_dram_info[0] start: 0x0000000040000000, size: 0x0000000040000000
  449. orig_dram_info[1] start: 0x0000000080000000, size: 0x0000000040000000
  450. CUSTOM_CONFIG_MAX_DRAM_SIZE: 0x0000000100000000
  451. total_dram_size: 0x0000000080000000, max_dram_size: 0x0000000100000000
  452. [GPT_PL]Parsing Primary GPT now...
  453. [GPT_PL][0]name=proinfo, part_id=8, start_sect=0x400, nr_sects=0x1800
  454. [GPT_PL][1]name=nvram, part_id=8, start_sect=0x1C00, nr_sects=0x2800
  455. [GPT_PL][2]name=protect1, part_id=8, start_sect=0x4400, nr_sects=0x5000
  456. [GPT_PL][3]name=protect2, part_id=8, start_sect=0x9400, nr_sects=0x5000
  457. [GPT_PL][4]name=lk, part_id=8, start_sect=0xE400, nr_sects=0x400
  458. [GPT_PL][5]name=para, part_id=8, start_sect=0xE800, nr_sects=0x400
  459. [GPT_PL][6]name=boot, part_id=8, start_sect=0xEC00, nr_sects=0x8000
  460. [GPT_PL][7]name=recovery, part_id=8, start_sect=0x16C00, nr_sects=0x8000
  461. [GPT_PL][8]name=logo, part_id=8, start_sect=0x1EC00, nr_sects=0x4000
  462. [GPT_PL][9]name=expdb, part_id=8, start_sect=0x22C00, nr_sects=0x5000
  463. [GPT_PL][10]name=seccfg, part_id=8, start_sect=0x27C00, nr_sects=0x400
  464. [GPT_PL][11]name=oemkeystore, part_id=8, start_sect=0x28000, nr_sects=0x1000
  465. [GPT_PL][12]name=secro, part_id=8, start_sect=0x29000, nr_sects=0x3000
  466. [GPT_PL][13]name=keystore, part_id=8, start_sect=0x2C000, nr_sects=0x4000
  467. [GPT_PL][14]name=tee1, part_id=8, start_sect=0x30000, nr_sects=0x2800
  468. [GPT_PL][15]name=tee2, part_id=8, start_sect=0x32800, nr_sects=0x2800
  469. [GPT_PL][16]name=lk2, part_id=8, start_sect=0x35000, nr_sects=0x400
  470. [GPT_PL][17]name=frp, part_id=8, start_sect=0x35400, nr_sects=0x800
  471. [GPT_PL][18]name=nvdata, part_id=8, start_sect=0x35C00, nr_sects=0x10000
  472. [GPT_PL][19]name=odmdtbo, part_id=8, start_sect=0x45C00, nr_sects=0x8000
  473. [GPT_PL][20]name=metadata, part_id=8, start_sect=0x4DC00, nr_sects=0x12400
  474. [GPT_PL][21]name=vendor, part_id=8, start_sect=0x60000, nr_sects=0x100000
  475. [GPT_PL][22]name=system, part_id=8, start_sect=0x160000, nr_sects=0x500000
  476. [GPT_PL][23]name=cache, part_id=8, start_sect=0x660000, nr_sects=0xC8000
  477. [GPT_PL][24]name=userdata, part_id=8, start_sect=0x728000, nr_sects=0x162BC00
  478. [GPT_PL][25]name=flashinfo, part_id=8, start_sect=0x1D53C00, nr_sects=0x8000
  479. [GPT_PL]Success to find valid GPT.
  480. [PART] blksz: 512B
  481. [PART] [0x0000000000080000-0x000000000037FFFF] "proinfo" (6144 blocks)
  482. [PART] [0x0000000000380000-0x000000000087FFFF] "nvram" (10240 blocks)
  483. [PART] [0x0000000000880000-0x000000000127FFFF] "protect1" (20480 blocks)
  484. [PART] [0x0000000001280000-0x0000000001C7FFFF] "protect2" (20480 blocks)
  485. [PART] [0x0000000001C80000-0x0000000001CFFFFF] "lk" (1024 blocks)
  486. [PART] [0x0000000001D00000-0x0000000001D7FFFF] "para" (1024 blocks)
  487. [PART] [0x0000000001D80000-0x0000000002D7FFFF] "boot" (32768 blocks)
  488. [PART] [0x0000000002D80000-0x0000000003D7FFFF] "recovery" (32768 blocks)
  489. [PART] [0x0000000003D80000-0x000000000457FFFF] "logo" (16384 blocks)
  490. [PART] [0x0000000004580000-0x0000000004F7FFFF] "expdb" (20480 blocks)
  491. [PART] [0x0000000004F80000-0x0000000004FFFFFF] "seccfg" (1024 blocks)
  492. [PART] [0x0000000005000000-0x00000000051FFFFF] "oemkeystore" (4096 blocks)
  493. [PART] [0x0000000005200000-0x00000000057FFFFF] "secro" (12288 blocks)
  494. [PART] [0x0000000005800000-0x0000000005FFFFFF] "keystore" (16384 blocks)
  495. [PART] [0x0000000006000000-0x00000000064FFFFF] "tee1" (10240 blocks)
  496. [PART] [0x0000000006500000-0x00000000069FFFFF] "tee2" (10240 blocks)
  497. [PART] [0x0000000006A00000-0x0000000006A7FFFF] "lk2" (1024 blocks)
  498. [PART] [0x0000000006A80000-0x0000000006B7FFFF] "frp" (2048 blocks)
  499. [PART] [0x0000000006B80000-0x0000000008B7FFFF] "nvdata" (65536 blocks)
  500. [PART] [0x0000000008B80000-0x0000000009B7FFFF] "odmdtbo" (32768 blocks)
  501. [PART] [0x0000000009B80000-0x000000000BFFFFFF] "metadata" (74752 blocks)
  502. [PART] [0x000000000C000000-0x000000002BFFFFFF] "vendor" (1048576 blocks)
  503. [PART] [0x000000002C000000-0x00000000CBFFFFFF] "system" (5242880 blocks)
  504. [PART] [0x00000000CC000000-0x00000000E4FFFFFF] "cache" (819200 blocks)
  505. [PART] [0x00000000E5000000-0x00000003AA77FFFF] "userdata" (23247872 blocks)
  506. [PART] [0x00000003AA780000-0x00000003AB77FFFF] "flashinfo" (32768 blocks)
  507. [ROM_INFO] 'v2','0x0','0x0','0x0','0x2C00'
  508. [SEC] AES Legacy : 0
  509. [SEC] SECCFG AC : 1
  510. [LIB] Loading SEC config
  511. [LIB] Name =
  512. [LIB] Config = 0x22, 0x22
  513. [LIB] SECRO (ac, ac_offset, ac_length) = (0x1, 0x40, 0x40)
  514. 0x31,0x41,0x35,0x35
  515. [SEC] DBGPORT (0 1)
  516. [SEC] read '0x4F80000'
  517. 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,
  518. [LIB] CFG read size '0x2000' '0x1860'
  519. 0x0
  520. [LIB] HW DEC
  521. 0xA229269A
  522. [LIB] SEC CFG doesn't exist
  523. [SEC] init fail '0x3000'
  524. [LIB] seccfg magic is incorrect
  525. \00\00\80\80\80\80\00\80\80\00\80\00\00\80\80\00\80\80
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