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May 10th, 2020
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  1. +DMR slot1 BS DATA DCC=4 Idle
  2. +DMR slot2 BS DATA DCC=4 Idle
  3. +DMR slot1 BS DATA DCC=4 Idle
  4. +DMR slot2 BS DATA DCC=4 Idle
  5. Null SLCO
  6. +DMR slot1 BS DATA DCC=4 Idle
  7. +DMR slot2 BS DATA DCC=4 Idle
  8. +DMR slot1 BS DATA DCC=4 Idle
  9. +DMR slot2 BS DATA DCC=4 Idle
  10. Null SLCO
  11. +DMR slot1 BS DATA DCC=4 Idle
  12. +DMR slot2 BS DATA DCC=4 Idle
  13. +DMR slot1 BS DATA DCC=4 Idle
  14. +DMR slot2 BS DATA DCC=4 Idle
  15. Null SLCO
  16. +DMR slot1 BS DATA DCC=4 Idle
  17. +DMR slot2 BS DATA DCC=4 Idle ERR1
  18. +DMR slot1 BS DATA DCC=4 Idle
  19. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 8013 Tgt=9797 Src=4103031
  20. Null SLCO
  21. +DMR slot1 BS DATA DCC=4 Idle
  22. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 8012 Tgt=9797 Src=4103031
  23. +DMR slot1 BS DATA DCC=4 Idle
  24. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 8011 Tgt=9797 Src=4103031
  25. Activity update: Slot1=No Activity Slot2=Indiv Data
  26. +DMR slot1 BS DATA DCC=4 Idle
  27. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 8010 Tgt=9797 Src=4103031
  28. +DMR slot1 BS DATA DCC=4 Idle
  29. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 800F Tgt=9797 Src=4103031
  30. Activity update: Slot1=No Activity Slot2=Indiv Data
  31. +DMR slot1 BS DATA DCC=4 Idle ERR1
  32. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 800E Tgt=9797 Src=4103031
  33. +DMR slot1 BS DATA DCC=4 Idle
  34. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 800D Tgt=9797 Src=4103031
  35. Activity update: Slot1=No Activity Slot2=Indiv Data
  36. +DMR slot1 BS DATA DCC=4 Idle
  37. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 800C Tgt=9797 Src=4103031
  38. +DMR slot1 BS DATA DCC=4 Idle
  39. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 800B Tgt=9797 Src=4103031
  40. Activity update: Slot1=No Activity Slot2=Indiv Data
  41. +DMR slot1 BS DATA DCC=4 Idle
  42. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 800A Tgt=9797 Src=4103031
  43. +DMR slot1 BS DATA DCC=4 Idle
  44. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 8009 Tgt=9797 Src=4103031
  45. Activity update: Slot1=No Activity Slot2=Indiv Data
  46. +DMR slot1 BS DATA DCC=4 Idle
  47. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 8008 Tgt=9797 Src=4103031
  48. +DMR slot1 BS DATA DCC=4 Idle
  49. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 8007 Tgt=9797 Src=4103031
  50. Activity update: Slot1=No Activity Slot2=Indiv Data
  51. +DMR slot1 BS DATA DCC=4 Idle
  52. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 8006 Tgt=9797 Src=4103031
  53. +DMR slot1 BS DATA DCC=4 Idle
  54. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 8005 Tgt=9797 Src=4103031
  55. Activity update: Slot1=No Activity Slot2=Indiv Data
  56. +DMR slot1 BS DATA DCC=4 Idle
  57. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 8004 Tgt=9797 Src=4103031
  58. +DMR slot1 BS DATA DCC=4 Idle
  59. +DMR slot2 BS DATA DCC=4 Data Header DPF=[2:UcData] Tgt=9797 Src=4103031 Conf=0 SAP=[9:Prop] Blocks=3 Pad=1 Last=0 Seq=0
  60. Activity update: Slot1=No Activity Slot2=Indiv Data
  61. +DMR slot1 BS DATA DCC=4 Idle
  62. +DMR slot2 BS DATA DCC=4 Data Header DPF=[15:Prop] SAP=3 MFID=16 3F 10 11 0B 00 00 FF 83 F9 D5 BB 2E
  63. +DMR slot1 BS DATA DCC=4 Idle
  64. +DMR slot2 BS DATA DCC=4 Rate 1/2 Data 1B C3 67 27 0E 03 F0 02 EB C7 A5 96 ..g'........
  65. Activity update: Slot1=No Activity Slot2=Indiv Data
  66. +DMR slot1 BS DATA DCC=4 Idle
  67. +DMR slot2 BS DATA DCC=4 Rate 1/2 Data 10 27 A0 D3 E1 DA 7E 00 0A 63 E9 E0 .'....~..c..
  68. +DMR slot1 BS DATA DCC=4 Idle
  69. +DMR slot2 BS DATA DCC=4 Idle
  70. Activity update: Slot1=No Activity Slot2=Indiv Data
  71. +DMR slot1 BS DATA DCC=4 Idle
  72. +DMR slot2 BS DATA DCC=4 Idle
  73. +DMR slot1 BS DATA DCC=4 Idle
  74. +DMR slot2 BS DATA DCC=4 Idle
  75. Null SLCO
  76. +DMR slot1 BS DATA DCC=4 Idle
  77. +DMR slot2 BS DATA DCC=4 Idle
  78. +DMR slot1 BS DATA DCC=4 Idle
  79. +DMR slot2 BS DATA DCC=4 Idle
  80. Null SLCO
  81. +DMR slot1 BS DATA DCC=4 Idle
  82. +DMR slot2 BS DATA DCC=4 Idle
  83. +DMR slot1 BS DATA DCC=4 Idle
  84. +DMR slot2 BS DATA DCC=4 Idle
  85. Null SLCO
  86. +DMR slot1 BS DATA DCC=4 Idle
  87. +DMR slot2 BS DATA DCC=4 Idle
  88. +DMR slot1 BS DATA DCC=4 Idle
  89. +DMR slot2 BS DATA DCC=4 Idle
  90. Null SLCO
  91. +DMR slot1 BS DATA DCC=4 Idle
  92. +DMR slot2 BS DATA DCC=4 Idle
  93. +DMR slot1 BS DATA DCC=4 Idle
  94. +DMR slot2 BS DATA DCC=4 Idle
  95. Null SLCO
  96. +DMR slot1 BS DATA DCC=4 Idle
  97. +DMR slot2 BS DATA DCC=4 Idle
  98. +DMR slot1 BS DATA DCC=4 Idle
  99. +DMR slot2 BS DATA DCC=4 Idle
  100. Null SLCO
  101. +DMR slot1 BS DATA DCC=4 Idle
  102. +DMR slot2 BS DATA DCC=4 Idle
  103. +DMR slot1 BS DATA DCC=4 Idle
  104. +DMR slot2 BS DATA DCC=4 Idle
  105. Null SLCO
  106. +DMR slot1 BS DATA DCC=4 Idle
  107. +DMR slot2 BS DATA DCC=4 Idle
  108. +DMR slot1 BS DATA DCC=4 Idle
  109. +DMR slot2 BS DATA DCC=4 Idle
  110. Null SLCO
  111. +DMR slot1 BS DATA DCC=4 Idle
  112. +DMR slot2 BS DATA DCC=4 Idle
  113. +DMR slot1 BS DATA DCC=4 Idle
  114. +DMR slot2 BS DATA DCC=4 Idle
  115. Null SLCO
  116. +DMR slot1 BS DATA DCC=4 Idle
  117. +DMR slot2 BS DATA DCC=4 Idle
  118. +DMR slot1 BS DATA DCC=4 Idle
  119. +DMR slot2 BS DATA DCC=4 Idle
  120. Null SLCO
  121. +DMR slot1 BS DATA DCC=4 Idle
  122. +DMR slot2 BS DATA DCC=4 Idle
  123. +DMR slot1 BS DATA DCC=4 Idle
  124. +DMR slot2 BS DATA DCC=4 Idle
  125. Null SLCO
  126. +DMR slot1 BS DATA DCC=4 Idle
  127. +DMR slot2 BS DATA DCC=4 Idle
  128. +DMR slot1 BS DATA DCC=4 Idle
  129. +DMR slot2 BS DATA DCC=4 Idle
  130. Null SLCO
  131. +DMR slot1 BS DATA DCC=4 Idle
  132. +DMR slot2 BS DATA DCC=4 Idle
  133. +DMR slot1 BS DATA DCC=4 Idle
  134. +DMR slot2 BS DATA DCC=4 Idle
  135. Null SLCO
  136. +DMR slot1 BS DATA DCC=4 Idle
  137. +DMR slot2 BS DATA DCC=4 Idle
  138. +DMR slot1 BS DATA DCC=4 Idle
  139. +DMR slot2 BS DATA DCC=4 Idle
  140. Null SLCO
  141. +DMR slot1 BS DATA DCC=4 Idle
  142. +DMR slot2 BS DATA DCC=4 Idle
  143. +DMR slot1 BS DATA DCC=4 Idle
  144. +DMR slot2 BS DATA DCC=4 Idle
  145. Null SLCO
  146. +DMR slot1 BS DATA DCC=4 Idle
  147. +DMR slot2 BS DATA DCC=4 Idle
  148. +DMR slot1 BS DATA DCC=4 Idle
  149. +DMR slot2 BS DATA DCC=4 Idle
  150. Null SLCO
  151. +DMR slot1 BS DATA DCC=4 Idle
  152. +DMR slot2 BS DATA DCC=4 Idle
  153. +DMR slot1 BS DATA DCC=4 Idle
  154. +DMR slot2 BS DATA DCC=4 Idle
  155. Null SLCO
  156. +DMR slot1 BS DATA DCC=4 Idle
  157. +DMR slot2 BS DATA DCC=4 Idle
  158. +DMR slot1 BS DATA DCC=4 Idle
  159. +DMR slot2 BS DATA DCC=4 Idle
  160. Null SLCO
  161. +DMR slot1 BS DATA DCC=4 Idle
  162. +DMR slot2 BS DATA DCC=4 Idle
  163. +DMR slot1 BS DATA DCC=4 Idle
  164. +DMR slot2 BS DATA DCC=4 Idle
  165. Null SLCO
  166. +DMR slot1 BS DATA DCC=4 Idle
  167. +DMR slot2 BS DATA DCC=4 Idle
  168. +DMR slot1 BS DATA DCC=4 Idle
  169. +DMR slot2 BS DATA DCC=4 Idle
  170. Null SLCO
  171. +DMR slot1 BS DATA DCC=4 Idle
  172. +DMR slot2 BS DATA DCC=4 Idle
  173. +DMR slot1 BS DATA DCC=4 Idle
  174. +DMR slot2 BS DATA DCC=4 Idle
  175. Null SLCO
  176. +DMR slot1 BS DATA DCC=4 Idle
  177. +DMR slot2 BS DATA DCC=4 Idle
  178. +DMR slot1 BS DATA DCC=4 Idle
  179. +DMR slot2 BS DATA DCC=4 Idle
  180. Null SLCO
  181. +DMR slot1 BS DATA DCC=4 Idle
  182. +DMR slot2 BS DATA DCC=4 Idle
  183. +DMR slot1 BS DATA DCC=4 Idle
  184. +DMR slot2 BS DATA DCC=4 Idle
  185. Null SLCO
  186. +DMR slot1 BS DATA DCC=4 Idle
  187. +DMR slot2 BS DATA DCC=4 Idle
  188. +DMR slot1 BS DATA DCC=4 Idle ERR1
  189. +DMR slot2 BS DATA DCC=4 Idle
  190. Null SLCO
  191. +DMR slot1 BS DATA DCC=4 Idle ERR1
  192. Sync: no sync
  193. Sync:+DMR
  194. +DMR slot2 BS DATA DCC=4 Idle
  195. +DMR slot1 BS DATA DCC=4 Idle
  196. +DMR slot2 BS DATA DCC=4 Idle
  197. +DMR slot1 BS DATA DCC=4 Idle
  198. Null SLCO
  199. +DMR slot2 BS DATA DCC=4 Idle
  200. +DMR slot1 BS DATA DCC=4 Idle
  201. +DMR slot2 BS DATA DCC=4 Idle
  202. +DMR slot1 BS DATA DCC=4 Idle
  203. Null SLCO
  204. +DMR slot2 BS DATA DCC=4 Idle
  205. +DMR slot1 BS DATA DCC=4 Idle
  206. +DMR slot2 BS DATA DCC=4 Idle
  207. +DMR slot1 BS DATA DCC=4 Idle
  208. Null SLCO
  209. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 8013 Tgt=9797 Src=4111061
  210. +DMR slot1 BS DATA DCC=4 Idle
  211. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 8012 Tgt=9797 Src=4111061
  212. +DMR slot1 BS DATA DCC=4 Idle
  213. Activity update: Slot1=No Activity Slot2=Indiv Data
  214. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 8011 Tgt=9797 Src=4111061
  215. +DMR slot1 BS DATA DCC=4 Idle
  216. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 8010 Tgt=9797 Src=4111061
  217. +DMR slot1 BS DATA DCC=4 Idle
  218. Activity update: Slot1=No Activity Slot2=Indiv Data
  219. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 800F Tgt=9797 Src=4111061
  220. +DMR slot1 BS DATA DCC=4 Idle
  221. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 800E Tgt=9797 Src=4111061
  222. +DMR slot1 BS DATA DCC=4 Idle
  223. Activity update: Slot1=No Activity Slot2=Indiv Data
  224. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 800D Tgt=9797 Src=4111061
  225. +DMR slot1 BS DATA DCC=4 Idle
  226. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 800C Tgt=9797 Src=4111061
  227. +DMR slot1 BS DATA DCC=4 Idle
  228. Activity update: Slot1=No Activity Slot2=Indiv Data
  229. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 800B Tgt=9797 Src=4111061
  230. +DMR slot1 BS DATA DCC=4 Idle ERR2
  231. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 800A Tgt=9797 Src=4111061
  232. +DMR slot1 BS DATA DCC=4 Idle
  233. Activity update: Slot1=No Activity Slot2=Indiv Data
  234. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 8009 Tgt=9797 Src=4111061
  235. +DMR slot1 BS DATA DCC=4 Idle
  236. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 8008 Tgt=9797 Src=4111061
  237. +DMR slot1 BS DATA DCC=4 Idle
  238. Activity update: Slot1=No Activity Slot2=Indiv Data
  239. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 8007 Tgt=9797 Src=4111061
  240. +DMR slot1 BS DATA DCC=4 Idle
  241. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 8006 Tgt=9797 Src=4111061
  242. +DMR slot1 BS DATA DCC=4 Idle
  243. Activity update: Slot1=No Activity Slot2=Indiv Data
  244. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 8005 Tgt=9797 Src=4111061
  245. +DMR slot1 BS DATA DCC=4 Idle
  246. +DMR slot2 BS DATA DCC=4 CSBK ECC/RAS Preamble 8004 Tgt=9797 Src=4111061
  247. +DMR slot1 BS DATA DCC=4 Idle
  248. Activity update: Slot1=No Activity Slot2=Indiv Data
  249. +DMR slot2 BS DATA DCC=4 Data Header DPF=[2:UcData] Tgt=9797 Src=4111061 Conf=0 SAP=[9:Prop] Blocks=3 Pad=1 Last=0 Seq=0
  250. +DMR slot1 BS DATA DCC=4 Idle
  251. +DMR slot2 BS DATA DCC=4 Data Header DPF=[15:Prop] SAP=3 MFID=16 3F 10 11 0B 00 00 9F 99 F6 9B 05 31
  252. +DMR slot1 BS DATA DCC=4 Idle
  253. Activity update: Slot1=No Activity Slot2=Indiv Data
  254. +DMR slot2 BS DATA DCC=4 Rate 1/2 Data A5 50 51 59 E4 53 1C 55 75 D3 A5 1C .PQY.S.Uu...
  255. +DMR slot1 BS DATA DCC=4 Idle
  256. +DMR slot2 BS DATA DCC=4 Rate 1/2 Data ED 56 91 DE 85 2D 2F 00 A2 CF 9B 7C .V...-/....|
  257. +DMR slot1 BS DATA DCC=4 Idle
  258. Activity update: Slot1=No Activity Slot2=Indiv Data
  259. +DMR slot2 BS DATA DCC=4 Idle
  260. +DMR slot1 BS DATA DCC=4 Idle
  261. +DMR slot2 BS DATA DCC=4 Idle
  262. +DMR slot1 BS DATA DCC=4 Idle
  263. Null SLCO
  264. +DMR slot2 BS DATA DCC=4 Idle
  265. +DMR slot1 BS DATA DCC=4 Idle
  266. +DMR slot2 BS DATA DCC=4 Idle
  267. +DMR slot1 BS DATA DCC=4 Idle
  268. Null SLCO
  269. +DMR slot2 BS DATA DCC=4 Idle
  270. +DMR slot1 BS DATA DCC=4 Idle
  271. +DMR slot2 BS DATA DCC=4 Idle
  272. +DMR slot1 BS DATA DCC=4 Idle
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