openwrt BB brcm6358 ext irqs 4, 5 fix

--- a/arch/mips/bcm63xx/irq.c
+++ b/arch/mips/bcm63xx/irq.c
@@ -30,6 +30,7 @@
 static int is_ext_irq_cascaded;
 static unsigned int ext_irq_count;
 static unsigned int ext_irq_start, ext_irq_end;
+static int ext_irqs[6];
 static unsigned int ext_irq_cfg_reg1, ext_irq_cfg_reg2;
 static void (*internal_irq_mask)(struct irq_data *d);
 static void (*internal_irq_unmask)(struct irq_data *d, const struct cpumask *m);
@@ -47,6 +48,9 @@
    if (is_ext_irq_cascaded &&
        intbit >= ext_irq_start && intbit <= ext_irq_end)
        do_IRQ(intbit - ext_irq_start + IRQ_EXTERNAL_BASE);
+   else if (BCMCPU_IS_6358() &&
+       intbit >= ext_irqs[4] && intbit <= ext_irqs[5])
+       do_IRQ(intbit - ext_irq_start + IRQ_EXTERNAL_BASE + 9);
    else
        do_IRQ(intbit + IRQ_INTERNAL_BASE);
 }
@@ -230,7 +234,9 @@
    bcm_perf_writel(reg, regaddr);
    spin_unlock_irqrestore(&epic_lock, flags);

-   if (is_ext_irq_cascaded)
+   if (BCMCPU_IS_6358())
+       internal_irq_mask(irq_get_irq_data(ext_irqs[irq]));
+   else if (is_ext_irq_cascaded)
        internal_irq_mask(irq_get_irq_data(irq + ext_irq_start));
 }

@@ -252,7 +258,10 @@
    bcm_perf_writel(reg, regaddr);
    spin_unlock_irqrestore(&epic_lock, flags);

-   if (is_ext_irq_cascaded)
+   if (BCMCPU_IS_6358())
+       internal_irq_unmask(irq_get_irq_data(ext_irqs[irq]),
+                   NULL);
+   else if (is_ext_irq_cascaded)
        internal_irq_unmask(irq_get_irq_data(irq + ext_irq_start),
                    NULL);
 }
@@ -496,11 +505,18 @@
        irq_stat_addr[1] += PERF_IRQSTAT_6358_REG(1);
        irq_mask_addr[1] += PERF_IRQMASK_6358_REG(1);
        irq_bits = 32;
-       ext_irq_count = 4;
+       ext_irq_count = 6;
        is_ext_irq_cascaded = 1;
+       ext_irqs[0] = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE;
+       ext_irqs[1] = BCM_6358_EXT_IRQ1 - IRQ_INTERNAL_BASE;
+       ext_irqs[2] = BCM_6358_EXT_IRQ2 - IRQ_INTERNAL_BASE;
+       ext_irqs[3] = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE;
+       ext_irqs[4] = BCM_6358_EXT_IRQ4 - IRQ_INTERNAL_BASE;
+       ext_irqs[5] = BCM_6358_EXT_IRQ5 - IRQ_INTERNAL_BASE;
        ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE;
        ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE;
        ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358;
+       ext_irq_cfg_reg2 = PERF_EXTIRQ_CFG_REG2_6358;
        break;
    case BCM6362_CPU_ID:
        irq_stat_addr[0] += PERF_IRQSTAT_6362_REG(0);
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
@@ -1138,7 +1138,8 @@
 #define BCM_6358_EXT_IRQ1      (IRQ_INTERNAL_BASE + 26)
 #define BCM_6358_EXT_IRQ2      (IRQ_INTERNAL_BASE + 27)
 #define BCM_6358_EXT_IRQ3      (IRQ_INTERNAL_BASE + 28)
-
+#define BCM_6358_EXT_IRQ4      (IRQ_INTERNAL_BASE + 20)
+#define BCM_6358_EXT_IRQ5      (IRQ_INTERNAL_BASE + 21)
 /*
  * 6362 irqs
  */
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
@@ -11,5 +11,7 @@
 #define IRQ_EXT_1          (IRQ_EXTERNAL_BASE + 1)
 #define IRQ_EXT_2          (IRQ_EXTERNAL_BASE + 2)
 #define IRQ_EXT_3          (IRQ_EXTERNAL_BASE + 3)
+#define IRQ_EXT_4          (IRQ_EXTERNAL_BASE + 4)
+#define IRQ_EXT_5          (IRQ_EXTERNAL_BASE + 5)

 #endif /* ! BCM63XX_IRQ_H_ */
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
@@ -346,6 +346,7 @@
 #define PERF_EXTIRQ_CFG_REG_6368   0x18
 #define PERF_EXTIRQ_CFG_REG_63268  0x18

+#define PERF_EXTIRQ_CFG_REG2_6358  0x1c
 #define PERF_EXTIRQ_CFG_REG2_6368  0x1c

 /* for 6348 only */