Guest User

Untitled

a guest
Jul 29th, 2020
24
Never
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
  1. from nmigen import *
  2. import math as math
  3. import numpy as np
  4.  
  5. class wave(Elaboratable):
  6. def __init__(self, bit_width = 8, phsinc = 1):
  7. self.phsinc = phsinc
  8.  
  9. if 1:
  10. # define the LUT contents
  11. sine_len = 256
  12. scl = (2**(bit_width-1))-1
  13.  
  14. if 0:
  15. # this always works
  16. data = [0] * sine_len
  17. for i in range(sine_len):
  18. data[i] = math.floor(math.sin((i+0.5)*2*math.pi/(sine_len))*scl + scl + 0.5)
  19. else:
  20. # this fails for simulation but works for synthesis
  21. data = np.zeros(sine_len, dtype=np.int)
  22. #data = [0] * sine_len
  23. for i in np.arange(sine_len):
  24. data[i] = int(np.floor(np.sin((i+0.5)*2*np.pi/(sine_len))*scl + scl + 0.5))
  25.  
  26. #print(data)
  27.  
  28. # create the LUT
  29. self.LUT = Memory(width = bit_width, depth = sine_len, init = data)
  30.  
  31. # LUT read port
  32. self.r = self.LUT.read_port(transparent=False)
  33.  
  34. self.output = Signal(bit_width)
  35.  
  36. def elaborate(self, platform):
  37. m = Module()
  38.  
  39. # phase accumulator
  40. accum = Signal(28)
  41. m.d.sync += accum.eq(accum + self.phsinc)
  42.  
  43. # waveforms
  44. if 0:
  45. # simple sawtooth from upper bits
  46. m.d.sync += self.output.eq(accum[-(self.output.width+1):-1])
  47. else:
  48. # LUT from upper bits
  49. m.submodules.r = self.r
  50. m.d.comb += self.r.addr.eq(accum[-(self.output.width+1):-1])
  51. m.d.comb += self.output.eq(self.r.data)
  52.  
  53. return m
RAW Paste Data