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Demetra4

CORDIC

Dec 16th, 2019
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  1. module atan_const (
  2. input [3:0] itr,
  3. output reg [15:0] atan
  4. );
  5. always @ (*)
  6.   case (itr)
  7.     4'd0: atan = 16'h3244;
  8.     4'd1: atan = 16'h1dac;
  9.     4'd2: atan = 16'h0fae;
  10.     4'd3: atan = 16'h07f5;
  11.     4'd4: atan = 16'h03ff;
  12.     4'd5: atan = 16'h0200;
  13.     4'd6: atan = 16'h0100;
  14.     4'd7: atan = 16'h0080;
  15.     4'd8: atan = 16'h0040;
  16.     4'd9: atan = 16'h0020;
  17.     4'd10: atan = 16'h0010;
  18.     4'd11: atan = 16'h0008;
  19.     4'd12: atan = 16'h0004;
  20.     4'd13: atan = 16'h0002;
  21.     4'd14: atan = 16'h0001;
  22.     default:atan = 16'h0000;
  23.   endcase
  24. endmodule
  25. module rgst #( parameter w = 8)//register's width
  26. ( input clk,
  27.   input rst_b, //asynchronous reset; active low
  28.   input [w-1:0] d,
  29.   input ld,
  30.   input clr, //synchronous reset; active high output
  31.   output reg [w-1:0] q);
  32.   always @ (posedge clk, negedge rst_b)
  33.     if (!rst_b) q <= 1'd0;
  34.     else if (clr) q <= 1'd0;
  35.     else if (ld) q <= d;
  36. endmodule
  37.  
  38. module arsh (
  39.   input [3:0]i, [15:0]a,
  40.   output [15:0]o);
  41.   assign o = $signed(a) >>> i;
  42. endmodule
  43.  
  44. module cntr #(parameter w = 8)(
  45.   input clk, rst_b, c_up, clr,
  46.   output reg [w-1:0]q);
  47.   always@(posedge clk,negedge rst_b)
  48.     if(!rst_b) q<=1'd0;
  49.     else if(clr) q<=1'd0;
  50.       else if(c_up) q<=q+1'd1;
  51. endmodule
  52.  
  53. module add_sub(
  54.     input s,
  55.     input [15:0]a,b,
  56.     output [15:0]o
  57.   );
  58.  
  59.   assign o=s?a+b:a-b;
  60. endmodule
  61.  
  62. module ctrl_u(
  63.     input [3:0]itr,
  64.     input clk,rst_b,bgn,
  65.     output fin,ld,init  
  66.   );
  67.  
  68.   reg [2:0]st;
  69.   wire [2:0]st_next;
  70.  
  71.   assign st_next[0]=st[2]|st[0]&~bgn;
  72.   assign st_next[1]=st[0]&bgn|st[1]&(itr !=4'd15);
  73.   assign st_next[2]=st[1]&(itr == 4'd15);
  74.   assign ld=st[0]&bgn|st[1];
  75.   assign init=st[0]&bgn;
  76.   assign fin=st[2];
  77.  
  78.   always@(posedge clk,negedge rst_b)
  79.   if(!rst_b) st<=3'd1;
  80.   else st<=st_next;
  81. endmodule
  82.  
  83. module cordic(
  84.     input clk,rst_b,bgn,
  85.     input [15:0]theta,
  86.     output fin,
  87.     output [15:0]cos
  88.   );
  89.  
  90.   wire [15:0]x_new, y_new, z_new, x_out, y_out, z_out, atan, x_rsh, y_rsh;
  91.   wire [3:0]i;
  92.   wire ld,init;
  93.  
  94.   rgst #(.w(16))
  95.    a0(
  96.      .ld(ld),
  97.      .clk(clk),
  98.      .clr(1'd0),
  99.      .rst_b(rst_b),
  100.      .d(init ? 16'h26dd : x_new),
  101.      .q(x_out)
  102.   );
  103.  
  104.   arsh a1(
  105.     .a(y_out),
  106.     .i(i),
  107.     .o(y_rsh)
  108.   );
  109.  
  110.   add_sub a2(
  111.     .a(x_out),
  112.     .b(y_rsh),
  113.     .s(~z_out[15]),
  114.     .o(x_new)
  115.   );
  116.  
  117.   rgst #(.w(16))b0(
  118.     .ld(ld),
  119.     .clk(clk),
  120.     .clr(1'd0),
  121.     .rst_b(rst_b),
  122.     .d(init ? 0 : y_new),
  123.     .q(y_out)
  124.   );
  125.  
  126.   arsh b1(
  127.     .a(x_out),
  128.     .i(i),
  129.     .o(x_rsh)
  130.   );
  131.  
  132.   add_sub b2(
  133.     .a(y_out),
  134.     .b(x_rsh),
  135.     .s(z_out[15]),
  136.     .o(y_new)
  137.   );
  138.  
  139.   rgst #(.w(16))c0(
  140.     .ld(ld),
  141.     .clk(clk),
  142.     .clr(1'd0),
  143.     .rst_b(rst_b),
  144.     .d(init ? theta : z_new),
  145.     .q(z_out)
  146.   );
  147.  
  148.   atan_const atc(
  149.     .itr(i),
  150.     .atan(atan)
  151.   );
  152.  
  153.   add_sub c2(
  154.     .a(z_out),
  155.     .b(atan),
  156.     .s(~z_out[15]),
  157.     .o(z_new)
  158.   );
  159.  
  160.   cnt #(.w(4))counter(
  161.     .clk(clk),
  162.     .rst_b(rst_b),
  163.     .c_up(ld),
  164.     .clr(init),
  165.     .q(i)
  166.   );
  167.  
  168.   ctrl_u control(
  169.     .itr(i),
  170.     .bgn(bgn),
  171.     .clk(clk),
  172.     .rst_b(rst_b),
  173.     .fin(fin),
  174.     .ld(ld),
  175.     .init(init)
  176.   );
  177.  
  178.   assign cos=fin?x_out:16'bz;
  179. endmodule
  180.  
  181. module cordic_tb (
  182.   output reg clk, rst_b, bgn, [15:0] theta,
  183.   output fin, [15:0] cos);
  184.   cordic test (
  185.       .clk(clk),
  186.       .rst_b(rst_b),
  187.       .bgn(bgn),
  188.       .theta(theta),
  189.       .fin(fin),
  190.       .cos(cos));
  191.   initial begin
  192.       clk = 1'd0;
  193.     repeat (500) #50 clk = ~clk;
  194.   end
  195.   initial begin
  196.       rst_b = 1'd0; #5 rst_b = 1'd1;
  197.   end
  198.   initial begin
  199.       bgn = 1'd1;
  200.        #100 bgn = 1'd0;
  201.        #1700 bgn = 1'd1;
  202.        #100 bgn = 1'd0;
  203.        #1700 bgn = 1'd1;
  204.        #100 bgn = 1'd0;
  205.   end
  206.  initial begin
  207.     theta = 16'h2183;
  208.         #1800 theta = 16'h3244;
  209.         #1800 theta = 16'h4305;
  210.  end
  211.  endmodule
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