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Xilinx

Holonium Mar 30th, 2018 78 Never
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  1. WARNING: [Board 49-26] cannot add Board Part digilentinc.com:arty-s7-25:part0:1.0 available at C:/Xilinx/Vivado/2017.4/data/boards/board_files/arty-s7-25/E.0/board.xml as part xc7s25csga324-1 specified in board_part file is either invalid or not available
  2. WARNING: [Board 49-26] cannot add Board Part digilentinc.com:arty-s7-50:part0:1.0 available at C:/Xilinx/Vivado/2017.4/data/boards/board_files/arty-s7-50/B.0/board.xml as part xc7s50csga324-1 specified in board_part file is either invalid or not available
  3. WARNING: [Board 49-26] cannot add Board Part digilentinc.com:arty-z7-10:part0:1.0 available at C:/Xilinx/Vivado/2017.4/data/boards/board_files/arty-z7-10/A.0/board.xml as part xc7z010clg400-1 specified in board_part file is either invalid or not available
  4. WARNING: [Board 49-26] cannot add Board Part digilentinc.com:arty-z7-20:part0:1.0 available at C:/Xilinx/Vivado/2017.4/data/boards/board_files/arty-z7-20/A.0/board.xml as part xc7z020clg400-1 specified in board_part file is either invalid or not available
  5. WARNING: [Board 49-26] cannot add Board Part digilentinc.com:genesys2:part0:1.1 available at C:/Xilinx/Vivado/2017.4/data/boards/board_files/genesys2/H/board.xml as part xc7k325tffg900-2 specified in board_part file is either invalid or not available
  6. WARNING: [Board 49-26] cannot add Board Part digilentinc.com:sword:part0:1.0 available at C:/Xilinx/Vivado/2017.4/data/boards/board_files/sword/C.0/board.xml as part xc7k325tffg900-2 specified in board_part file is either invalid or not available
  7. WARNING: [Board 49-26] cannot add Board Part digilentinc.com:zedboard:part0:1.0 available at C:/Xilinx/Vivado/2017.4/data/boards/board_files/zedboard/1.3/board.xml as part xc7z020clg484-1 specified in board_part file is either invalid or not available
  8. WARNING: [Board 49-26] cannot add Board Part digilentinc.com:zybo-z7-10:part0:1.0 available at C:/Xilinx/Vivado/2017.4/data/boards/board_files/zybo-z7-10/A.0/board.xml as part xc7z010clg400-1 specified in board_part file is either invalid or not available
  9. WARNING: [Board 49-26] cannot add Board Part digilentinc.com:zybo-z7-20:part0:1.0 available at C:/Xilinx/Vivado/2017.4/data/boards/board_files/zybo-z7-20/A.0/board.xml as part xc7z020clg400-1 specified in board_part file is either invalid or not available
  10. WARNING: [Board 49-26] cannot add Board Part digilentinc.com:zybo:part0:1.0 available at C:/Xilinx/Vivado/2017.4/data/boards/board_files/zybo/B.3/board.xml as part xc7z010clg400-1 specified in board_part file is either invalid or not available
  11. error renaming "c:/Users/*/Test4/Test4.srcs/sources_1/bd/design_1/ip/design_1_mig_7series_0_1/_tmp/design_1_mig_7series_0_1" to "c:/Users/*/Test4/Test4.srcs/sources_1/bd/design_1/ip/design_1_mig_7series_0_1/design_1_mig_7series_0_1": permission denied
  12. ERROR: [IP_Flow 19-3475] Tcl error in ::ipgui_design_1_mig_7series_0_1::updateAllModelParams procedure for BD Cell 'mig_7series_0'. error renaming "c:/Users/*/Test4/Test4.srcs/sources_1/bd/design_1/ip/design_1_mig_7series_0_1/_tmp/design_1_mig_7series_0_1" to "c:/Users/*/Test4/Test4.srcs/sources_1/bd/design_1/ip/design_1_mig_7series_0_1/design_1_mig_7series_0_1": permission denied
  13. INFO: [IP_Flow 19-3438] Customization errors found on 'mig_7series_0'. Restoring to previous valid configuration.
  14. ERROR: [BD 41-245] set_property error - Customization errors found on 'mig_7series_0'. Restoring to previous valid configuration.
  15.  
  16. ERROR: [Common 17-39] 'set_property' failed due to earlier errors.
  17. apply_board_connection: Time (s): cpu = 00:00:01 ; elapsed = 00:00:11 . Memory (MB): peak = 886.281 ; gain = 1.230
  18. INFO: [Common 17-17] undo 'apply_board_connection -board_interface "ddr3_sdram" -ip_intf "mig_7series_0/mig_ddr_interface" -diagram "design_1" '
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