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  1. v3-4-4-drm-imx-add-deferred-plane-disabling.patch
  2.  
  3. diff --git a/drivers/gpu/drm/imx/imx-drm-core.c b/drivers/gpu/drm/imx/imx-drm-core.c
  4. index 0a5e4fbb906bf..94f9c25e1c67b 100644
  5. --- a/drivers/gpu/drm/imx/imx-drm-core.c
  6. +++ b/drivers/gpu/drm/imx/imx-drm-core.c
  7. @@ -30,6 +30,7 @@
  8. #include <video/imx-ipu-v3.h>
  9.  
  10. #include "imx-drm.h"
  11. +#include "ipuv3-plane.h"
  12.  
  13. #define MAX_CRTC 4
  14.  
  15. @@ -160,6 +161,10 @@ static const struct drm_mode_config_funcs imx_drm_mode_config_funcs = {
  16. static void imx_drm_atomic_commit_tail(struct drm_atomic_state *state)
  17. {
  18. struct drm_device *dev = state->dev;
  19. + struct drm_plane *plane;
  20. + struct drm_plane_state *plane_state;
  21. + bool plane_disabling = false;
  22. + int i;
  23.  
  24. drm_atomic_helper_commit_modeset_disables(dev, state);
  25.  
  26. @@ -169,6 +174,19 @@ static void imx_drm_atomic_commit_tail(struct drm_atomic_state *state)
  27.  
  28. drm_atomic_helper_commit_modeset_enables(dev, state);
  29.  
  30. + for_each_plane_in_state(state, plane, plane_state, i) {
  31. + if (drm_atomic_plane_disabling(plane, plane_state))
  32. + plane_disabling = true;
  33. + }
  34. +
  35. + if (plane_disabling) {
  36. + drm_atomic_helper_wait_for_vblanks(dev, state);
  37. +
  38. + for_each_plane_in_state(state, plane, plane_state, i)
  39. + ipu_plane_disable_deferred(plane);
  40. +
  41. + }
  42. +
  43. drm_atomic_helper_commit_hw_done(state);
  44. }
  45.  
  46. diff --git a/drivers/gpu/drm/imx/ipuv3-crtc.c b/drivers/gpu/drm/imx/ipuv3-crtc.c
  47. index 6be515a9fb694..0f15f11f26e0c 100644
  48. --- a/drivers/gpu/drm/imx/ipuv3-crtc.c
  49. +++ b/drivers/gpu/drm/imx/ipuv3-crtc.c
  50. @@ -60,6 +60,26 @@ static void ipu_crtc_enable(struct drm_crtc *crtc)
  51. ipu_di_enable(ipu_crtc->di);
  52. }
  53.  
  54. +static void ipu_crtc_disable_planes(struct ipu_crtc *ipu_crtc,
  55. + struct drm_crtc_state *old_crtc_state)
  56. +{
  57. + bool disable_partial = false;
  58. + bool disable_full = false;
  59. + struct drm_plane *plane;
  60. +
  61. + drm_atomic_crtc_state_for_each_plane(plane, old_crtc_state) {
  62. + if (plane == &ipu_crtc->plane[0]->base)
  63. + disable_full = true;
  64. + if (&ipu_crtc->plane[1] && plane == &ipu_crtc->plane[1]->base)
  65. + disable_partial = true;
  66. + }
  67. +
  68. + if (disable_partial)
  69. + ipu_plane_disable(ipu_crtc->plane[1], true);
  70. + if (disable_full)
  71. + ipu_plane_disable(ipu_crtc->plane[0], false);
  72. +}
  73. +
  74. static void ipu_crtc_atomic_disable(struct drm_crtc *crtc,
  75. struct drm_crtc_state *old_crtc_state)
  76. {
  77. @@ -73,7 +93,7 @@ static void ipu_crtc_atomic_disable(struct drm_crtc *crtc,
  78. * attached IDMACs will be left in undefined state, possibly hanging
  79. * the IPU or even system.
  80. */
  81. - drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, false);
  82. + ipu_crtc_disable_planes(ipu_crtc, old_crtc_state);
  83. ipu_dc_disable(ipu);
  84.  
  85. spin_lock_irq(&crtc->dev->event_lock);
  86. diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c
  87. index 55991d46ced50..a37735298615e 100644
  88. --- a/drivers/gpu/drm/imx/ipuv3-plane.c
  89. +++ b/drivers/gpu/drm/imx/ipuv3-plane.c
  90. @@ -172,23 +172,30 @@ static void ipu_plane_enable(struct ipu_plane *ipu_plane)
  91. ipu_dp_enable_channel(ipu_plane->dp);
  92. }
  93.  
  94. -static int ipu_disable_plane(struct drm_plane *plane)
  95. +void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel)
  96. {
  97. - struct ipu_plane *ipu_plane = to_ipu_plane(plane);
  98. -
  99. DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
  100.  
  101. ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
  102.  
  103. - if (ipu_plane->dp)
  104. - ipu_dp_disable_channel(ipu_plane->dp, true);
  105. + if (ipu_plane->dp && disable_dp_channel)
  106. + ipu_dp_disable_channel(ipu_plane->dp, false);
  107. ipu_idmac_disable_channel(ipu_plane->ipu_ch);
  108. ipu_dmfc_disable_channel(ipu_plane->dmfc);
  109. if (ipu_plane->dp)
  110. ipu_dp_disable(ipu_plane->ipu);
  111. +}
  112.  
  113. - return 0;
  114. +void ipu_plane_disable_deferred(struct drm_plane *plane)
  115. +{
  116. + struct ipu_plane *ipu_plane = to_ipu_plane(plane);
  117. +
  118. + if (ipu_plane->disabling) {
  119. + ipu_plane->disabling = false;
  120. + ipu_plane_disable(ipu_plane, false);
  121. + }
  122. }
  123. +EXPORT_SYMBOL_GPL(ipu_plane_disable_deferred);
  124.  
  125. static void ipu_plane_destroy(struct drm_plane *plane)
  126. {
  127. @@ -356,7 +363,11 @@ static int ipu_plane_atomic_check(struct drm_plane *plane,
  128. static void ipu_plane_atomic_disable(struct drm_plane *plane,
  129. struct drm_plane_state *old_state)
  130. {
  131. - ipu_disable_plane(plane);
  132. + struct ipu_plane *ipu_plane = to_ipu_plane(plane);
  133. +
  134. + if (ipu_plane->dp)
  135. + ipu_dp_disable_channel(ipu_plane->dp, true);
  136. + ipu_plane->disabling = true;
  137. }
  138.  
  139. static void ipu_plane_atomic_update(struct drm_plane *plane,
  140. diff --git a/drivers/gpu/drm/imx/ipuv3-plane.h b/drivers/gpu/drm/imx/ipuv3-plane.h
  141. index 338b88a74eb6e..0e2a723ff9816 100644
  142. --- a/drivers/gpu/drm/imx/ipuv3-plane.h
  143. +++ b/drivers/gpu/drm/imx/ipuv3-plane.h
  144. @@ -23,6 +23,8 @@ struct ipu_plane {
  145.  
  146. int dma;
  147. int dp_flow;
  148. +
  149. + bool disabling;
  150. };
  151.  
  152. struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
  153. @@ -42,4 +44,7 @@ void ipu_plane_put_resources(struct ipu_plane *plane);
  154.  
  155. int ipu_plane_irq(struct ipu_plane *plane);
  156.  
  157. +void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel);
  158. +void ipu_plane_disable_deferred(struct drm_plane *plane);
  159. +
  160. #endif
  161. diff --git a/drivers/gpu/ipu-v3/ipu-dp.c b/drivers/gpu/ipu-v3/ipu-dp.c
  162. index 0e09c98248a0d..9b2b3fa479c46 100644
  163. --- a/drivers/gpu/ipu-v3/ipu-dp.c
  164. +++ b/drivers/gpu/ipu-v3/ipu-dp.c
  165. @@ -277,9 +277,6 @@ void ipu_dp_disable_channel(struct ipu_dp *dp, bool sync)
  166. writel(0, flow->base + DP_FG_POS);
  167. ipu_srm_dp_update(priv->ipu, sync);
  168.  
  169. - if (ipu_idmac_channel_busy(priv->ipu, IPUV3_CHANNEL_MEM_BG_SYNC))
  170. - ipu_wait_interrupt(priv->ipu, IPU_IRQ_DP_SF_END, 50);
  171. -
  172. mutex_unlock(&priv->mutex);
  173. }
  174. EXPORT_SYMBOL_GPL(ipu_dp_disable_channel);
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