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arter97
Jan 5th, 2020
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  1. diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c b/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c
  2. index a7267e362ab16..37d8784a0730c 100644
  3. --- a/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c
  4. +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c
  5. @@ -35,6 +35,7 @@
  6.  #include "dsi_drm.h"
  7.  #include "dsi_display.h"
  8.  #include "sde_crtc.h"
  9. +#include "sde_hw_mdss.h"
  10.  #include "sde_rm.h"
  11.  #include "sde_trace.h"
  12.  /**
  13. @@ -740,8 +741,9 @@ static int dsi_panel_power_off(struct dsi_panel *panel)
  14.     return rc;
  15.  }
  16.  
  17. -int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  18. -               enum dsi_cmd_set_type type)
  19. +static int __dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  20. +               enum dsi_cmd_set_type type,
  21. +               bool wait)
  22.  {
  23.     int rc = 0, i = 0;
  24.     ssize_t len;
  25. @@ -779,7 +781,7 @@ int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  26.             pr_err("failed to set cmds(%d), rc=%d\n", type, rc);
  27.             goto error;
  28.         }
  29. -       if (cmds->post_wait_ms)
  30. +       if (wait && cmds->post_wait_ms)
  31.             usleep_range(cmds->post_wait_ms*1000,
  32.                     ((cmds->post_wait_ms*1000)+10));
  33.         cmds++;
  34. @@ -788,6 +790,12 @@ int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  35.     return rc;
  36.  }
  37.  
  38. +int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  39. +               enum dsi_cmd_set_type type)
  40. +{
  41. +   return __dsi_panel_tx_cmd_set(panel, type, true);
  42. +}
  43. +
  44.  static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  45.  {
  46.     int rc = 0;
  47. @@ -956,58 +964,56 @@ static int dsi_panel_update_backlight(struct dsi_panel *panel,
  48.     return rc;
  49.  }
  50.  
  51. -int dsi_panel_op_set_hbm_mode(struct dsi_panel *panel, int level)
  52. +int hbm_level;
  53. +static struct dsi_panel *hbm_panel;
  54. +static void set_hbm_mode(struct work_struct *work)
  55.  {
  56. -   int rc = 0;
  57. -   u32 count;
  58. -   struct dsi_display_mode *mode;
  59. +   struct dsi_panel *panel = hbm_panel;
  60. +   int level = hbm_level;
  61.  
  62. -   if (!panel || !panel->cur_mode) {
  63. -       pr_err("Invalid params\n");
  64. -       return -EINVAL;
  65. -   }
  66. +   /*
  67. +    * Bypass the command post delay by calling __dsi_panel_tx_cmd_set().
  68. +    * Out-of-sync FOD is less noticeable this way.
  69. +    */
  70.  
  71.     mutex_lock(&panel->panel_lock);
  72. -
  73. -   mode = panel->cur_mode;
  74.     switch (level) {
  75.     case 0:
  76. -       count = mode->priv_info->cmd_sets[DSI_CMD_SET_HBM_OFF].count;
  77. -       if (!count) {
  78. -           pr_err("This panel does not support HBM mode off.\n");
  79. -           goto error;
  80. -       } else {
  81. -           rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_HBM_OFF);
  82. -           printk(KERN_ERR
  83. -                  "When HBM OFF -->hbm_backight = %d panel->bl_config.bl_level =%d\n",
  84. -                  panel->hbm_backlight, panel->bl_config.bl_level);
  85. -           rc = dsi_panel_update_backlight(panel,
  86. -                           panel->hbm_backlight);
  87. -       }
  88. +       __dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_HBM_OFF, false);
  89. +       printk(KERN_ERR
  90. +              "When HBM OFF -->hbm_backight = %d panel->bl_config.bl_level =%d\n",
  91. +              panel->hbm_backlight, panel->bl_config.bl_level);
  92. +       dsi_panel_update_backlight(panel, panel->hbm_backlight);
  93.         break;
  94. -
  95.     case 1:
  96. -       count = mode->priv_info->cmd_sets[DSI_CMD_SET_HBM_ON_5].count;
  97. -       if (!count) {
  98. -           pr_err("This panel does not support HBM mode.\n");
  99. -           goto error;
  100. -       } else {
  101. -           rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_HBM_ON_5);
  102. -       }
  103. -       break;
  104. -   default:
  105. +       __dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_HBM_ON_5, false);
  106.         break;
  107. -
  108.     }
  109. -   pr_err("Set HBM Mode = %d\n", level);
  110. -   if (level == 5) {
  111. -       pr_err("HBM == 5 for fingerprint\n");
  112. +   mutex_unlock(&panel->panel_lock);
  113. +
  114. +   pr_info("Set HBM Mode = %d\n", level);
  115. +}
  116. +
  117. +DECLARE_WORK(hbm_work, set_hbm_mode);
  118. +/*
  119. + * This function is used only for "op_friginer_print_hbm".
  120. + *
  121. + * As we are triggering hbm_work after dim layer is committed,
  122. + * remove the call here.
  123. + */
  124. +int dsi_panel_op_set_hbm_mode(struct dsi_panel *panel, int level)
  125. +{
  126. +   if (!panel || !panel->cur_mode) {
  127. +       pr_err("Invalid params\n");
  128. +       return -EINVAL;
  129.     }
  130.  
  131. -error:
  132. -   mutex_unlock(&panel->panel_lock);
  133. +   hbm_panel = panel;
  134. +   hbm_level = level;
  135.  
  136. -   return rc;
  137. +   // queue_work(system_highpri_wq, &hbm_work);
  138. +
  139. +   return 0;
  140.  }
  141.  
  142.  static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  143. diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c
  144. index 0678fb5718efc..e682d563b0c4b 100644
  145. --- a/drivers/gpu/drm/msm/msm_atomic.c
  146. +++ b/drivers/gpu/drm/msm/msm_atomic.c
  147. @@ -24,6 +24,7 @@
  148.  #include "msm_gem.h"
  149.  #include "msm_fence.h"
  150.  #include "sde_trace.h"
  151. +#include "sde_hw_mdss.h"
  152.  
  153.  #define MULTIPLE_CONN_DETECTED(x) (x > 1)
  154.  
  155. @@ -581,6 +582,8 @@ static void msm_atomic_helper_commit_modeset_enables(struct drm_device *dev,
  156.  /* The (potentially) asynchronous part of the commit.  At this point
  157.   * nothing can fail short of armageddon.
  158.   */
  159. +extern struct work_struct hbm_work;
  160. +extern int hbm_level;
  161.  static void complete_commit(struct msm_commit *c)
  162.  {
  163.     struct drm_atomic_state *state = c->state;
  164. @@ -619,6 +622,14 @@ static void complete_commit(struct msm_commit *c)
  165.  
  166.     drm_atomic_state_put(state);
  167.  
  168. +   // Ensure dim layer frame is committed
  169. +   if (unlikely(sde_hw_dim_status & DIM_LAYER_REQUESTED)) {
  170. +       sde_hw_dim_status ^= DIM_LAYER_REQUESTED;
  171. +       hbm_level = sde_hw_dim_status;
  172. +       mb();
  173. +       queue_work(system_highpri_wq, &hbm_work);
  174. +   }
  175. +
  176.     priv->commit_end_time =  ktime_get(); //commit end time
  177.  
  178.     commit_destroy(c);
  179. diff --git a/drivers/gpu/drm/msm/sde/sde_crtc.c b/drivers/gpu/drm/msm/sde/sde_crtc.c
  180. index 8814705548b2f..a01aee16a8780 100644
  181. --- a/drivers/gpu/drm/msm/sde/sde_crtc.c
  182. +++ b/drivers/gpu/drm/msm/sde/sde_crtc.c
  183. @@ -3160,6 +3160,11 @@ static void _sde_crtc_clear_dim_layers_v1(struct sde_crtc_state *cstate)
  184.         memset(&cstate->dim_layer[i], 0, sizeof(cstate->dim_layer[i]));
  185.  
  186.     cstate->num_dim_layers = 0;
  187. +
  188. +   if (unlikely(sde_hw_dim_status != 0)) {
  189. +       sde_hw_dim_status = DIM_LAYER_INACTIVE | DIM_LAYER_REQUESTED;
  190. +       mb();
  191. +   }
  192.  }
  193.  
  194.  /**
  195. @@ -3208,6 +3213,14 @@ static void _sde_crtc_set_dim_layer_v1(struct drm_crtc *crtc,
  196.     }
  197.     /* populate from user space */
  198.     cstate->num_dim_layers = count;
  199. +   if (count == 0) {
  200. +       if (unlikely(sde_hw_dim_status != 0)) {
  201. +           sde_hw_dim_status = DIM_LAYER_INACTIVE | DIM_LAYER_REQUESTED;
  202. +           mb();
  203. +       }
  204. +       return;
  205. +   }
  206. +
  207.     for (i = 0; i < count; i++) {
  208.         user_cfg = &dim_layer_v1.layer_cfg[i];
  209.  
  210. diff --git a/drivers/gpu/drm/msm/sde/sde_hw_lm.c b/drivers/gpu/drm/msm/sde/sde_hw_lm.c
  211. index 9b8d253bd9d78..a9bff28f6c528 100644
  212. --- a/drivers/gpu/drm/msm/sde/sde_hw_lm.c
  213. +++ b/drivers/gpu/drm/msm/sde/sde_hw_lm.c
  214. @@ -194,6 +194,7 @@ static void sde_hw_lm_clear_dim_layer(struct sde_hw_mixer *ctx)
  215.     }
  216.  }
  217.  
  218. +u32 sde_hw_dim_status;
  219.  static void sde_hw_lm_setup_dim_layer(struct sde_hw_mixer *ctx,
  220.         struct sde_hw_dim_layer *dim_layer)
  221.  {
  222. @@ -210,7 +211,14 @@ static void sde_hw_lm_setup_dim_layer(struct sde_hw_mixer *ctx,
  223.         return;
  224.     }
  225.  
  226. -   alpha = dim_layer->color_fill.color_3 & 0xFF;
  227. +   if (dim_layer->color_fill.color_3) {
  228. +       if (!(sde_hw_dim_status & DIM_LAYER_ACTIVE))
  229. +           sde_hw_dim_status = DIM_LAYER_ACTIVE | DIM_LAYER_REQUESTED;
  230. +       alpha = dim_layer->color_fill.color_3 & 0xFF;
  231. +   } else if (unlikely(sde_hw_dim_status != 0)) {
  232. +       sde_hw_dim_status = DIM_LAYER_INACTIVE | DIM_LAYER_REQUESTED;
  233. +   }
  234. +   mb();
  235.     val = ((dim_layer->color_fill.color_1 << 2) & 0xFFF) << 16 |
  236.             ((dim_layer->color_fill.color_0 << 2) & 0xFFF);
  237.     SDE_REG_WRITE(c, LM_FG_COLOR_FILL_COLOR_0 + stage_off, val);
  238. diff --git a/drivers/gpu/drm/msm/sde/sde_hw_mdss.h b/drivers/gpu/drm/msm/sde/sde_hw_mdss.h
  239. index 05b071080dd08..df689aed4ece2 100644
  240. --- a/drivers/gpu/drm/msm/sde/sde_hw_mdss.h
  241. +++ b/drivers/gpu/drm/msm/sde/sde_hw_mdss.h
  242. @@ -560,6 +560,12 @@ struct sde_hw_dim_layer {
  243.     struct sde_mdss_color color_fill;
  244.     struct sde_rect rect;
  245.  };
  246. +
  247. +extern u32 sde_hw_dim_status;
  248. +#define DIM_LAYER_INACTIVE 0x00
  249. +#define DIM_LAYER_ACTIVE   0x01
  250. +#define DIM_LAYER_REQUESTED    0x02
  251. +
  252.  struct fingerprint_dim_layer {
  253.     uint32_t flags;
  254.     uint32_t stage;
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