BinaryCounter4bit

// file: BinCounterfour.v
// author: @maco

`timescale 1ns/1ns

module bin_counter_4bits(input clk, reset, output reg [3:0]count);

always @(posedge clk, posedge reset) begin
if (reset == 1)
count <= 4'd0;
else    count <= count + 1;
end

endmodule