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- ; Computer Architectures - 02LSEOV 02LSEOQ ;
- ; author: Paolo BERNARDI - Politecnico di Torino ;
- ; creation: 11 November 2018 ;
- ; last update: 13 November 2018 ;
- ; functionalities: ;
- ; nothing but bringing to the reset handler ;
- ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
- ; <h> Stack Configuration
- ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
- ; </h>
- Stack_Size EQU 0x00000200
- AREA STACK, NOINIT, READWRITE, ALIGN=3
- Stack_Mem SPACE Stack_Size
- __initial_sp
- ; <h> Heap Configuration
- ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
- ; </h>
- Heap_Size EQU 0x00000200
- AREA HEAP, NOINIT, READWRITE, ALIGN=3
- __heap_base
- Heap_Mem SPACE Heap_Size
- __heap_limit
- AREA DATA, NOINIT, READWRITE, ALIGN=3
- __List__ SPACE 256
- PRESERVE8
- THUMB
- ; Vector Table Mapped to Address 0 at Reset
- AREA RESET, DATA, READONLY
- EXPORT __Vectors
- __Vectors DCD __initial_sp ; Top of Stack
- DCD Reset_Handler ; Reset Handler
- DCD NMI_Handler ; NMI Handler
- DCD HardFault_Handler ; Hard Fault Handler
- DCD MemManage_Handler ; MPU Fault Handler
- DCD BusFault_Handler ; Bus Fault Handler
- DCD UsageFault_Handler ; Usage Fault Handler
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD SVC_Handler ; SVCall Handler
- DCD DebugMon_Handler ; Debug Monitor Handler
- DCD 0 ; Reserved
- DCD PendSV_Handler ; PendSV Handler
- DCD SysTick_Handler ; SysTick Handler
- ; External Interrupts
- DCD WDT_IRQHandler ; 16: Watchdog Timer
- DCD TIMER0_IRQHandler ; 17: Timer0
- DCD TIMER1_IRQHandler ; 18: Timer1
- DCD TIMER2_IRQHandler ; 19: Timer2
- DCD TIMER3_IRQHandler ; 20: Timer3
- DCD UART0_IRQHandler ; 21: UART0
- DCD UART1_IRQHandler ; 22: UART1
- DCD UART2_IRQHandler ; 23: UART2
- DCD UART3_IRQHandler ; 24: UART3
- DCD PWM1_IRQHandler ; 25: PWM1
- DCD I2C0_IRQHandler ; 26: I2C0
- DCD I2C1_IRQHandler ; 27: I2C1
- DCD I2C2_IRQHandler ; 28: I2C2
- DCD SPI_IRQHandler ; 29: SPI
- DCD SSP0_IRQHandler ; 30: SSP0
- DCD SSP1_IRQHandler ; 31: SSP1
- DCD PLL0_IRQHandler ; 32: PLL0 Lock (Main PLL)
- DCD RTC_IRQHandler ; 33: Real Time Clock
- DCD EINT0_IRQHandler ; 34: External Interrupt 0
- DCD EINT1_IRQHandler ; 35: External Interrupt 1
- DCD EINT2_IRQHandler ; 36: External Interrupt 2
- DCD EINT3_IRQHandler ; 37: External Interrupt 3
- DCD ADC_IRQHandler ; 38: A/D Converter
- DCD BOD_IRQHandler ; 39: Brown-Out Detect
- DCD USB_IRQHandler ; 40: USB
- DCD CAN_IRQHandler ; 41: CAN
- DCD DMA_IRQHandler ; 42: General Purpose DMA
- DCD I2S_IRQHandler ; 43: I2S
- DCD ENET_IRQHandler ; 44: Ethernet
- DCD RIT_IRQHandler ; 45: Repetitive Interrupt Timer
- DCD MCPWM_IRQHandler ; 46: Motor Control PWM
- DCD QEI_IRQHandler ; 47: Quadrature Encoder Interface
- DCD PLL1_IRQHandler ; 48: PLL1 Lock (USB PLL)
- DCD USBActivity_IRQHandler ; 49: USB Activity interrupt to wakeup
- DCD CANActivity_IRQHandler ; 50: CAN Activity interrupt to wakeup
- IF :LNOT::DEF:NO_CRP
- AREA |.ARM.__at_0x02FC|, CODE, READONLY
- CRP_Key DCD 0xFFFFFFFF
- ENDIF
- AREA |.text|, CODE, READONLY
- ; Reset Handler
- Reset_Handler PROC
- EXPORT Reset_Handler [WEAK]
- LDR R0, =Reset_Handler
- ; your code here
- LDR R0, =__List__
- LDR R1, =Price_list
- LDR R2, =0
- _memcpy_loop LDR R3, [R1, R2, LSL #2]
- STR R3, [R0, R2, LSL #2]
- ADD R2, R2, #1
- CMP R2, #56
- BNE _memcpy_loop
- LDR R1, =0 ; R1 = i
- _i_loop LDR R2, =0 ; R2 = j
- LDR R3, =28 ; R3 = n
- _j_loop LDR R4, [R0, R2, LSL #3] ; R4 = list[j]
- ADD R5, R2, #1
- LDR R6, [R0, R5, LSL #3] ; R5 = list[j+1]
- CMP R6, R4
- BLO _Swap_
- _Pin_ ADD R2, R2, #1
- SUB R12, R3, R1
- SUB R12, R12, #1 ; R12 <- n-i-1
- CMP R2, R12
- BLO _j_loop
- ADD R1, R1, #1
- SUB R7, R3, #1
- CMP R1, R7
- BLO _i_loop
- B _Sorted_
- _Swap_ ADD R7, R4, #0 ; R7 = tmp = list[j]
- LSL R8, R2, #3
- ADD R8, R8, #4
- LDR R9, [R0, R8] ; R9 = list[j] -> data
- LSL R11, R5, #3
- ADD R11, R11, #4
- LDR R10, [R0, R11] ; R10 = list[j+1] -> data
- STR R6, [R0, R2, LSL #3] ; list[j] <- list[j+1]
- STR R10, [R0, R8]
- STR R7, [R0, R5, LSL #3] ; list[j+1] <- list[j]
- STR R9, [R0, R11]
- B _Pin_
- ; copy and paste
- _Sorted_ LDR R10, =0 ; R10 = 0
- LDR R0, =__List__ ; R0 <-- address of __List__
- LDR R1, =Item_list ; R1 <-- address of Item_list
- LDR R2, =4 ; R2 = 4
- __Loop LDR R3, [R1] ; R3 = [Item_List] = key
- __BinarySearch LDR R4, =0 ; R4 = first = 0
- LDR R5, =27 ; R5 = last = 27
- __BS_Loop ADD R6, R4, R5
- LSR R6, R6, #1 ; R6 = middle = (first + last) / 2
- LDR R7, [R0, R6, LSL #3] ; R7 = table[middle]
- CMP R3, R7
- BEQ __Index_Found
- SUBLO R5, R6, #1 ; if (table[middle] < key) last = middle - 1
- ADDHS R4, R6, #1 ; if (table[middle] >= key) first = middle + 1
- CMP R4, R5
- BLS __BS_Loop
- __Index_Found LDR R12, [R0, R6, LSL #3] ; R12 = table[index]
- CMP R12, R3
- MOVNE R10, #0
- BNE InfLoop
- LSL R6, R6, #3 ; index *= 8
- ADD R6, R6, #4 ; index += 4
- LDR R8, [R0, R6] ; R8 = price
- ADD R1, R1, #4
- LDR R9, [R1] ; R9 = amount
- MUL R11, R8, R9
- ADD R10, R10, R11 ; R10 += price*amount
- ADD R1, R1, #4
- SUB R2, R2, #1
- CMP R2, #0
- BNE __Loop
- InfLoop B InfLoop
- ENDP
- ; --- Sorted price_list ---
- S_Price_list DCD 0x004, 120, 0x006, 315, 0x007, 1210, 0x00A, 245
- DCD 0x010, 228, 0x012, 7, 0x016, 722, 0x017, 1217
- DCD 0x018, 138, 0x01A, 2222, 0x01B, 34, 0x01E, 11
- DCD 0x022, 223, 0x023, 1249, 0x025, 240, 0x027, 112
- DCD 0x02C, 2245, 0x02D, 410, 0x031, 840, 0x033, 945
- DCD 0x036, 3211, 0x039, 112, 0x03C, 719, 0x03E, 661
- DCD 0x042, 230, 0x045, 1112, 0x047, 2627, 0x04A, 265
- Price_list DCD 0x006, 315, 0x004, 120, 0x007, 1210, 0x03E, 661
- DCD 0x010, 228, 0x012, 7, 0x016, 722, 0x017, 1217
- DCD 0x018, 138, 0x01A, 2222, 0x01B, 34, 0x01E, 11
- DCD 0x023, 1249, 0x022, 223, 0x025, 240, 0x027, 112
- DCD 0x02C, 2245, 0x02D, 410, 0x031, 840, 0x033, 945
- DCD 0x036, 3211, 0x039, 112, 0x03C, 719, 0x00A, 245
- DCD 0x042, 230, 0x045, 1112, 0x047, 2627, 0x04A, 265
- Item_list DCD 0x022, 14, 0x006, 431, 0x03E, 1210, 0x017, 56342
- Item_num DCB 4
- ; Dummy Exception Handlers (infinite loops which can be modified)
- NMI_Handler PROC
- EXPORT NMI_Handler [WEAK]
- B .
- ENDP
- HardFault_Handler\
- PROC
- EXPORT HardFault_Handler [WEAK]
- B .
- ENDP
- MemManage_Handler\
- PROC
- EXPORT MemManage_Handler [WEAK]
- B .
- ENDP
- BusFault_Handler\
- PROC
- EXPORT BusFault_Handler [WEAK]
- B .
- ENDP
- UsageFault_Handler\
- PROC
- EXPORT UsageFault_Handler [WEAK]
- B .
- ENDP
- SVC_Handler PROC
- EXPORT SVC_Handler [WEAK]
- B .
- ENDP
- DebugMon_Handler\
- PROC
- EXPORT DebugMon_Handler [WEAK]
- B .
- ENDP
- PendSV_Handler PROC
- EXPORT PendSV_Handler [WEAK]
- B .
- ENDP
- SysTick_Handler PROC
- EXPORT SysTick_Handler [WEAK]
- B .
- ENDP
- Default_Handler PROC
- EXPORT WDT_IRQHandler [WEAK]
- EXPORT TIMER0_IRQHandler [WEAK]
- EXPORT TIMER1_IRQHandler [WEAK]
- EXPORT TIMER2_IRQHandler [WEAK]
- EXPORT TIMER3_IRQHandler [WEAK]
- EXPORT UART0_IRQHandler [WEAK]
- EXPORT UART1_IRQHandler [WEAK]
- EXPORT UART2_IRQHandler [WEAK]
- EXPORT UART3_IRQHandler [WEAK]
- EXPORT PWM1_IRQHandler [WEAK]
- EXPORT I2C0_IRQHandler [WEAK]
- EXPORT I2C1_IRQHandler [WEAK]
- EXPORT I2C2_IRQHandler [WEAK]
- EXPORT SPI_IRQHandler [WEAK]
- EXPORT SSP0_IRQHandler [WEAK]
- EXPORT SSP1_IRQHandler [WEAK]
- EXPORT PLL0_IRQHandler [WEAK]
- EXPORT RTC_IRQHandler [WEAK]
- EXPORT EINT0_IRQHandler [WEAK]
- EXPORT EINT1_IRQHandler [WEAK]
- EXPORT EINT2_IRQHandler [WEAK]
- EXPORT EINT3_IRQHandler [WEAK]
- EXPORT ADC_IRQHandler [WEAK]
- EXPORT BOD_IRQHandler [WEAK]
- EXPORT USB_IRQHandler [WEAK]
- EXPORT CAN_IRQHandler [WEAK]
- EXPORT DMA_IRQHandler [WEAK]
- EXPORT I2S_IRQHandler [WEAK]
- EXPORT ENET_IRQHandler [WEAK]
- EXPORT RIT_IRQHandler [WEAK]
- EXPORT MCPWM_IRQHandler [WEAK]
- EXPORT QEI_IRQHandler [WEAK]
- EXPORT PLL1_IRQHandler [WEAK]
- EXPORT USBActivity_IRQHandler [WEAK]
- EXPORT CANActivity_IRQHandler [WEAK]
- WDT_IRQHandler
- TIMER0_IRQHandler
- TIMER1_IRQHandler
- TIMER2_IRQHandler
- TIMER3_IRQHandler
- UART0_IRQHandler
- UART1_IRQHandler
- UART2_IRQHandler
- UART3_IRQHandler
- PWM1_IRQHandler
- I2C0_IRQHandler
- I2C1_IRQHandler
- I2C2_IRQHandler
- SPI_IRQHandler
- SSP0_IRQHandler
- SSP1_IRQHandler
- PLL0_IRQHandler
- RTC_IRQHandler
- EINT0_IRQHandler
- EINT1_IRQHandler
- EINT2_IRQHandler
- EINT3_IRQHandler
- ADC_IRQHandler
- BOD_IRQHandler
- USB_IRQHandler
- CAN_IRQHandler
- DMA_IRQHandler
- I2S_IRQHandler
- ENET_IRQHandler
- RIT_IRQHandler
- MCPWM_IRQHandler
- QEI_IRQHandler
- PLL1_IRQHandler
- USBActivity_IRQHandler
- CANActivity_IRQHandler
- B .
- ENDP
- ALIGN
- ; User Initial Stack & Heap
- EXPORT __initial_sp
- EXPORT __heap_base
- EXPORT __heap_limit
- END
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