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gabrielaozegovic

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gabrielaozegovic
Dec 12th, 2017
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  1.  
  2.  
  3. .def tmp = r16
  4. .def mask = r17
  5. .def tmp1 = r18
  6.  
  7. .cseg
  8. rjmp reset
  9.  
  10. .org $002
  11. rjmp i1
  12.  
  13.  
  14. .org $004
  15. rjmp i2
  16.  
  17. .org $00C
  18. rjmp akt
  19.  
  20. .org $010
  21. rjmp akt
  22.  
  23. reset:
  24.  
  25. ldi tmp, high(RAMEND)
  26. out SPH, tmp
  27. ldi tmp, low(RAMEND)
  28. out SPL, tmp
  29.  
  30. ldi tmp, 0xff
  31. out DDRA, tmp
  32. out PORTA, tmp
  33.  
  34. ldi tmp, (1<<WGM10)
  35. out TCCR1A, tmp
  36.  
  37. ldi tmp, (1<<WGM12) | (1<<CS10)
  38. out TCCR1B, tmp
  39.  
  40. ldi tmp1, 100
  41.  
  42.  
  43. out OCR1AL, tmp1
  44.  
  45. ldi tmp, (1<<OCIE1A) | (1<<TOIE1)
  46. out TIMSK, tmp
  47.  
  48. ldi tmp, (1<<ISC11) | (1<<ISC01)
  49. out MCUCR, tmp
  50.  
  51. ldi tmp, (1<<INT0) | (1<<INT1)
  52. out GICR, tmp
  53.  
  54. sei
  55. ldi tmp, 0xff
  56. ldi mask, 0x01
  57.  
  58.  
  59.  
  60.  
  61. main:
  62.  
  63. rjmp main
  64.  
  65.  
  66.  
  67.  
  68.  
  69. akt:
  70. sei
  71. eor tmp, mask
  72. out PORTA, tmp
  73. reti
  74.  
  75.  
  76.  
  77.  
  78.  
  79. i1:
  80. cpi tmp1, 250
  81. breq skip
  82. inc tmp1
  83. out OCR1AL, tmp1
  84. skip:
  85. rcall debounce
  86. reti
  87.  
  88.  
  89.  
  90.  
  91.  
  92. i2:
  93. cpi tmp1, 1
  94. breq skip2
  95. dec tmp1
  96. out OCR1AL, tmp1
  97. skip2:
  98. rcall debounce
  99. reti
  100.  
  101.  
  102.  
  103.  
  104.  
  105. debounce:
  106.  
  107. clr r19
  108. clr r20
  109. ldi r21, 4
  110.  
  111. delay_loop:
  112. dec r19
  113. brne delay_loop
  114. dec r20
  115. brne delay_loop
  116. dec r21
  117. brne delay_loop
  118. push tmp
  119.  
  120. ldi tmp, (1<<INTF0) | (1<<INTF1)
  121. out GIFR, tmp
  122.  
  123. pop tmp
  124. ret
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