Untitled

 -------------------------------------------------------------------------------

 C64 Technical Data

 CPU			- 6510 @ 0.9852486MHz  (PAL)
				- 1.0227273MHz  (NTSC)

 RAM			- 64 Kb DRAM
				- 0.5 Kb SRAM (colour RAM $d800-dbff)

 ROM			- 20kB ROM together, in 3 ROMs :
				- 8k BASIC V2      ($a000-bfff)
				- 8k Kernal        ($e000-ffff)
				- 4k Character ROM ($d000-dfff)
				(In new versions BASIC and Kernal are together in a 16 Kb-ROM)

 Graphic		- VIC-II ($d000-d3ff)

 Sound			- SID ($d400-d7ff)

 Interfaces		- User port
				- Expansion port
				- Audio/Video connector
				- Cassette interface
				- Game port (2x)
				- Serial IEC-Port
				- TV Connector

 Keyboard		- 66 Keys (included Graphic Letters)

 Power Supply	- Extern (9V AC, +5V DC)

 -------------------------------------------------------------------------------

 Game Boy Technical Data

 CPU			- 8-bit (Similar to the Z80 processor)
 Clock Speed	- 4.194304MHz (4.295454MHz for SGB, max. 8.4MHz for CGB)
 Work RAM		- 8K Byte (32K Byte for CGB)
 Video RAM		- 8K Byte (16K Byte for CGB)
 Screen Size	- 2.6"
 Resolution		- 160x144 (20x18 tiles)
 Max sprites	- Max 40 per screen, 10 per line
 Sprite sizes	- 8x8 or 8x16
 Palettes		- 1x4 BG, 2x3 OBJ (for CGB: 8x4 BG, 8x3 OBJ)
 Colors			- 4 grayshades (32768 colors for CGB)
 Horiz Sync		- 9198 KHz (9420 KHz for SGB)
 Vert Sync		- 59.73 Hz (61.17 Hz for SGB)
 Sound			- 4 channels with stereo sound
 Power			- DC6V 0.7W (DC3V 0.7W for GB Pocket, DC3V 0.6W for CGB)

 -------------------------------------------------------------------------------

 SGB Description

General Description
Basically, the SGB (Super Gameboy) is an adapter cartridge that allows to play
gameboy games on a SNES (Super Nintendo Entertainment System) gaming console.
In detail, you plug the gameboy cartridge into the SGB cartridge, then plug
the SGB cartridge into the SNES, and then connect the SNES to your TV Set.
In result, games can be played and viewed on the TV Set, and are controlled by
using the SNES joypad(s).

More Technical Description
The SGB cartridge just contains a normal gameboy CPU and normal gameboy video
controller. Normally the video signal from this controller would be sent to the
LCD screen, however, in this special case the SNES read out the video signal
and displays it on the TV set by using a special SNES BIOS ROM which is located
in the SGB cartridge. Also, normal gameboy sound output is forwared to the SNES
and output to the TV Set, vice versa, joypad input is forwared from the SNES
controller(s) to the gameboy joypad inputs.

The original Super Game Boy is known to play the game program and its audio
2.4% faster than other Game Boy hardware. This is due to the use of the Super
NES's clock speed divided by 5, which ends up being 4.295 MHz instead of
4.194 MHz. The timing issue can be rectified by adding an appropriate
crystal oscillator to the Super Game Boy and disconnecting the Super NES's
clock source.

SNES = 21.477MHz Clock
21.477MHz / 5 = 4.2954 MHz = 102% gameboy speed
you would need 20,9736 MHz to get 100% gameboy speed

-------------------------------------------------------------------------------

SGB clock (Pin 1 SGB cartridge)

1.	C64 clock to SNES clock

		C64 clock speed (pal) 0,985248 Mhz * 21 = 20.6902
		20.6902 / 5 = 4.1380 MHz = 0,9865% gameboy speed


or apply

2.	SGB speedfix and solder in 4,194304 Mhz crystal.

-------------------------------------------------------------------------------

C64 Expansion Port (for connecting SGB to C64)

  22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1
┌──╥──╥──╥──╥──╥──╥──╥──╥──╥──╥──╥──╥──╥──╥──╥──╥──╥──╥──╥──╥──╥──╥──┐
│																	 │
│																	 │
└──╨──╨──╨──╨──╨──╨──╨──╨──╨──╨──╨──╨──╨──╨──╨──╨──╨──╨──╨──╨──╨──╨──┘
   Z  X  Y  W  V  U  T  S  R  P  N  M  L  K  J  H  F  E  D  C  B  A


Pin	Signal		Meaning	Remark
1	GND			Ground	(0 Volt)
2	+5V DC		Supply voltage +5V DC	The maximum load for extensions is 450mA.
3	+5V DC		Supply voltage +5V DC	The maximum load for extensions is 450mA.
4	/IRQ		Interrupt Request	see IRQ
5	R-/W		Read - /Write	High-level during read cycle, Low-level during write cycle
6	DOT Clk		Dot clock frequency	7,88 MHz at PAL-systems ; 8,18 MHz at NTSC-systems
7	/I/O1		Input/Output 1	Low-level, if address bus within $DE00-$DEFF.
8	/GAME		Game configuration	Used for memory re-configuration; see PLA (C64-Chip)
9	/EXROM		External ROM
10	/I/O2		Input/Output 2	Low-level, if address bus within $DF00-$DFFF.
11	/ROML		ROM Low
12	BA			Bus Available
13	/DMA		Direct Memory Access
14	D7			data line 7	data bus of the computer
15	D6			data line 6
16	D5			data line 5
17	D4			data line 4
18	D3			data line 3
19	D2			data line 2
20	D1			data line 1
21	D0			data line 0
22	GND			Ground	(0 Volt)
A	GND			Ground	(0 Volt)
B	/ROMH		ROM High
C	/RESET		Reset
D	/NMI		Non Maskable Interrupt	see NMI
E	Ø2			Phi 2	system clock (0,98MHz at PAL, 1,02MHz at NTSC)
F	A15			address line 15	address bus of the computer
H	A14			address line 14
J	A13			address line 13
K	A12			address line 12
L	A11			address line 11
M	A10			address line 10
N	A9			address line 9
P	A8			address line 8
R	A7			address line 7
S	A6			address line 6
T	A5			address line 5
U	A4			address line 4
V	A3			address line 3
W	A2			address line 2
X	A1			address line 1
Y	A0			address line 0
Z	GND			Ground	(0 Volt)

-------------------------------------------------------------------------------

Cartridge edge SGB

           21.477MHz Clock   01   32   /WRAM
                    EXPAND   02   33   REFRESH
                       PA6   03   34   PA7
                     /PARD   04   35   /PAWR

                       GND   05   36   GND
F                      A11   06   37   A12
r                      A10   07   38   A13
o                       A9   08   39   A14
n                       A8   09   40   A15
t                       A7   10   41   BA0
                        A6   11   42   BA1
o                       A5   12   43   BA2
f                       A4   13   44   BA3
                        A3   14   45   BA4
c                       A2   15   46   BA5
a                       A1   16   47   BA6
r                       A0   17   48   BA7
t                     /IRQ   18   49   /CART
                        D0   19   50   D4
                        D1   20   51   D5
                        D2   21   52   D6
                        D3   22   53   D7
                       /RD   23   54   /WR
         CIC out data (p1)   24   55   CIC out data (p2)
         CIC  in data (p7)   25   56   CIC in clock (p6)
                    /RESET   26   57   CPU_CLOCK
                       Vcc   27   58   Vcc

                       PA0   28   59   PA1
                       PA2   29   60   PA3
                       PA4   30   61   PA5
          Left Audio Input   31   62   Right Audio Input


Definitions:

A0-A15  - address bus A (offset)
BA0-BA7 - address bus A (bank)
/RD - read control line for address bus A
/WR - write control line for address bus A
/CART - set low by console's address decoder when address bus A is accessing memory
	in the cartridge region
/WRAM - set low by console's address decoder when address bus A is accessing memory
	in the WRAM region

/IRQ - a cartridge can pull this low to request an IRQ interrupt on the main CPU

PA0-PA7 - address bus B
/PARD - read control line for address bus B
/PAWR - write control line for address bus B

CIC - the security chip
	(referred to as CIC because that's how it's labeled on cartridge boards)

EXPAND - line is pulled high through a resistor
	the only other thing this is connected to is a pin of the expansion port
	(probably meant to allow cartridges to know if something is in the expansion port)
CPU_CLOCK - I believe this is either the current memory access cycle clock, or it is the
 	current clock given to the CPU core. I need to do more verification to be sure.
	I know that a 21.477MHz signal is given to the main CPU (+peripherals) chip, and
	depending on the current memory access cycle, the CPU core is actually clocked at
	3.58, 2.68, or 1.79 Mhz (divided down from the original 21.477MHz).
	This line connects to the main CPU (+peripherals) chip, which I believe outputs
	this system frequency, probably to allow a cartridge to stay synchronized with the
	CPU's memory access cycles if it needs to.
REFRESH - This is also some kind of clock I believe.
	I think it is output from the MainChip and connects to the WRAM.  It's probably
	some kind of memory refresh signal.
Audio Inputs - whatever the cartridge puts on these lines will be mixed into the SNES's
	audio output.


-------------------------------------------------------------------------------

C64 graphic mode for (Super)Gameboy Display

MCI Mode
Multi Color Interlace generates 320*200 pixel resolution.

You can use 4 colors in each 8*8 points big attribute cell.
This mode also gives the possibility of mixing two colors together,
so there are 4 of theoretical amount of 128 colors.
But how is it realised?

Here is the answer:

This mode uses two MultiColor pictures (160*200/4 colors in 4*8 cell),
each using its own attributes (except the color RAM at $d800,
which is shared by both).

spec. of c64 MCI mode

-320*200 px
-4 colors
-in each 8*8 points big attribute cell

spec. of Gameboy display

-160*144 px
-4 grayshades
-Sprite sizes 8x8 or 8x16

-------------------------------------------------------------------------------

How i think it could work.
-------------------------------------------------------------------------------

SGB Video transfer to c64

	- C64 reads V-ram from SGB Cartridge via C64 Expansion port
	- C64 convert the gameboy 4 shades of grey to C64 color
	- C64 uses MCI mode to display converted Gameboy display data

-------------------------------------------------------------------------------

C64 send controller data to SGB ?

	- C64 writes cotroller data into gameboy ram to FF00 ?